1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
36 #if defined __cplusplus
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
63 * Registers may be treated as float, signed int or unsigned int.
65 union tgsi_exec_channel
67 float f
[TGSI_QUAD_SIZE
];
68 int i
[TGSI_QUAD_SIZE
];
69 unsigned u
[TGSI_QUAD_SIZE
];
73 * A vector[RGBA] of channels[4 pixels]
75 struct tgsi_exec_vector
77 union tgsi_exec_channel xyzw
[TGSI_NUM_CHANNELS
];
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
84 struct tgsi_interp_coef
86 float a0
[TGSI_NUM_CHANNELS
]; /* in an xyzw layout */
87 float dadx
[TGSI_NUM_CHANNELS
];
88 float dady
[TGSI_NUM_CHANNELS
];
91 enum tgsi_sampler_control
{
92 tgsi_sampler_lod_none
,
93 tgsi_sampler_lod_bias
,
94 tgsi_sampler_lod_explicit
,
96 /* FIXME: tgsi_sampler_derivs_explicit */
100 * Information for sampling textures, which must be implemented
101 * by code outside the TGSI executor.
105 /** Get samples for four fragments in a quad */
106 /* this interface contains 5 sets of channels that vary
107 * depending on the sampler.
108 * s - the first texture coordinate for sampling.
109 * t - the second texture coordinate for sampling - unused for 1D,
111 * p - the third coordinate for sampling for 3D, cube, cube arrays,
112 * layer for 2D arrays. Compare value for 1D/2D shadows.
113 * c0 - Compare value for shadow cube and shadow 2d arrays,
114 * layer for cube arrays.
115 * lod - lod value, except for shadow cube arrays (compare value there).
117 void (*get_samples
)(struct tgsi_sampler
*sampler
,
118 const float s
[TGSI_QUAD_SIZE
],
119 const float t
[TGSI_QUAD_SIZE
],
120 const float r
[TGSI_QUAD_SIZE
],
121 const float c0
[TGSI_QUAD_SIZE
],
122 const float c1
[TGSI_QUAD_SIZE
],
123 enum tgsi_sampler_control control
,
124 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
125 void (*get_dims
)(struct tgsi_sampler
*sampler
, int level
,
127 void (*get_texel
)(struct tgsi_sampler
*sampler
, const int i
[TGSI_QUAD_SIZE
],
128 const int j
[TGSI_QUAD_SIZE
], const int k
[TGSI_QUAD_SIZE
],
129 const int lod
[TGSI_QUAD_SIZE
], const int8_t offset
[3],
130 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
133 #define TGSI_EXEC_NUM_TEMPS 4096
134 #define TGSI_EXEC_NUM_IMMEDIATES 256
135 #define TGSI_EXEC_NUM_TEMP_ARRAYS 8
138 * Locations of various utility registers (_I = Index, _C = Channel)
140 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
141 #define TGSI_EXEC_TEMP_00000000_C 0
143 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
144 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
146 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
147 #define TGSI_EXEC_TEMP_80000000_C 2
149 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
150 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
152 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
153 #define TGSI_EXEC_TEMP_ONE_C 0
155 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
156 #define TGSI_EXEC_TEMP_TWO_C 1
158 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
159 #define TGSI_EXEC_TEMP_128_C 2
161 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
162 #define TGSI_EXEC_TEMP_MINUS_128_C 3
164 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
165 #define TGSI_EXEC_TEMP_KILMASK_C 0
167 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
168 #define TGSI_EXEC_TEMP_OUTPUT_C 1
170 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
171 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
173 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
174 #define TGSI_EXEC_TEMP_THREE_C 3
176 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
177 #define TGSI_EXEC_TEMP_HALF_C 0
179 /* execution mask, each value is either 0 or ~0 */
180 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
181 #define TGSI_EXEC_MASK_C 1
183 /* 4 register buffer for various purposes */
184 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
185 #define TGSI_EXEC_NUM_TEMP_R 4
187 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
188 #define TGSI_EXEC_NUM_ADDRS 1
190 /* predicate register */
191 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
192 #define TGSI_EXEC_NUM_PREDS 1
194 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10
198 #define TGSI_EXEC_MAX_NESTING 32
199 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
200 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
201 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
202 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
204 /* The maximum number of input attributes per vertex. For 2D
205 * input register files, this is the stride between two 1D
208 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 17
210 /* The maximum number of constant vectors per constant buffer.
212 #define TGSI_EXEC_MAX_CONST_BUFFER 4096
214 /* The maximum number of vertices per primitive */
215 #define TGSI_MAX_PRIM_VERTICES 6
217 /* The maximum number of primitives to be generated */
218 #define TGSI_MAX_PRIMITIVES 64
220 /* The maximum total number of vertices */
221 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
223 #define TGSI_MAX_MISC_INPUTS 8
225 /** function call/activation record */
226 struct tgsi_call_record
237 /* Switch-case block state. */
238 struct tgsi_switch_record
{
239 uint mask
; /**< execution mask */
240 union tgsi_exec_channel selector
; /**< a value case statements are compared to */
241 uint defaultMask
; /**< non-execute mask for default case */
245 enum tgsi_break_type
{
246 TGSI_EXEC_BREAK_INSIDE_LOOP
,
247 TGSI_EXEC_BREAK_INSIDE_SWITCH
251 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
255 * Run-time virtual machine state for executing TGSI shader.
257 struct tgsi_exec_machine
259 /* Total = program temporaries + internal temporaries
261 struct tgsi_exec_vector Temps
[TGSI_EXEC_NUM_TEMPS
+
262 TGSI_EXEC_NUM_TEMP_EXTRAS
];
263 struct tgsi_exec_vector TempArray
[TGSI_EXEC_NUM_TEMP_ARRAYS
][TGSI_EXEC_NUM_TEMPS
];
265 float Imms
[TGSI_EXEC_NUM_IMMEDIATES
][4];
267 float ImmArray
[TGSI_EXEC_NUM_IMMEDIATES
][4];
269 struct tgsi_exec_vector
*Inputs
;
270 struct tgsi_exec_vector
*Outputs
;
273 unsigned SysSemanticToIndex
[TGSI_SEMANTIC_COUNT
];
274 union tgsi_exec_channel SystemValue
[TGSI_MAX_MISC_INPUTS
];
276 struct tgsi_exec_vector
*Addrs
;
277 struct tgsi_exec_vector
*Predicates
;
279 struct tgsi_sampler
**Samplers
;
283 const void *Consts
[PIPE_MAX_CONSTANT_BUFFERS
];
284 unsigned ConstsSize
[PIPE_MAX_CONSTANT_BUFFERS
];
286 const struct tgsi_token
*Tokens
; /**< Declarations, instructions */
287 unsigned Processor
; /**< TGSI_PROCESSOR_x */
289 /* GEOMETRY processor only. */
290 unsigned *Primitives
;
292 unsigned MaxGeometryShaderOutputs
;
294 /* FRAGMENT processor only. */
295 const struct tgsi_interp_coef
*InterpCoefs
;
296 struct tgsi_exec_vector QuadPos
;
297 float Face
; /**< +1 if front facing, -1 if back facing */
298 bool flatshade_color
;
299 /* Conditional execution masks */
300 uint CondMask
; /**< For IF/ELSE/ENDIF */
301 uint LoopMask
; /**< For BGNLOOP/ENDLOOP */
302 uint ContMask
; /**< For loop CONT statements */
303 uint FuncMask
; /**< For function calls */
304 uint ExecMask
; /**< = CondMask & LoopMask */
306 /* Current switch-case state. */
307 struct tgsi_switch_record Switch
;
309 /* Current break type. */
310 enum tgsi_break_type BreakType
;
312 /** Condition mask stack (for nested conditionals) */
313 uint CondStack
[TGSI_EXEC_MAX_COND_NESTING
];
316 /** Loop mask stack (for nested loops) */
317 uint LoopStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
320 /** Loop label stack */
321 uint LoopLabelStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
322 int LoopLabelStackTop
;
324 /** Loop continue mask stack (see comments in tgsi_exec.c) */
325 uint ContStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
328 /** Switch case stack */
329 struct tgsi_switch_record SwitchStack
[TGSI_EXEC_MAX_SWITCH_NESTING
];
332 enum tgsi_break_type BreakStack
[TGSI_EXEC_MAX_BREAK_STACK
];
335 /** Function execution mask stack (for executing subroutine code) */
336 uint FuncStack
[TGSI_EXEC_MAX_CALL_NESTING
];
339 /** Function call stack for saving/restoring the program counter */
340 struct tgsi_call_record CallStack
[TGSI_EXEC_MAX_CALL_NESTING
];
343 struct tgsi_full_instruction
*Instructions
;
344 uint NumInstructions
;
346 struct tgsi_full_declaration
*Declarations
;
347 uint NumDeclarations
;
349 struct tgsi_declaration_sampler_view
350 SamplerViews
[PIPE_MAX_SHADER_SAMPLER_VIEWS
];
352 boolean UsedGeometryShader
;
355 struct tgsi_exec_machine
*
356 tgsi_exec_machine_create( void );
359 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
);
363 tgsi_exec_machine_bind_shader(
364 struct tgsi_exec_machine
*mach
,
365 const struct tgsi_token
*tokens
,
367 struct tgsi_sampler
**samplers
);
370 tgsi_exec_machine_run(
371 struct tgsi_exec_machine
*mach
);
375 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
);
379 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
);
383 tgsi_set_kill_mask(struct tgsi_exec_machine
*mach
, unsigned mask
)
385 mach
->Temps
[TGSI_EXEC_TEMP_KILMASK_I
].xyzw
[TGSI_EXEC_TEMP_KILMASK_C
].u
[0] =
390 /** Set execution mask values prior to executing the shader */
392 tgsi_set_exec_mask(struct tgsi_exec_machine
*mach
,
393 boolean ch0
, boolean ch1
, boolean ch2
, boolean ch3
)
395 int *mask
= mach
->Temps
[TGSI_EXEC_MASK_I
].xyzw
[TGSI_EXEC_MASK_C
].i
;
396 mask
[0] = ch0
? ~0 : 0;
397 mask
[1] = ch1
? ~0 : 0;
398 mask
[2] = ch2
? ~0 : 0;
399 mask
[3] = ch3
? ~0 : 0;
404 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine
*mach
,
407 const unsigned *buf_sizes
);
411 tgsi_exec_get_shader_param(enum pipe_shader_cap param
)
414 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
415 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
416 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
417 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
419 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
420 return TGSI_EXEC_MAX_NESTING
;
421 case PIPE_SHADER_CAP_MAX_INPUTS
:
422 return TGSI_EXEC_MAX_INPUT_ATTRIBS
;
423 case PIPE_SHADER_CAP_MAX_CONSTS
:
424 return TGSI_EXEC_MAX_CONST_BUFFER
;
425 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
426 return PIPE_MAX_CONSTANT_BUFFERS
;
427 case PIPE_SHADER_CAP_MAX_TEMPS
:
428 return TGSI_EXEC_NUM_TEMPS
;
429 case PIPE_SHADER_CAP_MAX_ADDRS
:
430 return TGSI_EXEC_NUM_ADDRS
;
431 case PIPE_SHADER_CAP_MAX_PREDS
:
432 return TGSI_EXEC_NUM_PREDS
;
433 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
435 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
436 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
437 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
438 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
440 case PIPE_SHADER_CAP_SUBROUTINES
:
442 case PIPE_SHADER_CAP_INTEGERS
:
444 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
445 return PIPE_MAX_SAMPLERS
;
446 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
453 #if defined __cplusplus
457 #endif /* TGSI_EXEC_H */