src/gallium/auxiliary/tgsi/tgsi_exec.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #ifndef TGSI_EXEC_H
  30 #define TGSI_EXEC_H
  31
  32 #include "pipe/p_compiler.h"
  33 #include "pipe/p_state.h"
  34 #include "pipe/p_shader_tokens.h"
  35
  36 #if defined __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 #define TGSI_CHAN_X 0
  41 #define TGSI_CHAN_Y 1
  42 #define TGSI_CHAN_Z 2
  43 #define TGSI_CHAN_W 3
  44
  45 #define TGSI_NUM_CHANNELS 4  /* R,G,B,A */
  46 #define TGSI_QUAD_SIZE    4  /* 4 pixel/quad */
  47
  48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
  49    for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
  50
  51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  52    ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
  53
  54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  55    if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
  56
  57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
  58    TGSI_FOR_EACH_CHANNEL( CHAN )\
  59       TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
  60
  61
  62 /**
  63   * Registers may be treated as float, signed int or unsigned int.
  64   */
  65 union tgsi_exec_channel
  66 {
  67    float    f[TGSI_QUAD_SIZE];
  68    int      i[TGSI_QUAD_SIZE];
  69    unsigned u[TGSI_QUAD_SIZE];
  70 };
  71
  72 /**
  73   * A vector[RGBA] of channels[4 pixels]
  74   */
  75 struct tgsi_exec_vector
  76 {
  77    union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
  78 };
  79
  80 /**
  81  * For fragment programs, information for computing fragment input
  82  * values from plane equation of the triangle/line.
  83  */
  84 struct tgsi_interp_coef
  85 {
  86    float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
  87    float dadx[TGSI_NUM_CHANNELS];
  88    float dady[TGSI_NUM_CHANNELS];
  89 };
  90
  91 enum tgsi_sampler_control
  92 {
  93    TGSI_SAMPLER_LOD_NONE,
  94    TGSI_SAMPLER_LOD_BIAS,
  95    TGSI_SAMPLER_LOD_EXPLICIT,
  96    TGSI_SAMPLER_LOD_ZERO,
  97    TGSI_SAMPLER_DERIVS_EXPLICIT,
  98    TGSI_SAMPLER_GATHER,
  99 };
 100
 101 /**
 102  * Information for sampling textures, which must be implemented
 103  * by code outside the TGSI executor.
 104  */
 105 struct tgsi_sampler
 106 {
 107    /** Get samples for four fragments in a quad */
 108    /* this interface contains 5 sets of channels that vary
 109     * depending on the sampler.
 110     * s - the first texture coordinate for sampling.
 111     * t - the second texture coordinate for sampling - unused for 1D,
 112           layer for 1D arrays.
 113     * r - the third coordinate for sampling for 3D, cube, cube arrays,
 114     *     layer for 2D arrays. Compare value for 1D/2D shadows.
 115     * c0 - Compare value for shadow cube and shadow 2d arrays,
 116     *      layer for cube arrays.
 117     * derivs - explicit derivatives.
 118     * offset - texel offsets
 119     * lod - lod value, except for shadow cube arrays (compare value there).
 120     */
 121    void (*get_samples)(struct tgsi_sampler *sampler,
 122                        const unsigned sview_index,
 123                        const unsigned sampler_index,
 124                        const float s[TGSI_QUAD_SIZE],
 125                        const float t[TGSI_QUAD_SIZE],
 126                        const float r[TGSI_QUAD_SIZE],
 127                        const float c0[TGSI_QUAD_SIZE],
 128                        const float c1[TGSI_QUAD_SIZE],
 129                        float derivs[3][2][TGSI_QUAD_SIZE],
 130                        const int8_t offset[3],
 131                        enum tgsi_sampler_control control,
 132                        float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 133    void (*get_dims)(struct tgsi_sampler *sampler,
 134                     const unsigned sview_index,
 135                     int level, int dims[4]);
 136    void (*get_texel)(struct tgsi_sampler *sampler,
 137                      const unsigned sview_index,
 138                      const int i[TGSI_QUAD_SIZE],
 139                      const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
 140                      const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
 141                      float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 142    void (*query_lod)(const struct tgsi_sampler *tgsi_sampler,
 143                      const unsigned sview_index,
 144                      const unsigned sampler_index,
 145                      const float s[TGSI_QUAD_SIZE],
 146                      const float t[TGSI_QUAD_SIZE],
 147                      const float p[TGSI_QUAD_SIZE],
 148                      const float c0[TGSI_QUAD_SIZE],
 149                      const enum tgsi_sampler_control control,
 150                      float mipmap[TGSI_QUAD_SIZE],
 151                      float lod[TGSI_QUAD_SIZE]);
 152 };
 153
 154 #define TGSI_EXEC_NUM_TEMPS       4096
 155 #define TGSI_EXEC_NUM_IMMEDIATES  256
 156
 157 /*
 158  * Locations of various utility registers (_I = Index, _C = Channel)
 159  */
 160 #define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 161 #define TGSI_EXEC_TEMP_00000000_C   0
 162
 163 #define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 164 #define TGSI_EXEC_TEMP_7FFFFFFF_C   1
 165
 166 #define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 167 #define TGSI_EXEC_TEMP_80000000_C   2
 168
 169 #define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 170 #define TGSI_EXEC_TEMP_FFFFFFFF_C   3
 171
 172 #define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
 173 #define TGSI_EXEC_TEMP_ONE_C        0
 174
 175 #define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
 176 #define TGSI_EXEC_TEMP_TWO_C        1
 177
 178 #define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
 179 #define TGSI_EXEC_TEMP_128_C        2
 180
 181 #define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
 182 #define TGSI_EXEC_TEMP_MINUS_128_C  3
 183
 184 #define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
 185 #define TGSI_EXEC_TEMP_KILMASK_C    0
 186
 187 #define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
 188 #define TGSI_EXEC_TEMP_OUTPUT_C     1
 189
 190 #define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
 191 #define TGSI_EXEC_TEMP_PRIMITIVE_C  2
 192
 193 #define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
 194 #define TGSI_EXEC_TEMP_THREE_C      3
 195
 196 #define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
 197 #define TGSI_EXEC_TEMP_HALF_C       0
 198
 199 /* execution mask, each value is either 0 or ~0 */
 200 #define TGSI_EXEC_MASK_I            (TGSI_EXEC_NUM_TEMPS + 3)
 201 #define TGSI_EXEC_MASK_C            1
 202
 203 /* 4 register buffer for various purposes */
 204 #define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
 205 #define TGSI_EXEC_NUM_TEMP_R        4
 206
 207 #define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
 208
 209 /* predicate register */
 210 #define TGSI_EXEC_TEMP_P0           (TGSI_EXEC_NUM_TEMPS + 9)
 211 #define TGSI_EXEC_NUM_PREDS         1
 212
 213 #define TGSI_EXEC_NUM_TEMP_EXTRAS   10
 214
 215
 216
 217 #define TGSI_EXEC_MAX_NESTING  32
 218 #define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
 219 #define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
 220 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
 221 #define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
 222
 223 /* The maximum number of input attributes per vertex. For 2D
 224  * input register files, this is the stride between two 1D
 225  * arrays.
 226  */
 227 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 32
 228
 229 /* The maximum number of bytes per constant buffer.
 230  */
 231 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE  (4096 * sizeof(float[4]))
 232
 233 /* The maximum number of vertices per primitive */
 234 #define TGSI_MAX_PRIM_VERTICES 6
 235
 236 /* The maximum number of primitives to be generated */
 237 #define TGSI_MAX_PRIMITIVES 64
 238
 239 /* The maximum total number of vertices */
 240 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
 241
 242 #define TGSI_MAX_MISC_INPUTS 8
 243
 244 /** function call/activation record */
 245 struct tgsi_call_record
 246 {
 247    uint CondStackTop;
 248    uint LoopStackTop;
 249    uint ContStackTop;
 250    int SwitchStackTop;
 251    int BreakStackTop;
 252    uint ReturnAddr;
 253 };
 254
 255
 256 /* Switch-case block state. */
 257 struct tgsi_switch_record {
 258    uint mask;                          /**< execution mask */
 259    union tgsi_exec_channel selector;   /**< a value case statements are compared to */
 260    uint defaultMask;                   /**< non-execute mask for default case */
 261 };
 262
 263
 264 enum tgsi_break_type {
 265    TGSI_EXEC_BREAK_INSIDE_LOOP,
 266    TGSI_EXEC_BREAK_INSIDE_SWITCH
 267 };
 268
 269
 270 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
 271
 272
 273 /**
 274  * Run-time virtual machine state for executing TGSI shader.
 275  */
 276 struct tgsi_exec_machine
 277 {
 278    /* Total = program temporaries + internal temporaries
 279     */
 280    struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
 281                                        TGSI_EXEC_NUM_TEMP_EXTRAS];
 282
 283    float                         Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
 284
 285    float                         ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
 286
 287    struct tgsi_exec_vector       *Inputs;
 288    struct tgsi_exec_vector       *Outputs;
 289
 290    /* System values */
 291    unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
 292    union tgsi_exec_channel       SystemValue[TGSI_MAX_MISC_INPUTS];
 293
 294    struct tgsi_exec_vector       *Addrs;
 295    struct tgsi_exec_vector       *Predicates;
 296
 297    struct tgsi_sampler           *Sampler;
 298
 299    unsigned                      ImmLimit;
 300
 301    const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
 302    unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
 303
 304    const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
 305    unsigned                      Processor; /**< TGSI_PROCESSOR_x */
 306
 307    /* GEOMETRY processor only. */
 308    unsigned                      *Primitives;
 309    unsigned                       NumOutputs;
 310    unsigned                       MaxGeometryShaderOutputs;
 311    unsigned                       MaxOutputVertices;
 312
 313    /* FRAGMENT processor only. */
 314    const struct tgsi_interp_coef *InterpCoefs;
 315    struct tgsi_exec_vector       QuadPos;
 316    float                         Face;    /**< +1 if front facing, -1 if back facing */
 317    bool                          flatshade_color;
 318    /* Conditional execution masks */
 319    uint CondMask;  /**< For IF/ELSE/ENDIF */
 320    uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
 321    uint ContMask;  /**< For loop CONT statements */
 322    uint FuncMask;  /**< For function calls */
 323    uint ExecMask;  /**< = CondMask & LoopMask */
 324
 325    /* Current switch-case state. */
 326    struct tgsi_switch_record Switch;
 327
 328    /* Current break type. */
 329    enum tgsi_break_type BreakType;
 330
 331    /** Condition mask stack (for nested conditionals) */
 332    uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
 333    int CondStackTop;
 334
 335    /** Loop mask stack (for nested loops) */
 336    uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
 337    int LoopStackTop;
 338
 339    /** Loop label stack */
 340    uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
 341    int LoopLabelStackTop;
 342
 343    /** Loop continue mask stack (see comments in tgsi_exec.c) */
 344    uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
 345    int ContStackTop;
 346
 347    /** Switch case stack */
 348    struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
 349    int SwitchStackTop;
 350
 351    enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
 352    int BreakStackTop;
 353
 354    /** Function execution mask stack (for executing subroutine code) */
 355    uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
 356    int FuncStackTop;
 357
 358    /** Function call stack for saving/restoring the program counter */
 359    struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
 360    int CallStackTop;
 361
 362    struct tgsi_full_instruction *Instructions;
 363    uint NumInstructions;
 364
 365    struct tgsi_full_declaration *Declarations;
 366    uint NumDeclarations;
 367
 368    struct tgsi_declaration_sampler_view
 369       SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
 370
 371    boolean UsedGeometryShader;
 372 };
 373
 374 struct tgsi_exec_machine *
 375 tgsi_exec_machine_create( void );
 376
 377 void
 378 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
 379
 380
 381 void
 382 tgsi_exec_machine_bind_shader(
 383    struct tgsi_exec_machine *mach,
 384    const struct tgsi_token *tokens,
 385    struct tgsi_sampler *sampler);
 386
 387 uint
 388 tgsi_exec_machine_run(
 389    struct tgsi_exec_machine *mach );
 390
 391
 392 void
 393 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
 394
 395
 396 boolean
 397 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
 398
 399
 400 static inline void
 401 tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask)
 402 {
 403    mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] =
 404       mask;
 405 }
 406
 407
 408 /** Set execution mask values prior to executing the shader */
 409 static inline void
 410 tgsi_set_exec_mask(struct tgsi_exec_machine *mach,
 411                    boolean ch0, boolean ch1, boolean ch2, boolean ch3)
 412 {
 413    int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i;
 414    mask[0] = ch0 ? ~0 : 0;
 415    mask[1] = ch1 ? ~0 : 0;
 416    mask[2] = ch2 ? ~0 : 0;
 417    mask[3] = ch3 ? ~0 : 0;
 418 }
 419
 420
 421 extern void
 422 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
 423                                unsigned num_bufs,
 424                                const void **bufs,
 425                                const unsigned *buf_sizes);
 426
 427
 428 static inline int
 429 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
 430 {
 431    switch(param) {
 432    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 433    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 434    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 435    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 436       return INT_MAX;
 437    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 438       return TGSI_EXEC_MAX_NESTING;
 439    case PIPE_SHADER_CAP_MAX_INPUTS:
 440       return TGSI_EXEC_MAX_INPUT_ATTRIBS;
 441    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 442       return 32;
 443    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 444       return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
 445    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 446       return PIPE_MAX_CONSTANT_BUFFERS;
 447    case PIPE_SHADER_CAP_MAX_TEMPS:
 448       return TGSI_EXEC_NUM_TEMPS;
 449    case PIPE_SHADER_CAP_MAX_PREDS:
 450       return TGSI_EXEC_NUM_PREDS;
 451    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 452       return 1;
 453    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 454    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 455    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 456    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 457       return 1;
 458    case PIPE_SHADER_CAP_SUBROUTINES:
 459       return 1;
 460    case PIPE_SHADER_CAP_INTEGERS:
 461       return 1;
 462    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 463       return PIPE_MAX_SAMPLERS;
 464    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 465       return PIPE_MAX_SHADER_SAMPLER_VIEWS;
 466    case PIPE_SHADER_CAP_PREFERRED_IR:
 467       return PIPE_SHADER_IR_TGSI;
 468    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 469       return 1;
 470    case PIPE_SHADER_CAP_DOUBLES:
 471    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 472    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 473       return 1;
 474    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 475    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 476    case PIPE_SHADER_CAP_MAX_SHADER_BUFFERS:
 477       return 0;
 478    case PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT:
 479       return 32;
 480    }
 481    /* if we get here, we missed a shader cap above (and should have seen
 482     * a compiler warning.)
 483     */
 484    return 0;
 485 }
 486
 487 #if defined __cplusplus
 488 } /* extern "C" */
 489 #endif
 490
 491 #endif /* TGSI_EXEC_H */