1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
36 #if defined __cplusplus
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
63 * Registers may be treated as float, signed int or unsigned int.
65 union tgsi_exec_channel
67 float f
[TGSI_QUAD_SIZE
];
68 int i
[TGSI_QUAD_SIZE
];
69 unsigned u
[TGSI_QUAD_SIZE
];
73 * A vector[RGBA] of channels[4 pixels]
75 struct tgsi_exec_vector
77 union tgsi_exec_channel xyzw
[TGSI_NUM_CHANNELS
];
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
84 struct tgsi_interp_coef
86 float a0
[TGSI_NUM_CHANNELS
]; /* in an xyzw layout */
87 float dadx
[TGSI_NUM_CHANNELS
];
88 float dady
[TGSI_NUM_CHANNELS
];
91 enum tgsi_sampler_control
{
92 tgsi_sampler_lod_bias
,
93 tgsi_sampler_lod_explicit
97 * Information for sampling textures, which must be implemented
98 * by code outside the TGSI executor.
102 /** Get samples for four fragments in a quad */
103 /* this interface contains 5 sets of channels that vary
104 * depending on the sampler.
105 * s - the first texture coordinate for sampling.
106 * t - the second texture coordinate for sampling - unused for 1D,
108 * p - the third coordinate for sampling for 3D, cube, cube arrays,
109 * layer for 2D arrays. Compare value for 1D/2D shadows.
110 * c0 - lod value for lod variants, compare value for shadow cube
111 * and shadow 2d arrays.
112 * c1 - cube array only - lod for cube map arrays
113 * compare for shadow cube map arrays.
115 void (*get_samples
)(struct tgsi_sampler
*sampler
,
116 const float s
[TGSI_QUAD_SIZE
],
117 const float t
[TGSI_QUAD_SIZE
],
118 const float p
[TGSI_QUAD_SIZE
],
119 const float c0
[TGSI_QUAD_SIZE
],
120 const float c1
[TGSI_QUAD_SIZE
],
121 enum tgsi_sampler_control control
,
122 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
123 void (*get_dims
)(struct tgsi_sampler
*sampler
, int level
,
125 void (*get_texel
)(struct tgsi_sampler
*sampler
, const int i
[TGSI_QUAD_SIZE
],
126 const int j
[TGSI_QUAD_SIZE
], const int k
[TGSI_QUAD_SIZE
],
127 const int lod
[TGSI_QUAD_SIZE
], const int8_t offset
[3],
128 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
131 #define TGSI_EXEC_NUM_TEMPS 4096
132 #define TGSI_EXEC_NUM_IMMEDIATES 256
133 #define TGSI_EXEC_NUM_TEMP_ARRAYS 8
136 * Locations of various utility registers (_I = Index, _C = Channel)
138 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
139 #define TGSI_EXEC_TEMP_00000000_C 0
141 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
142 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
144 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
145 #define TGSI_EXEC_TEMP_80000000_C 2
147 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
148 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
150 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
151 #define TGSI_EXEC_TEMP_ONE_C 0
153 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
154 #define TGSI_EXEC_TEMP_TWO_C 1
156 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
157 #define TGSI_EXEC_TEMP_128_C 2
159 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
160 #define TGSI_EXEC_TEMP_MINUS_128_C 3
162 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
163 #define TGSI_EXEC_TEMP_KILMASK_C 0
165 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
166 #define TGSI_EXEC_TEMP_OUTPUT_C 1
168 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
169 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
171 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
172 #define TGSI_EXEC_TEMP_THREE_C 3
174 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
175 #define TGSI_EXEC_TEMP_HALF_C 0
177 /* execution mask, each value is either 0 or ~0 */
178 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
179 #define TGSI_EXEC_MASK_C 1
181 /* 4 register buffer for various purposes */
182 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
183 #define TGSI_EXEC_NUM_TEMP_R 4
185 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
186 #define TGSI_EXEC_NUM_ADDRS 1
188 /* predicate register */
189 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
190 #define TGSI_EXEC_NUM_PREDS 1
192 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10
196 #define TGSI_EXEC_MAX_NESTING 32
197 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
198 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
199 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
200 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
202 /* The maximum number of input attributes per vertex. For 2D
203 * input register files, this is the stride between two 1D
206 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 17
208 /* The maximum number of constant vectors per constant buffer.
210 #define TGSI_EXEC_MAX_CONST_BUFFER 4096
212 /* The maximum number of vertices per primitive */
213 #define TGSI_MAX_PRIM_VERTICES 6
215 /* The maximum number of primitives to be generated */
216 #define TGSI_MAX_PRIMITIVES 64
218 /* The maximum total number of vertices */
219 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
221 #define TGSI_MAX_MISC_INPUTS 8
223 /** function call/activation record */
224 struct tgsi_call_record
235 /* Switch-case block state. */
236 struct tgsi_switch_record
{
237 uint mask
; /**< execution mask */
238 union tgsi_exec_channel selector
; /**< a value case statements are compared to */
239 uint defaultMask
; /**< non-execute mask for default case */
243 enum tgsi_break_type
{
244 TGSI_EXEC_BREAK_INSIDE_LOOP
,
245 TGSI_EXEC_BREAK_INSIDE_SWITCH
249 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
253 * Run-time virtual machine state for executing TGSI shader.
255 struct tgsi_exec_machine
257 /* Total = program temporaries + internal temporaries
259 struct tgsi_exec_vector Temps
[TGSI_EXEC_NUM_TEMPS
+
260 TGSI_EXEC_NUM_TEMP_EXTRAS
];
261 struct tgsi_exec_vector TempArray
[TGSI_EXEC_NUM_TEMP_ARRAYS
][TGSI_EXEC_NUM_TEMPS
];
263 float Imms
[TGSI_EXEC_NUM_IMMEDIATES
][4];
265 float ImmArray
[TGSI_EXEC_NUM_IMMEDIATES
][4];
267 struct tgsi_exec_vector
*Inputs
;
268 struct tgsi_exec_vector
*Outputs
;
271 unsigned SysSemanticToIndex
[TGSI_SEMANTIC_COUNT
];
272 union tgsi_exec_channel SystemValue
[TGSI_MAX_MISC_INPUTS
];
274 struct tgsi_exec_vector
*Addrs
;
275 struct tgsi_exec_vector
*Predicates
;
277 struct tgsi_sampler
**Samplers
;
281 const void *Consts
[PIPE_MAX_CONSTANT_BUFFERS
];
282 unsigned ConstsSize
[PIPE_MAX_CONSTANT_BUFFERS
];
284 const struct tgsi_token
*Tokens
; /**< Declarations, instructions */
285 unsigned Processor
; /**< TGSI_PROCESSOR_x */
287 /* GEOMETRY processor only. */
288 unsigned *Primitives
;
290 unsigned MaxGeometryShaderOutputs
;
292 /* FRAGMENT processor only. */
293 const struct tgsi_interp_coef
*InterpCoefs
;
294 struct tgsi_exec_vector QuadPos
;
295 float Face
; /**< +1 if front facing, -1 if back facing */
296 bool flatshade_color
;
297 /* Conditional execution masks */
298 uint CondMask
; /**< For IF/ELSE/ENDIF */
299 uint LoopMask
; /**< For BGNLOOP/ENDLOOP */
300 uint ContMask
; /**< For loop CONT statements */
301 uint FuncMask
; /**< For function calls */
302 uint ExecMask
; /**< = CondMask & LoopMask */
304 /* Current switch-case state. */
305 struct tgsi_switch_record Switch
;
307 /* Current break type. */
308 enum tgsi_break_type BreakType
;
310 /** Condition mask stack (for nested conditionals) */
311 uint CondStack
[TGSI_EXEC_MAX_COND_NESTING
];
314 /** Loop mask stack (for nested loops) */
315 uint LoopStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
318 /** Loop label stack */
319 uint LoopLabelStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
320 int LoopLabelStackTop
;
322 /** Loop continue mask stack (see comments in tgsi_exec.c) */
323 uint ContStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
326 /** Switch case stack */
327 struct tgsi_switch_record SwitchStack
[TGSI_EXEC_MAX_SWITCH_NESTING
];
330 enum tgsi_break_type BreakStack
[TGSI_EXEC_MAX_BREAK_STACK
];
333 /** Function execution mask stack (for executing subroutine code) */
334 uint FuncStack
[TGSI_EXEC_MAX_CALL_NESTING
];
337 /** Function call stack for saving/restoring the program counter */
338 struct tgsi_call_record CallStack
[TGSI_EXEC_MAX_CALL_NESTING
];
341 struct tgsi_full_instruction
*Instructions
;
342 uint NumInstructions
;
344 struct tgsi_full_declaration
*Declarations
;
345 uint NumDeclarations
;
347 struct tgsi_declaration_sampler_view
348 SamplerViews
[PIPE_MAX_SHADER_SAMPLER_VIEWS
];
350 boolean UsedGeometryShader
;
353 struct tgsi_exec_machine
*
354 tgsi_exec_machine_create( void );
357 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
);
361 tgsi_exec_machine_bind_shader(
362 struct tgsi_exec_machine
*mach
,
363 const struct tgsi_token
*tokens
,
365 struct tgsi_sampler
**samplers
);
368 tgsi_exec_machine_run(
369 struct tgsi_exec_machine
*mach
);
373 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
);
377 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
);
381 tgsi_set_kill_mask(struct tgsi_exec_machine
*mach
, unsigned mask
)
383 mach
->Temps
[TGSI_EXEC_TEMP_KILMASK_I
].xyzw
[TGSI_EXEC_TEMP_KILMASK_C
].u
[0] =
388 /** Set execution mask values prior to executing the shader */
390 tgsi_set_exec_mask(struct tgsi_exec_machine
*mach
,
391 boolean ch0
, boolean ch1
, boolean ch2
, boolean ch3
)
393 int *mask
= mach
->Temps
[TGSI_EXEC_MASK_I
].xyzw
[TGSI_EXEC_MASK_C
].i
;
394 mask
[0] = ch0
? ~0 : 0;
395 mask
[1] = ch1
? ~0 : 0;
396 mask
[2] = ch2
? ~0 : 0;
397 mask
[3] = ch3
? ~0 : 0;
402 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine
*mach
,
405 const unsigned *buf_sizes
);
409 tgsi_exec_get_shader_param(enum pipe_shader_cap param
)
412 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
413 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
414 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
415 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
417 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
418 return TGSI_EXEC_MAX_NESTING
;
419 case PIPE_SHADER_CAP_MAX_INPUTS
:
420 return TGSI_EXEC_MAX_INPUT_ATTRIBS
;
421 case PIPE_SHADER_CAP_MAX_CONSTS
:
422 return TGSI_EXEC_MAX_CONST_BUFFER
;
423 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
424 return PIPE_MAX_CONSTANT_BUFFERS
;
425 case PIPE_SHADER_CAP_MAX_TEMPS
:
426 return TGSI_EXEC_NUM_TEMPS
;
427 case PIPE_SHADER_CAP_MAX_ADDRS
:
428 return TGSI_EXEC_NUM_ADDRS
;
429 case PIPE_SHADER_CAP_MAX_PREDS
:
430 return TGSI_EXEC_NUM_PREDS
;
431 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
433 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
434 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
435 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
436 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
438 case PIPE_SHADER_CAP_SUBROUTINES
:
440 case PIPE_SHADER_CAP_INTEGERS
:
442 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
443 return PIPE_MAX_SAMPLERS
;
444 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED
:
451 #if defined __cplusplus
455 #endif /* TGSI_EXEC_H */