src/gallium/auxiliary/tgsi/tgsi_exec.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007-2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2009-2010 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 #ifndef TGSI_EXEC_H
  30 #define TGSI_EXEC_H
  31
  32 #include "pipe/p_compiler.h"
  33 #include "pipe/p_state.h"
  34 #include "pipe/p_shader_tokens.h"
  35
  36 #if defined __cplusplus
  37 extern "C" {
  38 #endif
  39
  40 #define TGSI_CHAN_X 0
  41 #define TGSI_CHAN_Y 1
  42 #define TGSI_CHAN_Z 2
  43 #define TGSI_CHAN_W 3
  44
  45 #define TGSI_NUM_CHANNELS 4  /* R,G,B,A */
  46 #define TGSI_QUAD_SIZE    4  /* 4 pixel/quad */
  47
  48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
  49    for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
  50
  51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  52    ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
  53
  54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  55    if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
  56
  57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
  58    TGSI_FOR_EACH_CHANNEL( CHAN )\
  59       TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
  60
  61
  62 /**
  63   * Registers may be treated as float, signed int or unsigned int.
  64   */
  65 union tgsi_exec_channel
  66 {
  67    float    f[TGSI_QUAD_SIZE];
  68    int      i[TGSI_QUAD_SIZE];
  69    unsigned u[TGSI_QUAD_SIZE];
  70 };
  71
  72 /**
  73   * A vector[RGBA] of channels[4 pixels]
  74   */
  75 struct tgsi_exec_vector
  76 {
  77    union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
  78 };
  79
  80 /**
  81  * For fragment programs, information for computing fragment input
  82  * values from plane equation of the triangle/line.
  83  */
  84 struct tgsi_interp_coef
  85 {
  86    float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
  87    float dadx[TGSI_NUM_CHANNELS];
  88    float dady[TGSI_NUM_CHANNELS];
  89 };
  90
  91 enum tgsi_sampler_control {
  92    tgsi_sampler_lod_none,
  93    tgsi_sampler_lod_bias,
  94    tgsi_sampler_lod_explicit,
  95    tgsi_sampler_lod_zero,
  96    tgsi_sampler_derivs_explicit,
  97    tgsi_sampler_gather,
  98 };
  99
 100 /**
 101  * Information for sampling textures, which must be implemented
 102  * by code outside the TGSI executor.
 103  */
 104 struct tgsi_sampler
 105 {
 106    /** Get samples for four fragments in a quad */
 107    /* this interface contains 5 sets of channels that vary
 108     * depending on the sampler.
 109     * s - the first texture coordinate for sampling.
 110     * t - the second texture coordinate for sampling - unused for 1D,
 111           layer for 1D arrays.
 112     * r - the third coordinate for sampling for 3D, cube, cube arrays,
 113     *     layer for 2D arrays. Compare value for 1D/2D shadows.
 114     * c0 - Compare value for shadow cube and shadow 2d arrays,
 115     *      layer for cube arrays.
 116     * derivs - explicit derivatives.
 117     * offset - texel offsets
 118     * lod - lod value, except for shadow cube arrays (compare value there).
 119     */
 120    void (*get_samples)(struct tgsi_sampler *sampler,
 121                        const unsigned sview_index,
 122                        const unsigned sampler_index,
 123                        const float s[TGSI_QUAD_SIZE],
 124                        const float t[TGSI_QUAD_SIZE],
 125                        const float r[TGSI_QUAD_SIZE],
 126                        const float c0[TGSI_QUAD_SIZE],
 127                        const float c1[TGSI_QUAD_SIZE],
 128                        float derivs[3][2][TGSI_QUAD_SIZE],
 129                        const int8_t offset[3],
 130                        enum tgsi_sampler_control control,
 131                        float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 132    void (*get_dims)(struct tgsi_sampler *sampler,
 133                     const unsigned sview_index,
 134                     int level, int dims[4]);
 135    void (*get_texel)(struct tgsi_sampler *sampler,
 136                      const unsigned sview_index,
 137                      const int i[TGSI_QUAD_SIZE],
 138                      const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
 139                      const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
 140                      float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
 141 };
 142
 143 #define TGSI_EXEC_NUM_TEMPS       4096
 144 #define TGSI_EXEC_NUM_IMMEDIATES  256
 145
 146 /*
 147  * Locations of various utility registers (_I = Index, _C = Channel)
 148  */
 149 #define TGSI_EXEC_TEMP_00000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 150 #define TGSI_EXEC_TEMP_00000000_C   0
 151
 152 #define TGSI_EXEC_TEMP_7FFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 153 #define TGSI_EXEC_TEMP_7FFFFFFF_C   1
 154
 155 #define TGSI_EXEC_TEMP_80000000_I   (TGSI_EXEC_NUM_TEMPS + 0)
 156 #define TGSI_EXEC_TEMP_80000000_C   2
 157
 158 #define TGSI_EXEC_TEMP_FFFFFFFF_I   (TGSI_EXEC_NUM_TEMPS + 0)
 159 #define TGSI_EXEC_TEMP_FFFFFFFF_C   3
 160
 161 #define TGSI_EXEC_TEMP_ONE_I        (TGSI_EXEC_NUM_TEMPS + 1)
 162 #define TGSI_EXEC_TEMP_ONE_C        0
 163
 164 #define TGSI_EXEC_TEMP_TWO_I        (TGSI_EXEC_NUM_TEMPS + 1)
 165 #define TGSI_EXEC_TEMP_TWO_C        1
 166
 167 #define TGSI_EXEC_TEMP_128_I        (TGSI_EXEC_NUM_TEMPS + 1)
 168 #define TGSI_EXEC_TEMP_128_C        2
 169
 170 #define TGSI_EXEC_TEMP_MINUS_128_I  (TGSI_EXEC_NUM_TEMPS + 1)
 171 #define TGSI_EXEC_TEMP_MINUS_128_C  3
 172
 173 #define TGSI_EXEC_TEMP_KILMASK_I    (TGSI_EXEC_NUM_TEMPS + 2)
 174 #define TGSI_EXEC_TEMP_KILMASK_C    0
 175
 176 #define TGSI_EXEC_TEMP_OUTPUT_I     (TGSI_EXEC_NUM_TEMPS + 2)
 177 #define TGSI_EXEC_TEMP_OUTPUT_C     1
 178
 179 #define TGSI_EXEC_TEMP_PRIMITIVE_I  (TGSI_EXEC_NUM_TEMPS + 2)
 180 #define TGSI_EXEC_TEMP_PRIMITIVE_C  2
 181
 182 #define TGSI_EXEC_TEMP_THREE_I      (TGSI_EXEC_NUM_TEMPS + 2)
 183 #define TGSI_EXEC_TEMP_THREE_C      3
 184
 185 #define TGSI_EXEC_TEMP_HALF_I       (TGSI_EXEC_NUM_TEMPS + 3)
 186 #define TGSI_EXEC_TEMP_HALF_C       0
 187
 188 /* execution mask, each value is either 0 or ~0 */
 189 #define TGSI_EXEC_MASK_I            (TGSI_EXEC_NUM_TEMPS + 3)
 190 #define TGSI_EXEC_MASK_C            1
 191
 192 /* 4 register buffer for various purposes */
 193 #define TGSI_EXEC_TEMP_R0           (TGSI_EXEC_NUM_TEMPS + 4)
 194 #define TGSI_EXEC_NUM_TEMP_R        4
 195
 196 #define TGSI_EXEC_TEMP_ADDR         (TGSI_EXEC_NUM_TEMPS + 8)
 197
 198 /* predicate register */
 199 #define TGSI_EXEC_TEMP_P0           (TGSI_EXEC_NUM_TEMPS + 9)
 200 #define TGSI_EXEC_NUM_PREDS         1
 201
 202 #define TGSI_EXEC_NUM_TEMP_EXTRAS   10
 203
 204
 205
 206 #define TGSI_EXEC_MAX_NESTING  32
 207 #define TGSI_EXEC_MAX_COND_NESTING  TGSI_EXEC_MAX_NESTING
 208 #define TGSI_EXEC_MAX_LOOP_NESTING  TGSI_EXEC_MAX_NESTING
 209 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
 210 #define TGSI_EXEC_MAX_CALL_NESTING  TGSI_EXEC_MAX_NESTING
 211
 212 /* The maximum number of input attributes per vertex. For 2D
 213  * input register files, this is the stride between two 1D
 214  * arrays.
 215  */
 216 #define TGSI_EXEC_MAX_INPUT_ATTRIBS PIPE_MAX_SHADER_INPUTS
 217
 218 /* The maximum number of bytes per constant buffer.
 219  */
 220 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE  (4096 * sizeof(float[4]))
 221
 222 /* The maximum number of vertices per primitive */
 223 #define TGSI_MAX_PRIM_VERTICES 6
 224
 225 /* The maximum number of primitives to be generated */
 226 #define TGSI_MAX_PRIMITIVES 64
 227
 228 /* The maximum total number of vertices */
 229 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
 230
 231 #define TGSI_MAX_MISC_INPUTS 8
 232
 233 /** function call/activation record */
 234 struct tgsi_call_record
 235 {
 236    uint CondStackTop;
 237    uint LoopStackTop;
 238    uint ContStackTop;
 239    int SwitchStackTop;
 240    int BreakStackTop;
 241    uint ReturnAddr;
 242 };
 243
 244
 245 /* Switch-case block state. */
 246 struct tgsi_switch_record {
 247    uint mask;                          /**< execution mask */
 248    union tgsi_exec_channel selector;   /**< a value case statements are compared to */
 249    uint defaultMask;                   /**< non-execute mask for default case */
 250 };
 251
 252
 253 enum tgsi_break_type {
 254    TGSI_EXEC_BREAK_INSIDE_LOOP,
 255    TGSI_EXEC_BREAK_INSIDE_SWITCH
 256 };
 257
 258
 259 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
 260
 261
 262 /**
 263  * Run-time virtual machine state for executing TGSI shader.
 264  */
 265 struct tgsi_exec_machine
 266 {
 267    /* Total = program temporaries + internal temporaries
 268     */
 269    struct tgsi_exec_vector       Temps[TGSI_EXEC_NUM_TEMPS +
 270                                        TGSI_EXEC_NUM_TEMP_EXTRAS];
 271
 272    float                         Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
 273
 274    float                         ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
 275
 276    struct tgsi_exec_vector       *Inputs;
 277    struct tgsi_exec_vector       *Outputs;
 278
 279    /* System values */
 280    unsigned                      SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
 281    union tgsi_exec_channel       SystemValue[TGSI_MAX_MISC_INPUTS];
 282
 283    struct tgsi_exec_vector       *Addrs;
 284    struct tgsi_exec_vector       *Predicates;
 285
 286    struct tgsi_sampler           *Sampler;
 287
 288    unsigned                      ImmLimit;
 289
 290    const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
 291    unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
 292
 293    const struct tgsi_token       *Tokens;   /**< Declarations, instructions */
 294    unsigned                      Processor; /**< TGSI_PROCESSOR_x */
 295
 296    /* GEOMETRY processor only. */
 297    unsigned                      *Primitives;
 298    unsigned                       NumOutputs;
 299    unsigned                       MaxGeometryShaderOutputs;
 300    unsigned                       MaxOutputVertices;
 301
 302    /* FRAGMENT processor only. */
 303    const struct tgsi_interp_coef *InterpCoefs;
 304    struct tgsi_exec_vector       QuadPos;
 305    float                         Face;    /**< +1 if front facing, -1 if back facing */
 306    bool                          flatshade_color;
 307    /* Conditional execution masks */
 308    uint CondMask;  /**< For IF/ELSE/ENDIF */
 309    uint LoopMask;  /**< For BGNLOOP/ENDLOOP */
 310    uint ContMask;  /**< For loop CONT statements */
 311    uint FuncMask;  /**< For function calls */
 312    uint ExecMask;  /**< = CondMask & LoopMask */
 313
 314    /* Current switch-case state. */
 315    struct tgsi_switch_record Switch;
 316
 317    /* Current break type. */
 318    enum tgsi_break_type BreakType;
 319
 320    /** Condition mask stack (for nested conditionals) */
 321    uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
 322    int CondStackTop;
 323
 324    /** Loop mask stack (for nested loops) */
 325    uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
 326    int LoopStackTop;
 327
 328    /** Loop label stack */
 329    uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
 330    int LoopLabelStackTop;
 331
 332    /** Loop continue mask stack (see comments in tgsi_exec.c) */
 333    uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
 334    int ContStackTop;
 335
 336    /** Switch case stack */
 337    struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
 338    int SwitchStackTop;
 339
 340    enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
 341    int BreakStackTop;
 342
 343    /** Function execution mask stack (for executing subroutine code) */
 344    uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
 345    int FuncStackTop;
 346
 347    /** Function call stack for saving/restoring the program counter */
 348    struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
 349    int CallStackTop;
 350
 351    struct tgsi_full_instruction *Instructions;
 352    uint NumInstructions;
 353
 354    struct tgsi_full_declaration *Declarations;
 355    uint NumDeclarations;
 356
 357    struct tgsi_declaration_sampler_view
 358       SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
 359
 360    boolean UsedGeometryShader;
 361 };
 362
 363 struct tgsi_exec_machine *
 364 tgsi_exec_machine_create( void );
 365
 366 void
 367 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
 368
 369
 370 void
 371 tgsi_exec_machine_bind_shader(
 372    struct tgsi_exec_machine *mach,
 373    const struct tgsi_token *tokens,
 374    struct tgsi_sampler *sampler);
 375
 376 uint
 377 tgsi_exec_machine_run(
 378    struct tgsi_exec_machine *mach );
 379
 380
 381 void
 382 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
 383
 384
 385 boolean
 386 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
 387
 388
 389 static INLINE void
 390 tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask)
 391 {
 392    mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] =
 393       mask;
 394 }
 395
 396
 397 /** Set execution mask values prior to executing the shader */
 398 static INLINE void
 399 tgsi_set_exec_mask(struct tgsi_exec_machine *mach,
 400                    boolean ch0, boolean ch1, boolean ch2, boolean ch3)
 401 {
 402    int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i;
 403    mask[0] = ch0 ? ~0 : 0;
 404    mask[1] = ch1 ? ~0 : 0;
 405    mask[2] = ch2 ? ~0 : 0;
 406    mask[3] = ch3 ? ~0 : 0;
 407 }
 408
 409
 410 extern void
 411 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
 412                                unsigned num_bufs,
 413                                const void **bufs,
 414                                const unsigned *buf_sizes);
 415
 416
 417 static INLINE int
 418 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
 419 {
 420    switch(param) {
 421    case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
 422    case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
 423    case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
 424    case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
 425       return INT_MAX;
 426    case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
 427       return TGSI_EXEC_MAX_NESTING;
 428    case PIPE_SHADER_CAP_MAX_INPUTS:
 429       return TGSI_EXEC_MAX_INPUT_ATTRIBS;
 430    case PIPE_SHADER_CAP_MAX_OUTPUTS:
 431       return 32;
 432    case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
 433       return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
 434    case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
 435       return PIPE_MAX_CONSTANT_BUFFERS;
 436    case PIPE_SHADER_CAP_MAX_TEMPS:
 437       return TGSI_EXEC_NUM_TEMPS;
 438    case PIPE_SHADER_CAP_MAX_PREDS:
 439       return TGSI_EXEC_NUM_PREDS;
 440    case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
 441       return 1;
 442    case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
 443    case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
 444    case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
 445    case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
 446       return 1;
 447    case PIPE_SHADER_CAP_SUBROUTINES:
 448       return 1;
 449    case PIPE_SHADER_CAP_INTEGERS:
 450       return 1;
 451    case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
 452       return PIPE_MAX_SAMPLERS;
 453    case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
 454       return PIPE_MAX_SHADER_SAMPLER_VIEWS;
 455    case PIPE_SHADER_CAP_PREFERRED_IR:
 456       return PIPE_SHADER_IR_TGSI;
 457    case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
 458       return 1;
 459    case PIPE_SHADER_CAP_DOUBLES:
 460    case PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED:
 461    case PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE:
 462       return 1;
 463    case PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED:
 464    case PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED:
 465       return 0;
 466    }
 467    /* if we get here, we missed a shader cap above (and should have seen
 468     * a compiler warning.)
 469     */
 470    return 0;
 471 }
 472
 473 #if defined __cplusplus
 474 } /* extern "C" */
 475 #endif
 476
 477 #endif /* TGSI_EXEC_H */