1 /**************************************************************************
3 * Copyright 2007-2008 Tungsten Graphics, Inc., Cedar Park, Texas.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
36 #if defined __cplusplus
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
63 * Registers may be treated as float, signed int or unsigned int.
65 union tgsi_exec_channel
67 float f
[TGSI_QUAD_SIZE
];
68 int i
[TGSI_QUAD_SIZE
];
69 unsigned u
[TGSI_QUAD_SIZE
];
73 * A vector[RGBA] of channels[4 pixels]
75 struct tgsi_exec_vector
77 union tgsi_exec_channel xyzw
[TGSI_NUM_CHANNELS
];
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
84 struct tgsi_interp_coef
86 float a0
[TGSI_NUM_CHANNELS
]; /* in an xyzw layout */
87 float dadx
[TGSI_NUM_CHANNELS
];
88 float dady
[TGSI_NUM_CHANNELS
];
91 enum tgsi_sampler_control
{
92 tgsi_sampler_lod_bias
,
93 tgsi_sampler_lod_explicit
97 * Information for sampling textures, which must be implemented
98 * by code outside the TGSI executor.
102 /** Get samples for four fragments in a quad */
103 void (*get_samples
)(struct tgsi_sampler
*sampler
,
104 const float s
[TGSI_QUAD_SIZE
],
105 const float t
[TGSI_QUAD_SIZE
],
106 const float p
[TGSI_QUAD_SIZE
],
107 const float c0
[TGSI_QUAD_SIZE
],
108 enum tgsi_sampler_control control
,
109 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
110 void (*get_dims
)(struct tgsi_sampler
*sampler
, int level
,
112 void (*get_texel
)(struct tgsi_sampler
*sampler
, const int i
[TGSI_QUAD_SIZE
],
113 const int j
[TGSI_QUAD_SIZE
], const int k
[TGSI_QUAD_SIZE
],
114 const int lod
[TGSI_QUAD_SIZE
], const int8_t offset
[3],
115 float rgba
[TGSI_NUM_CHANNELS
][TGSI_QUAD_SIZE
]);
118 #define TGSI_EXEC_NUM_TEMPS 128
119 #define TGSI_EXEC_NUM_IMMEDIATES 256
120 #define TGSI_EXEC_NUM_TEMP_ARRAYS 8
123 * Locations of various utility registers (_I = Index, _C = Channel)
125 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
126 #define TGSI_EXEC_TEMP_00000000_C 0
128 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
129 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
131 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
132 #define TGSI_EXEC_TEMP_80000000_C 2
134 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
135 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
137 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
138 #define TGSI_EXEC_TEMP_ONE_C 0
140 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
141 #define TGSI_EXEC_TEMP_TWO_C 1
143 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
144 #define TGSI_EXEC_TEMP_128_C 2
146 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
147 #define TGSI_EXEC_TEMP_MINUS_128_C 3
149 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
150 #define TGSI_EXEC_TEMP_KILMASK_C 0
152 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
153 #define TGSI_EXEC_TEMP_OUTPUT_C 1
155 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
156 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
158 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
159 #define TGSI_EXEC_TEMP_THREE_C 3
161 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
162 #define TGSI_EXEC_TEMP_HALF_C 0
164 /* execution mask, each value is either 0 or ~0 */
165 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
166 #define TGSI_EXEC_MASK_C 1
168 /* 4 register buffer for various purposes */
169 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
170 #define TGSI_EXEC_NUM_TEMP_R 4
172 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
173 #define TGSI_EXEC_NUM_ADDRS 1
175 /* predicate register */
176 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
177 #define TGSI_EXEC_NUM_PREDS 1
179 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10
183 #define TGSI_EXEC_MAX_NESTING 32
184 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
185 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
186 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
187 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
189 /* The maximum number of input attributes per vertex. For 2D
190 * input register files, this is the stride between two 1D
193 #define TGSI_EXEC_MAX_INPUT_ATTRIBS 17
195 /* The maximum number of constant vectors per constant buffer.
197 #define TGSI_EXEC_MAX_CONST_BUFFER 4096
199 /* The maximum number of vertices per primitive */
200 #define TGSI_MAX_PRIM_VERTICES 6
202 /* The maximum number of primitives to be generated */
203 #define TGSI_MAX_PRIMITIVES 64
205 /* The maximum total number of vertices */
206 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
208 #define TGSI_MAX_MISC_INPUTS 8
210 /** function call/activation record */
211 struct tgsi_call_record
222 /* Switch-case block state. */
223 struct tgsi_switch_record
{
224 uint mask
; /**< execution mask */
225 union tgsi_exec_channel selector
; /**< a value case statements are compared to */
226 uint defaultMask
; /**< non-execute mask for default case */
230 enum tgsi_break_type
{
231 TGSI_EXEC_BREAK_INSIDE_LOOP
,
232 TGSI_EXEC_BREAK_INSIDE_SWITCH
236 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
240 * Run-time virtual machine state for executing TGSI shader.
242 struct tgsi_exec_machine
244 /* Total = program temporaries + internal temporaries
246 struct tgsi_exec_vector Temps
[TGSI_EXEC_NUM_TEMPS
+
247 TGSI_EXEC_NUM_TEMP_EXTRAS
];
248 struct tgsi_exec_vector TempArray
[TGSI_EXEC_NUM_TEMP_ARRAYS
][TGSI_EXEC_NUM_TEMPS
];
250 float Imms
[TGSI_EXEC_NUM_IMMEDIATES
][4];
252 float ImmArray
[TGSI_EXEC_NUM_IMMEDIATES
][4];
254 struct tgsi_exec_vector
*Inputs
;
255 struct tgsi_exec_vector
*Outputs
;
258 unsigned SysSemanticToIndex
[TGSI_SEMANTIC_COUNT
];
259 union tgsi_exec_channel SystemValue
[TGSI_MAX_MISC_INPUTS
];
261 struct tgsi_exec_vector
*Addrs
;
262 struct tgsi_exec_vector
*Predicates
;
264 struct tgsi_sampler
**Samplers
;
268 const void *Consts
[PIPE_MAX_CONSTANT_BUFFERS
];
269 unsigned ConstsSize
[PIPE_MAX_CONSTANT_BUFFERS
];
271 const struct tgsi_token
*Tokens
; /**< Declarations, instructions */
272 unsigned Processor
; /**< TGSI_PROCESSOR_x */
274 /* GEOMETRY processor only. */
275 unsigned *Primitives
;
277 unsigned MaxGeometryShaderOutputs
;
279 /* FRAGMENT processor only. */
280 const struct tgsi_interp_coef
*InterpCoefs
;
281 struct tgsi_exec_vector QuadPos
;
282 float Face
; /**< +1 if front facing, -1 if back facing */
283 bool flatshade_color
;
284 /* Conditional execution masks */
285 uint CondMask
; /**< For IF/ELSE/ENDIF */
286 uint LoopMask
; /**< For BGNLOOP/ENDLOOP */
287 uint ContMask
; /**< For loop CONT statements */
288 uint FuncMask
; /**< For function calls */
289 uint ExecMask
; /**< = CondMask & LoopMask */
291 /* Current switch-case state. */
292 struct tgsi_switch_record Switch
;
294 /* Current break type. */
295 enum tgsi_break_type BreakType
;
297 /** Condition mask stack (for nested conditionals) */
298 uint CondStack
[TGSI_EXEC_MAX_COND_NESTING
];
301 /** Loop mask stack (for nested loops) */
302 uint LoopStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
305 /** Loop label stack */
306 uint LoopLabelStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
307 int LoopLabelStackTop
;
309 /** Loop continue mask stack (see comments in tgsi_exec.c) */
310 uint ContStack
[TGSI_EXEC_MAX_LOOP_NESTING
];
313 /** Switch case stack */
314 struct tgsi_switch_record SwitchStack
[TGSI_EXEC_MAX_SWITCH_NESTING
];
317 enum tgsi_break_type BreakStack
[TGSI_EXEC_MAX_BREAK_STACK
];
320 /** Function execution mask stack (for executing subroutine code) */
321 uint FuncStack
[TGSI_EXEC_MAX_CALL_NESTING
];
324 /** Function call stack for saving/restoring the program counter */
325 struct tgsi_call_record CallStack
[TGSI_EXEC_MAX_CALL_NESTING
];
328 struct tgsi_full_instruction
*Instructions
;
329 uint NumInstructions
;
331 struct tgsi_full_declaration
*Declarations
;
332 uint NumDeclarations
;
334 struct tgsi_declaration_sampler_view
335 SamplerViews
[PIPE_MAX_SHADER_SAMPLER_VIEWS
];
337 boolean UsedGeometryShader
;
340 struct tgsi_exec_machine
*
341 tgsi_exec_machine_create( void );
344 tgsi_exec_machine_destroy(struct tgsi_exec_machine
*mach
);
348 tgsi_exec_machine_bind_shader(
349 struct tgsi_exec_machine
*mach
,
350 const struct tgsi_token
*tokens
,
352 struct tgsi_sampler
**samplers
);
355 tgsi_exec_machine_run(
356 struct tgsi_exec_machine
*mach
);
360 tgsi_exec_machine_free_data(struct tgsi_exec_machine
*mach
);
364 tgsi_check_soa_dependencies(const struct tgsi_full_instruction
*inst
);
368 tgsi_set_kill_mask(struct tgsi_exec_machine
*mach
, unsigned mask
)
370 mach
->Temps
[TGSI_EXEC_TEMP_KILMASK_I
].xyzw
[TGSI_EXEC_TEMP_KILMASK_C
].u
[0] =
375 /** Set execution mask values prior to executing the shader */
377 tgsi_set_exec_mask(struct tgsi_exec_machine
*mach
,
378 boolean ch0
, boolean ch1
, boolean ch2
, boolean ch3
)
380 int *mask
= mach
->Temps
[TGSI_EXEC_MASK_I
].xyzw
[TGSI_EXEC_MASK_C
].i
;
381 mask
[0] = ch0
? ~0 : 0;
382 mask
[1] = ch1
? ~0 : 0;
383 mask
[2] = ch2
? ~0 : 0;
384 mask
[3] = ch3
? ~0 : 0;
389 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine
*mach
,
392 const unsigned *buf_sizes
);
396 tgsi_exec_get_shader_param(enum pipe_shader_cap param
)
399 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS
:
400 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS
:
401 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS
:
402 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS
:
404 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH
:
405 return TGSI_EXEC_MAX_NESTING
;
406 case PIPE_SHADER_CAP_MAX_INPUTS
:
407 return TGSI_EXEC_MAX_INPUT_ATTRIBS
;
408 case PIPE_SHADER_CAP_MAX_CONSTS
:
409 return TGSI_EXEC_MAX_CONST_BUFFER
;
410 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS
:
411 return PIPE_MAX_CONSTANT_BUFFERS
;
412 case PIPE_SHADER_CAP_MAX_TEMPS
:
413 return TGSI_EXEC_NUM_TEMPS
;
414 case PIPE_SHADER_CAP_MAX_ADDRS
:
415 return TGSI_EXEC_NUM_ADDRS
;
416 case PIPE_SHADER_CAP_MAX_PREDS
:
417 return TGSI_EXEC_NUM_PREDS
;
418 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED
:
420 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR
:
421 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR
:
422 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR
:
423 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR
:
425 case PIPE_SHADER_CAP_SUBROUTINES
:
427 case PIPE_SHADER_CAP_INTEGERS
:
429 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS
:
430 return PIPE_MAX_SAMPLERS
;
436 #if defined __cplusplus
440 #endif /* TGSI_EXEC_H */