gallium: remove PIPE_SHADER_CAP_MAX_ADDRS
[mesa.git] / src / gallium / auxiliary / tgsi / tgsi_exec.h
1 /**************************************************************************
2 *
3 * Copyright 2007-2008 VMware, Inc.
4 * All Rights Reserved.
5 * Copyright 2009-2010 VMware, Inc. All rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
14 *
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
17 * of the Software.
18 *
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 *
27 **************************************************************************/
28
29 #ifndef TGSI_EXEC_H
30 #define TGSI_EXEC_H
31
32 #include "pipe/p_compiler.h"
33 #include "pipe/p_state.h"
34 #include "pipe/p_shader_tokens.h"
35
36 #if defined __cplusplus
37 extern "C" {
38 #endif
39
40 #define TGSI_CHAN_X 0
41 #define TGSI_CHAN_Y 1
42 #define TGSI_CHAN_Z 2
43 #define TGSI_CHAN_W 3
44
45 #define TGSI_NUM_CHANNELS 4 /* R,G,B,A */
46 #define TGSI_QUAD_SIZE 4 /* 4 pixel/quad */
47
48 #define TGSI_FOR_EACH_CHANNEL( CHAN )\
49 for (CHAN = 0; CHAN < TGSI_NUM_CHANNELS; CHAN++)
50
51 #define TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
52 ((INST)->Dst[0].Register.WriteMask & (1 << (CHAN)))
53
54 #define TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
55 if (TGSI_IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
56
57 #define TGSI_FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
58 TGSI_FOR_EACH_CHANNEL( CHAN )\
59 TGSI_IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
60
61
62 /**
63 * Registers may be treated as float, signed int or unsigned int.
64 */
65 union tgsi_exec_channel
66 {
67 float f[TGSI_QUAD_SIZE];
68 int i[TGSI_QUAD_SIZE];
69 unsigned u[TGSI_QUAD_SIZE];
70 };
71
72 /**
73 * A vector[RGBA] of channels[4 pixels]
74 */
75 struct tgsi_exec_vector
76 {
77 union tgsi_exec_channel xyzw[TGSI_NUM_CHANNELS];
78 };
79
80 /**
81 * For fragment programs, information for computing fragment input
82 * values from plane equation of the triangle/line.
83 */
84 struct tgsi_interp_coef
85 {
86 float a0[TGSI_NUM_CHANNELS]; /* in an xyzw layout */
87 float dadx[TGSI_NUM_CHANNELS];
88 float dady[TGSI_NUM_CHANNELS];
89 };
90
91 enum tgsi_sampler_control {
92 tgsi_sampler_lod_none,
93 tgsi_sampler_lod_bias,
94 tgsi_sampler_lod_explicit,
95 tgsi_sampler_lod_zero,
96 tgsi_sampler_derivs_explicit
97 };
98
99 /**
100 * Information for sampling textures, which must be implemented
101 * by code outside the TGSI executor.
102 */
103 struct tgsi_sampler
104 {
105 /** Get samples for four fragments in a quad */
106 /* this interface contains 5 sets of channels that vary
107 * depending on the sampler.
108 * s - the first texture coordinate for sampling.
109 * t - the second texture coordinate for sampling - unused for 1D,
110 layer for 1D arrays.
111 * r - the third coordinate for sampling for 3D, cube, cube arrays,
112 * layer for 2D arrays. Compare value for 1D/2D shadows.
113 * c0 - Compare value for shadow cube and shadow 2d arrays,
114 * layer for cube arrays.
115 * derivs - explicit derivatives.
116 * offset - texel offsets
117 * lod - lod value, except for shadow cube arrays (compare value there).
118 */
119 void (*get_samples)(struct tgsi_sampler *sampler,
120 const unsigned sview_index,
121 const unsigned sampler_index,
122 const float s[TGSI_QUAD_SIZE],
123 const float t[TGSI_QUAD_SIZE],
124 const float r[TGSI_QUAD_SIZE],
125 const float c0[TGSI_QUAD_SIZE],
126 const float c1[TGSI_QUAD_SIZE],
127 float derivs[3][2][TGSI_QUAD_SIZE],
128 const int8_t offset[3],
129 enum tgsi_sampler_control control,
130 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
131 void (*get_dims)(struct tgsi_sampler *sampler,
132 const unsigned sview_index,
133 int level, int dims[4]);
134 void (*get_texel)(struct tgsi_sampler *sampler,
135 const unsigned sview_index,
136 const int i[TGSI_QUAD_SIZE],
137 const int j[TGSI_QUAD_SIZE], const int k[TGSI_QUAD_SIZE],
138 const int lod[TGSI_QUAD_SIZE], const int8_t offset[3],
139 float rgba[TGSI_NUM_CHANNELS][TGSI_QUAD_SIZE]);
140 };
141
142 #define TGSI_EXEC_NUM_TEMPS 4096
143 #define TGSI_EXEC_NUM_IMMEDIATES 256
144
145 /*
146 * Locations of various utility registers (_I = Index, _C = Channel)
147 */
148 #define TGSI_EXEC_TEMP_00000000_I (TGSI_EXEC_NUM_TEMPS + 0)
149 #define TGSI_EXEC_TEMP_00000000_C 0
150
151 #define TGSI_EXEC_TEMP_7FFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
152 #define TGSI_EXEC_TEMP_7FFFFFFF_C 1
153
154 #define TGSI_EXEC_TEMP_80000000_I (TGSI_EXEC_NUM_TEMPS + 0)
155 #define TGSI_EXEC_TEMP_80000000_C 2
156
157 #define TGSI_EXEC_TEMP_FFFFFFFF_I (TGSI_EXEC_NUM_TEMPS + 0)
158 #define TGSI_EXEC_TEMP_FFFFFFFF_C 3
159
160 #define TGSI_EXEC_TEMP_ONE_I (TGSI_EXEC_NUM_TEMPS + 1)
161 #define TGSI_EXEC_TEMP_ONE_C 0
162
163 #define TGSI_EXEC_TEMP_TWO_I (TGSI_EXEC_NUM_TEMPS + 1)
164 #define TGSI_EXEC_TEMP_TWO_C 1
165
166 #define TGSI_EXEC_TEMP_128_I (TGSI_EXEC_NUM_TEMPS + 1)
167 #define TGSI_EXEC_TEMP_128_C 2
168
169 #define TGSI_EXEC_TEMP_MINUS_128_I (TGSI_EXEC_NUM_TEMPS + 1)
170 #define TGSI_EXEC_TEMP_MINUS_128_C 3
171
172 #define TGSI_EXEC_TEMP_KILMASK_I (TGSI_EXEC_NUM_TEMPS + 2)
173 #define TGSI_EXEC_TEMP_KILMASK_C 0
174
175 #define TGSI_EXEC_TEMP_OUTPUT_I (TGSI_EXEC_NUM_TEMPS + 2)
176 #define TGSI_EXEC_TEMP_OUTPUT_C 1
177
178 #define TGSI_EXEC_TEMP_PRIMITIVE_I (TGSI_EXEC_NUM_TEMPS + 2)
179 #define TGSI_EXEC_TEMP_PRIMITIVE_C 2
180
181 #define TGSI_EXEC_TEMP_THREE_I (TGSI_EXEC_NUM_TEMPS + 2)
182 #define TGSI_EXEC_TEMP_THREE_C 3
183
184 #define TGSI_EXEC_TEMP_HALF_I (TGSI_EXEC_NUM_TEMPS + 3)
185 #define TGSI_EXEC_TEMP_HALF_C 0
186
187 /* execution mask, each value is either 0 or ~0 */
188 #define TGSI_EXEC_MASK_I (TGSI_EXEC_NUM_TEMPS + 3)
189 #define TGSI_EXEC_MASK_C 1
190
191 /* 4 register buffer for various purposes */
192 #define TGSI_EXEC_TEMP_R0 (TGSI_EXEC_NUM_TEMPS + 4)
193 #define TGSI_EXEC_NUM_TEMP_R 4
194
195 #define TGSI_EXEC_TEMP_ADDR (TGSI_EXEC_NUM_TEMPS + 8)
196
197 /* predicate register */
198 #define TGSI_EXEC_TEMP_P0 (TGSI_EXEC_NUM_TEMPS + 9)
199 #define TGSI_EXEC_NUM_PREDS 1
200
201 #define TGSI_EXEC_NUM_TEMP_EXTRAS 10
202
203
204
205 #define TGSI_EXEC_MAX_NESTING 32
206 #define TGSI_EXEC_MAX_COND_NESTING TGSI_EXEC_MAX_NESTING
207 #define TGSI_EXEC_MAX_LOOP_NESTING TGSI_EXEC_MAX_NESTING
208 #define TGSI_EXEC_MAX_SWITCH_NESTING TGSI_EXEC_MAX_NESTING
209 #define TGSI_EXEC_MAX_CALL_NESTING TGSI_EXEC_MAX_NESTING
210
211 /* The maximum number of input attributes per vertex. For 2D
212 * input register files, this is the stride between two 1D
213 * arrays.
214 */
215 #define TGSI_EXEC_MAX_INPUT_ATTRIBS PIPE_MAX_SHADER_INPUTS
216
217 /* The maximum number of bytes per constant buffer.
218 */
219 #define TGSI_EXEC_MAX_CONST_BUFFER_SIZE (4096 * sizeof(float[4]))
220
221 /* The maximum number of vertices per primitive */
222 #define TGSI_MAX_PRIM_VERTICES 6
223
224 /* The maximum number of primitives to be generated */
225 #define TGSI_MAX_PRIMITIVES 64
226
227 /* The maximum total number of vertices */
228 #define TGSI_MAX_TOTAL_VERTICES (TGSI_MAX_PRIM_VERTICES * TGSI_MAX_PRIMITIVES * PIPE_MAX_ATTRIBS)
229
230 #define TGSI_MAX_MISC_INPUTS 8
231
232 /** function call/activation record */
233 struct tgsi_call_record
234 {
235 uint CondStackTop;
236 uint LoopStackTop;
237 uint ContStackTop;
238 int SwitchStackTop;
239 int BreakStackTop;
240 uint ReturnAddr;
241 };
242
243
244 /* Switch-case block state. */
245 struct tgsi_switch_record {
246 uint mask; /**< execution mask */
247 union tgsi_exec_channel selector; /**< a value case statements are compared to */
248 uint defaultMask; /**< non-execute mask for default case */
249 };
250
251
252 enum tgsi_break_type {
253 TGSI_EXEC_BREAK_INSIDE_LOOP,
254 TGSI_EXEC_BREAK_INSIDE_SWITCH
255 };
256
257
258 #define TGSI_EXEC_MAX_BREAK_STACK (TGSI_EXEC_MAX_LOOP_NESTING + TGSI_EXEC_MAX_SWITCH_NESTING)
259
260
261 /**
262 * Run-time virtual machine state for executing TGSI shader.
263 */
264 struct tgsi_exec_machine
265 {
266 /* Total = program temporaries + internal temporaries
267 */
268 struct tgsi_exec_vector Temps[TGSI_EXEC_NUM_TEMPS +
269 TGSI_EXEC_NUM_TEMP_EXTRAS];
270
271 float Imms[TGSI_EXEC_NUM_IMMEDIATES][4];
272
273 float ImmArray[TGSI_EXEC_NUM_IMMEDIATES][4];
274
275 struct tgsi_exec_vector *Inputs;
276 struct tgsi_exec_vector *Outputs;
277
278 /* System values */
279 unsigned SysSemanticToIndex[TGSI_SEMANTIC_COUNT];
280 union tgsi_exec_channel SystemValue[TGSI_MAX_MISC_INPUTS];
281
282 struct tgsi_exec_vector *Addrs;
283 struct tgsi_exec_vector *Predicates;
284
285 struct tgsi_sampler *Sampler;
286
287 unsigned ImmLimit;
288
289 const void *Consts[PIPE_MAX_CONSTANT_BUFFERS];
290 unsigned ConstsSize[PIPE_MAX_CONSTANT_BUFFERS];
291
292 const struct tgsi_token *Tokens; /**< Declarations, instructions */
293 unsigned Processor; /**< TGSI_PROCESSOR_x */
294
295 /* GEOMETRY processor only. */
296 unsigned *Primitives;
297 unsigned NumOutputs;
298 unsigned MaxGeometryShaderOutputs;
299 unsigned MaxOutputVertices;
300
301 /* FRAGMENT processor only. */
302 const struct tgsi_interp_coef *InterpCoefs;
303 struct tgsi_exec_vector QuadPos;
304 float Face; /**< +1 if front facing, -1 if back facing */
305 bool flatshade_color;
306 /* Conditional execution masks */
307 uint CondMask; /**< For IF/ELSE/ENDIF */
308 uint LoopMask; /**< For BGNLOOP/ENDLOOP */
309 uint ContMask; /**< For loop CONT statements */
310 uint FuncMask; /**< For function calls */
311 uint ExecMask; /**< = CondMask & LoopMask */
312
313 /* Current switch-case state. */
314 struct tgsi_switch_record Switch;
315
316 /* Current break type. */
317 enum tgsi_break_type BreakType;
318
319 /** Condition mask stack (for nested conditionals) */
320 uint CondStack[TGSI_EXEC_MAX_COND_NESTING];
321 int CondStackTop;
322
323 /** Loop mask stack (for nested loops) */
324 uint LoopStack[TGSI_EXEC_MAX_LOOP_NESTING];
325 int LoopStackTop;
326
327 /** Loop label stack */
328 uint LoopLabelStack[TGSI_EXEC_MAX_LOOP_NESTING];
329 int LoopLabelStackTop;
330
331 /** Loop continue mask stack (see comments in tgsi_exec.c) */
332 uint ContStack[TGSI_EXEC_MAX_LOOP_NESTING];
333 int ContStackTop;
334
335 /** Switch case stack */
336 struct tgsi_switch_record SwitchStack[TGSI_EXEC_MAX_SWITCH_NESTING];
337 int SwitchStackTop;
338
339 enum tgsi_break_type BreakStack[TGSI_EXEC_MAX_BREAK_STACK];
340 int BreakStackTop;
341
342 /** Function execution mask stack (for executing subroutine code) */
343 uint FuncStack[TGSI_EXEC_MAX_CALL_NESTING];
344 int FuncStackTop;
345
346 /** Function call stack for saving/restoring the program counter */
347 struct tgsi_call_record CallStack[TGSI_EXEC_MAX_CALL_NESTING];
348 int CallStackTop;
349
350 struct tgsi_full_instruction *Instructions;
351 uint NumInstructions;
352
353 struct tgsi_full_declaration *Declarations;
354 uint NumDeclarations;
355
356 struct tgsi_declaration_sampler_view
357 SamplerViews[PIPE_MAX_SHADER_SAMPLER_VIEWS];
358
359 boolean UsedGeometryShader;
360 };
361
362 struct tgsi_exec_machine *
363 tgsi_exec_machine_create( void );
364
365 void
366 tgsi_exec_machine_destroy(struct tgsi_exec_machine *mach);
367
368
369 void
370 tgsi_exec_machine_bind_shader(
371 struct tgsi_exec_machine *mach,
372 const struct tgsi_token *tokens,
373 struct tgsi_sampler *sampler);
374
375 uint
376 tgsi_exec_machine_run(
377 struct tgsi_exec_machine *mach );
378
379
380 void
381 tgsi_exec_machine_free_data(struct tgsi_exec_machine *mach);
382
383
384 boolean
385 tgsi_check_soa_dependencies(const struct tgsi_full_instruction *inst);
386
387
388 static INLINE void
389 tgsi_set_kill_mask(struct tgsi_exec_machine *mach, unsigned mask)
390 {
391 mach->Temps[TGSI_EXEC_TEMP_KILMASK_I].xyzw[TGSI_EXEC_TEMP_KILMASK_C].u[0] =
392 mask;
393 }
394
395
396 /** Set execution mask values prior to executing the shader */
397 static INLINE void
398 tgsi_set_exec_mask(struct tgsi_exec_machine *mach,
399 boolean ch0, boolean ch1, boolean ch2, boolean ch3)
400 {
401 int *mask = mach->Temps[TGSI_EXEC_MASK_I].xyzw[TGSI_EXEC_MASK_C].i;
402 mask[0] = ch0 ? ~0 : 0;
403 mask[1] = ch1 ? ~0 : 0;
404 mask[2] = ch2 ? ~0 : 0;
405 mask[3] = ch3 ? ~0 : 0;
406 }
407
408
409 extern void
410 tgsi_exec_set_constant_buffers(struct tgsi_exec_machine *mach,
411 unsigned num_bufs,
412 const void **bufs,
413 const unsigned *buf_sizes);
414
415
416 static INLINE int
417 tgsi_exec_get_shader_param(enum pipe_shader_cap param)
418 {
419 switch(param) {
420 case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
421 case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
422 case PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS:
423 case PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS:
424 return INT_MAX;
425 case PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH:
426 return TGSI_EXEC_MAX_NESTING;
427 case PIPE_SHADER_CAP_MAX_INPUTS:
428 return TGSI_EXEC_MAX_INPUT_ATTRIBS;
429 case PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE:
430 return TGSI_EXEC_MAX_CONST_BUFFER_SIZE;
431 case PIPE_SHADER_CAP_MAX_CONST_BUFFERS:
432 return PIPE_MAX_CONSTANT_BUFFERS;
433 case PIPE_SHADER_CAP_MAX_TEMPS:
434 return TGSI_EXEC_NUM_TEMPS;
435 case PIPE_SHADER_CAP_MAX_PREDS:
436 return TGSI_EXEC_NUM_PREDS;
437 case PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED:
438 return 1;
439 case PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR:
440 case PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR:
441 case PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR:
442 case PIPE_SHADER_CAP_INDIRECT_CONST_ADDR:
443 return 1;
444 case PIPE_SHADER_CAP_SUBROUTINES:
445 return 1;
446 case PIPE_SHADER_CAP_INTEGERS:
447 return 1;
448 case PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS:
449 return PIPE_MAX_SAMPLERS;
450 case PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS:
451 return PIPE_MAX_SHADER_SAMPLER_VIEWS;
452 case PIPE_SHADER_CAP_PREFERRED_IR:
453 return PIPE_SHADER_IR_TGSI;
454 case PIPE_SHADER_CAP_TGSI_SQRT_SUPPORTED:
455 return 1;
456 case PIPE_SHADER_CAP_DOUBLES:
457 return 0;
458 }
459 /* if we get here, we missed a shader cap above (and should have seen
460 * a compiler warning.)
461 */
462 return 0;
463 }
464
465 #if defined __cplusplus
466 } /* extern "C" */
467 #endif
468
469 #endif /* TGSI_EXEC_H */