src/gallium/auxiliary/tgsi/tgsi_ppc.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 /**
  29  * TGSI to PowerPC code generation.
  30  */
  31
  32 #include "pipe/p_config.h"
  33
  34 #if defined(PIPE_ARCH_PPC)
  35
  36 #include "util/u_debug.h"
  37 #include "pipe/p_shader_tokens.h"
  38 #include "util/u_math.h"
  39 #include "util/u_memory.h"
  40 #include "util/u_sse.h"
  41 #include "tgsi/tgsi_info.h"
  42 #include "tgsi/tgsi_parse.h"
  43 #include "tgsi/tgsi_util.h"
  44 #include "tgsi_dump.h"
  45 #include "tgsi_exec.h"
  46 #include "tgsi_ppc.h"
  47 #include "rtasm/rtasm_ppc.h"
  48
  49
  50 /**
  51  * Since it's pretty much impossible to form PPC vector immediates, load
  52  * them from memory here:
  53  */
  54 PIPE_ALIGN_VAR(16) const float
  55 ppc_builtin_constants[] = {
  56    1.0f, -128.0f, 128.0, 0.0
  57 };
  58
  59
  60 #define FOR_EACH_CHANNEL( CHAN )\
  61    for (CHAN = 0; CHAN < NUM_CHANNELS; CHAN++)
  62
  63 #define IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  64    ((INST).Dst[0].Register.WriteMask & (1 << (CHAN)))
  65
  66 #define IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )\
  67    if (IS_DST0_CHANNEL_ENABLED( INST, CHAN ))
  68
  69 #define FOR_EACH_DST0_ENABLED_CHANNEL( INST, CHAN )\
  70    FOR_EACH_CHANNEL( CHAN )\
  71       IF_IS_DST0_CHANNEL_ENABLED( INST, CHAN )
  72
  73 #define CHAN_X 0
  74 #define CHAN_Y 1
  75 #define CHAN_Z 2
  76 #define CHAN_W 3
  77
  78
  79 /**
  80  * How many TGSI temps should be implemented with real PPC vector registers
  81  * rather than memory.
  82  */
  83 #define MAX_PPC_TEMPS 3
  84
  85
  86 /**
  87  * Context/state used during code gen.
  88  */
  89 struct gen_context
  90 {
  91    struct ppc_function *f;
  92    int inputs_reg;    /**< GP register pointing to input params */
  93    int outputs_reg;   /**< GP register pointing to output params */
  94    int temps_reg;     /**< GP register pointing to temporary "registers" */
  95    int immed_reg;     /**< GP register pointing to immediates buffer */
  96    int const_reg;     /**< GP register pointing to constants buffer */
  97    int builtins_reg;  /**< GP register pointint to built-in constants */
  98
  99    int offset_reg;    /**< used to reduce redundant li instructions */
 100    int offset_value;
 101
 102    int one_vec;       /**< vector register with {1.0, 1.0, 1.0, 1.0} */
 103    int bit31_vec;     /**< vector register with {1<<31, 1<<31, 1<<31, 1<<31} */
 104
 105    /**
 106     * Map TGSI temps to PPC vector temps.
 107     * We have 32 PPC vector regs.  Use 16 of them for storing 4 TGSI temps.
 108     * XXX currently only do this for TGSI temps [0..MAX_PPC_TEMPS-1].
 109     */
 110    int temps_map[MAX_PPC_TEMPS][4];
 111
 112    /**
 113     * Cache of src registers.
 114     * This is used to avoid redundant load instructions.
 115     */
 116    struct {
 117       struct tgsi_full_src_register src;
 118       uint chan;
 119       uint vec;
 120    } regs[12];  /* 3 src regs, 4 channels */
 121    uint num_regs;
 122 };
 123
 124
 125 /**
 126  * Initialize code generation context.
 127  */
 128 static void
 129 init_gen_context(struct gen_context *gen, struct ppc_function *func)
 130 {
 131    uint i;
 132
 133    memset(gen, 0, sizeof(*gen));
 134    gen->f = func;
 135    gen->inputs_reg = ppc_reserve_register(func, 3);   /* first function param */
 136    gen->outputs_reg = ppc_reserve_register(func, 4);  /* second function param */
 137    gen->temps_reg = ppc_reserve_register(func, 5);    /* ... */
 138    gen->immed_reg = ppc_reserve_register(func, 6);
 139    gen->const_reg = ppc_reserve_register(func, 7);
 140    gen->builtins_reg = ppc_reserve_register(func, 8);
 141    gen->one_vec = -1;
 142    gen->bit31_vec = -1;
 143    gen->offset_reg = -1;
 144    gen->offset_value = -9999999;
 145    for (i = 0; i < MAX_PPC_TEMPS; i++) {
 146       gen->temps_map[i][0] = ppc_allocate_vec_register(gen->f);
 147       gen->temps_map[i][1] = ppc_allocate_vec_register(gen->f);
 148       gen->temps_map[i][2] = ppc_allocate_vec_register(gen->f);
 149       gen->temps_map[i][3] = ppc_allocate_vec_register(gen->f);
 150    }
 151 }
 152
 153
 154 /**
 155  * Is the given TGSI register stored as a real PPC vector register?
 156  */
 157 static boolean
 158 is_ppc_vec_temporary(const struct tgsi_full_src_register *reg)
 159 {
 160    return (reg->Register.File == TGSI_FILE_TEMPORARY &&
 161            reg->Register.Index < MAX_PPC_TEMPS);
 162 }
 163
 164
 165 /**
 166  * Is the given TGSI register stored as a real PPC vector register?
 167  */
 168 static boolean
 169 is_ppc_vec_temporary_dst(const struct tgsi_full_dst_register *reg)
 170 {
 171    return (reg->Register.File == TGSI_FILE_TEMPORARY &&
 172            reg->Register.Index < MAX_PPC_TEMPS);
 173 }
 174
 175
 176
 177 /**
 178  * All PPC vector load/store instructions form an effective address
 179  * by adding the contents of two registers.  For example:
 180  *    lvx v2,r8,r9   # v2 = memory[r8 + r9]
 181  *    stvx v2,r8,r9  # memory[r8 + r9] = v2;
 182  * So our lvx/stvx instructions are typically preceded by an 'li' instruction
 183  * to load r9 (above) with an immediate (an offset).
 184  * This code emits that 'li' instruction, but only if the offset value is
 185  * different than the previous 'li'.
 186  * This optimization seems to save about 10% in the instruction count.
 187  * Note that we need to unconditionally emit an 'li' inside basic blocks
 188  * (such as inside loops).
 189  */
 190 static int
 191 emit_li_offset(struct gen_context *gen, int offset)
 192 {
 193    if (gen->offset_reg <= 0) {
 194       /* allocate a GP register for storing load/store offset */
 195       gen->offset_reg = ppc_allocate_register(gen->f);
 196    }
 197
 198    /* emit new 'li' if offset is changing */
 199    if (gen->offset_value < 0 || gen->offset_value != offset) {
 200       gen->offset_value = offset;
 201       ppc_li(gen->f, gen->offset_reg, offset);
 202    }
 203
 204    return gen->offset_reg;
 205 }
 206
 207
 208 /**
 209  * Forces subsequent emit_li_offset() calls to emit an 'li'.
 210  * To be called at the top of basic blocks.
 211  */
 212 static void
 213 reset_li_offset(struct gen_context *gen)
 214 {
 215    gen->offset_value = -9999999;
 216 }
 217
 218
 219
 220 /**
 221  * Load the given vector register with {value, value, value, value}.
 222  * The value must be in the ppu_builtin_constants[] array.
 223  * We wouldn't need this if there was a simple way to load PPC vector
 224  * registers with immediate values!
 225  */
 226 static void
 227 load_constant_vec(struct gen_context *gen, int dst_vec, float value)
 228 {
 229    uint pos;
 230    for (pos = 0; pos < Elements(ppc_builtin_constants); pos++) {
 231       if (ppc_builtin_constants[pos] == value) {
 232          int offset = pos * 4;
 233          int offset_reg = emit_li_offset(gen, offset);
 234
 235          /* Load 4-byte word into vector register.
 236           * The vector slot depends on the effective address we load from.
 237           * We know that our builtins start at a 16-byte boundary so we
 238           * know that 'swizzle' tells us which vector slot will have the
 239           * loaded word.  The other vector slots will be undefined.
 240           */
 241          ppc_lvewx(gen->f, dst_vec, gen->builtins_reg, offset_reg);
 242          /* splat word[pos % 4] across the vector reg */
 243          ppc_vspltw(gen->f, dst_vec, dst_vec, pos % 4);
 244          return;
 245       }
 246    }
 247    assert(0 && "Need to add new constant to ppc_builtin_constants array");
 248 }
 249
 250
 251 /**
 252  * Return index of vector register containing {1.0, 1.0, 1.0, 1.0}.
 253  */
 254 static int
 255 gen_one_vec(struct gen_context *gen)
 256 {
 257    if (gen->one_vec < 0) {
 258       gen->one_vec = ppc_allocate_vec_register(gen->f);
 259       load_constant_vec(gen, gen->one_vec, 1.0f);
 260    }
 261    return gen->one_vec;
 262 }
 263
 264 /**
 265  * Return index of vector register containing {1<<31, 1<<31, 1<<31, 1<<31}.
 266  */
 267 static int
 268 gen_get_bit31_vec(struct gen_context *gen)
 269 {
 270    if (gen->bit31_vec < 0) {
 271       gen->bit31_vec = ppc_allocate_vec_register(gen->f);
 272       ppc_vspltisw(gen->f, gen->bit31_vec, -1);
 273       ppc_vslw(gen->f, gen->bit31_vec, gen->bit31_vec, gen->bit31_vec);
 274    }
 275    return gen->bit31_vec;
 276 }
 277
 278
 279 /**
 280  * Register fetch.  Return PPC vector register with result.
 281  */
 282 static int
 283 emit_fetch(struct gen_context *gen,
 284            const struct tgsi_full_src_register *reg,
 285            const unsigned chan_index)
 286 {
 287    uint swizzle = tgsi_util_get_full_src_register_swizzle(reg, chan_index);
 288    int dst_vec = -1;
 289
 290    switch (swizzle) {
 291    case TGSI_SWIZZLE_X:
 292    case TGSI_SWIZZLE_Y:
 293    case TGSI_SWIZZLE_Z:
 294    case TGSI_SWIZZLE_W:
 295       switch (reg->Register.File) {
 296       case TGSI_FILE_INPUT:
 297          {
 298             int offset = (reg->Register.Index * 4 + swizzle) * 16;
 299             int offset_reg = emit_li_offset(gen, offset);
 300             dst_vec = ppc_allocate_vec_register(gen->f);
 301             ppc_lvx(gen->f, dst_vec, gen->inputs_reg, offset_reg);
 302          }
 303          break;
 304       case TGSI_FILE_SYSTEM_VALUE:
 305          assert(!"unhandled system value in tgsi_ppc.c");
 306          break;
 307       case TGSI_FILE_TEMPORARY:
 308          if (is_ppc_vec_temporary(reg)) {
 309             /* use PPC vec register */
 310             dst_vec = gen->temps_map[reg->Register.Index][swizzle];
 311          }
 312          else {
 313             /* use memory-based temp register "file" */
 314             int offset = (reg->Register.Index * 4 + swizzle) * 16;
 315             int offset_reg = emit_li_offset(gen, offset);
 316             dst_vec = ppc_allocate_vec_register(gen->f);
 317             ppc_lvx(gen->f, dst_vec, gen->temps_reg, offset_reg);
 318          }
 319          break;
 320       case TGSI_FILE_IMMEDIATE:
 321          {
 322             int offset = (reg->Register.Index * 4 + swizzle) * 4;
 323             int offset_reg = emit_li_offset(gen, offset);
 324             dst_vec = ppc_allocate_vec_register(gen->f);
 325             /* Load 4-byte word into vector register.
 326              * The vector slot depends on the effective address we load from.
 327              * We know that our immediates start at a 16-byte boundary so we
 328              * know that 'swizzle' tells us which vector slot will have the
 329              * loaded word.  The other vector slots will be undefined.
 330              */
 331             ppc_lvewx(gen->f, dst_vec, gen->immed_reg, offset_reg);
 332             /* splat word[swizzle] across the vector reg */
 333             ppc_vspltw(gen->f, dst_vec, dst_vec, swizzle);
 334          }
 335          break;
 336       case TGSI_FILE_CONSTANT:
 337          {
 338             int offset = (reg->Register.Index * 4 + swizzle) * 4;
 339             int offset_reg = emit_li_offset(gen, offset);
 340             dst_vec = ppc_allocate_vec_register(gen->f);
 341             /* Load 4-byte word into vector register.
 342              * The vector slot depends on the effective address we load from.
 343              * We know that our constants start at a 16-byte boundary so we
 344              * know that 'swizzle' tells us which vector slot will have the
 345              * loaded word.  The other vector slots will be undefined.
 346              */
 347             ppc_lvewx(gen->f, dst_vec, gen->const_reg, offset_reg);
 348             /* splat word[swizzle] across the vector reg */
 349             ppc_vspltw(gen->f, dst_vec, dst_vec, swizzle);
 350          }
 351          break;
 352       default:
 353          assert( 0 );
 354       }
 355       break;
 356    default:
 357       assert( 0 );
 358    }
 359
 360    assert(dst_vec >= 0);
 361
 362    {
 363       uint sign_op = tgsi_util_get_full_src_register_sign_mode(reg, chan_index);
 364       if (sign_op != TGSI_UTIL_SIGN_KEEP) {
 365          int bit31_vec = gen_get_bit31_vec(gen);
 366          int dst_vec2;
 367
 368          if (is_ppc_vec_temporary(reg)) {
 369             /* need to use a new temp */
 370             dst_vec2 = ppc_allocate_vec_register(gen->f);
 371          }
 372          else {
 373             dst_vec2 = dst_vec;
 374          }
 375
 376          switch (sign_op) {
 377          case TGSI_UTIL_SIGN_CLEAR:
 378             /* vec = vec & ~bit31 */
 379             ppc_vandc(gen->f, dst_vec2, dst_vec, bit31_vec);
 380             break;
 381          case TGSI_UTIL_SIGN_SET:
 382             /* vec = vec | bit31 */
 383             ppc_vor(gen->f, dst_vec2, dst_vec, bit31_vec);
 384             break;
 385          case TGSI_UTIL_SIGN_TOGGLE:
 386             /* vec = vec ^ bit31 */
 387             ppc_vxor(gen->f, dst_vec2, dst_vec, bit31_vec);
 388             break;
 389          default:
 390             assert(0);
 391          }
 392          return dst_vec2;
 393       }
 394    }
 395
 396    return dst_vec;
 397 }
 398
 399
 400
 401 /**
 402  * Test if two TGSI src registers refer to the same memory location.
 403  * We use this to avoid redundant register loads.
 404  */
 405 static boolean
 406 equal_src_locs(const struct tgsi_full_src_register *a, uint chan_a,
 407                const struct tgsi_full_src_register *b, uint chan_b)
 408 {
 409    int swz_a, swz_b;
 410    int sign_a, sign_b;
 411    if (a->Register.File != b->Register.File)
 412       return FALSE;
 413    if (a->Register.Index != b->Register.Index)
 414       return FALSE;
 415    swz_a = tgsi_util_get_full_src_register_swizzle(a, chan_a);
 416    swz_b = tgsi_util_get_full_src_register_swizzle(b, chan_b);
 417    if (swz_a != swz_b)
 418       return FALSE;
 419    sign_a = tgsi_util_get_full_src_register_sign_mode(a, chan_a);
 420    sign_b = tgsi_util_get_full_src_register_sign_mode(b, chan_b);
 421    if (sign_a != sign_b)
 422       return FALSE;
 423    return TRUE;
 424 }
 425
 426
 427 /**
 428  * Given a TGSI src register and channel index, return the PPC vector
 429  * register containing the value.  We use a cache to prevent re-loading
 430  * the same register multiple times.
 431  * \return index of PPC vector register with the desired src operand
 432  */
 433 static int
 434 get_src_vec(struct gen_context *gen,
 435             struct tgsi_full_instruction *inst, int src_reg, uint chan)
 436 {
 437    const const struct tgsi_full_src_register *src =
 438       &inst->Src[src_reg];
 439    int vec;
 440    uint i;
 441
 442    /* check the cache */
 443    for (i = 0; i < gen->num_regs; i++) {
 444       if (equal_src_locs(&gen->regs[i].src, gen->regs[i].chan, src, chan)) {
 445          /* cache hit */
 446          assert(gen->regs[i].vec >= 0);
 447          return gen->regs[i].vec;
 448       }
 449    }
 450
 451    /* cache miss: allocate new vec reg and emit fetch/load code */
 452    vec = emit_fetch(gen, src, chan);
 453    gen->regs[gen->num_regs].src = *src;
 454    gen->regs[gen->num_regs].chan = chan;
 455    gen->regs[gen->num_regs].vec = vec;
 456    gen->num_regs++;
 457
 458    assert(gen->num_regs <= Elements(gen->regs));
 459
 460    assert(vec >= 0);
 461
 462    return vec;
 463 }
 464
 465
 466 /**
 467  * Clear the src operand cache.  To be called at the end of each emit function.
 468  */
 469 static void
 470 release_src_vecs(struct gen_context *gen)
 471 {
 472    uint i;
 473    for (i = 0; i < gen->num_regs; i++) {
 474       const const struct tgsi_full_src_register src = gen->regs[i].src;
 475       if (!is_ppc_vec_temporary(&src)) {
 476          ppc_release_vec_register(gen->f, gen->regs[i].vec);
 477       }
 478    }
 479    gen->num_regs = 0;
 480 }
 481
 482
 483
 484 static int
 485 get_dst_vec(struct gen_context *gen,
 486             const struct tgsi_full_instruction *inst,
 487             unsigned chan_index)
 488 {
 489    const struct tgsi_full_dst_register *reg = &inst->Dst[0];
 490
 491    if (is_ppc_vec_temporary_dst(reg)) {
 492       int vec = gen->temps_map[reg->Register.Index][chan_index];
 493       return vec;
 494    }
 495    else {
 496       return ppc_allocate_vec_register(gen->f);
 497    }
 498 }
 499
 500
 501 /**
 502  * Register store.  Store 'src_vec' at location indicated by 'reg'.
 503  * \param free_vec  Should the src_vec be released when done?
 504  */
 505 static void
 506 emit_store(struct gen_context *gen,
 507            int src_vec,
 508            const struct tgsi_full_instruction *inst,
 509            unsigned chan_index,
 510            boolean free_vec)
 511 {
 512    const struct tgsi_full_dst_register *reg = &inst->Dst[0];
 513
 514    switch (reg->Register.File) {
 515    case TGSI_FILE_OUTPUT:
 516       {
 517          int offset = (reg->Register.Index * 4 + chan_index) * 16;
 518          int offset_reg = emit_li_offset(gen, offset);
 519          ppc_stvx(gen->f, src_vec, gen->outputs_reg, offset_reg);
 520       }
 521       break;
 522    case TGSI_FILE_TEMPORARY:
 523       if (is_ppc_vec_temporary_dst(reg)) {
 524          if (!free_vec) {
 525             int dst_vec = gen->temps_map[reg->Register.Index][chan_index];
 526             if (dst_vec != src_vec)
 527                ppc_vmove(gen->f, dst_vec, src_vec);
 528          }
 529          free_vec = FALSE;
 530       }
 531       else {
 532          int offset = (reg->Register.Index * 4 + chan_index) * 16;
 533          int offset_reg = emit_li_offset(gen, offset);
 534          ppc_stvx(gen->f, src_vec, gen->temps_reg, offset_reg);
 535       }
 536       break;
 537 #if 0
 538    case TGSI_FILE_ADDRESS:
 539       emit_addrs(
 540          func,
 541          xmm,
 542          reg->Register.Index,
 543          chan_index );
 544       break;
 545 #endif
 546    default:
 547       assert( 0 );
 548    }
 549
 550 #if 0
 551    switch( inst->Instruction.Saturate ) {
 552    case TGSI_SAT_NONE:
 553       break;
 554
 555    case TGSI_SAT_ZERO_ONE:
 556       /* assert( 0 ); */
 557       break;
 558
 559    case TGSI_SAT_MINUS_PLUS_ONE:
 560       assert( 0 );
 561       break;
 562    }
 563 #endif
 564
 565    if (free_vec)
 566       ppc_release_vec_register(gen->f, src_vec);
 567 }
 568
 569
 570 static void
 571 emit_scalar_unaryop(struct gen_context *gen, struct tgsi_full_instruction *inst)
 572 {
 573    int v0, v1;
 574    uint chan_index;
 575
 576    v0 = get_src_vec(gen, inst, 0, CHAN_X);
 577    v1 = ppc_allocate_vec_register(gen->f);
 578
 579    switch (inst->Instruction.Opcode) {
 580    case TGSI_OPCODE_RSQ:
 581       /* v1 = 1.0 / sqrt(v0) */
 582       ppc_vrsqrtefp(gen->f, v1, v0);
 583       break;
 584    case TGSI_OPCODE_RCP:
 585       /* v1 = 1.0 / v0 */
 586       ppc_vrefp(gen->f, v1, v0);
 587       break;
 588    default:
 589       assert(0);
 590    }
 591
 592    FOR_EACH_DST0_ENABLED_CHANNEL( *inst, chan_index ) {
 593       emit_store(gen, v1, inst, chan_index, FALSE);
 594    }
 595
 596    release_src_vecs(gen);
 597    ppc_release_vec_register(gen->f, v1);
 598 }
 599
 600
 601 static void
 602 emit_unaryop(struct gen_context *gen, struct tgsi_full_instruction *inst)
 603 {
 604    uint chan_index;
 605
 606    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan_index) {
 607       int v0 = get_src_vec(gen, inst, 0, chan_index);   /* v0 = srcreg[0] */
 608       int v1 = get_dst_vec(gen, inst, chan_index);
 609       switch (inst->Instruction.Opcode) {
 610       case TGSI_OPCODE_ABS:
 611          /* turn off the most significant bit of each vector float word */
 612          {
 613             int bit31_vec = gen_get_bit31_vec(gen);
 614             ppc_vandc(gen->f, v1, v0, bit31_vec); /* v1 = v0 & ~bit31 */
 615          }
 616          break;
 617       case TGSI_OPCODE_FLR:
 618          ppc_vrfim(gen->f, v1, v0);         /* v1 = floor(v0) */
 619          break;
 620       case TGSI_OPCODE_FRC:
 621          ppc_vrfim(gen->f, v1, v0);      /* tmp = floor(v0) */
 622          ppc_vsubfp(gen->f, v1, v0, v1); /* v1 = v0 - v1 */
 623          break;
 624       case TGSI_OPCODE_EX2:
 625          ppc_vexptefp(gen->f, v1, v0);     /* v1 = 2^v0 */
 626          break;
 627       case TGSI_OPCODE_LG2:
 628          /* XXX this may be broken! */
 629          ppc_vlogefp(gen->f, v1, v0);      /* v1 = log2(v0) */
 630          break;
 631       case TGSI_OPCODE_MOV:
 632          if (v0 != v1)
 633             ppc_vmove(gen->f, v1, v0);
 634          break;
 635       default:
 636          assert(0);
 637       }
 638       emit_store(gen, v1, inst, chan_index, TRUE);  /* store v0 */
 639    }
 640
 641    release_src_vecs(gen);
 642 }
 643
 644
 645 static void
 646 emit_binop(struct gen_context *gen, struct tgsi_full_instruction *inst)
 647 {
 648    int zero_vec = -1;
 649    uint chan;
 650
 651    if (inst->Instruction.Opcode == TGSI_OPCODE_MUL) {
 652       zero_vec = ppc_allocate_vec_register(gen->f);
 653       ppc_vzero(gen->f, zero_vec);
 654    }
 655
 656    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan) {
 657       /* fetch src operands */
 658       int v0 = get_src_vec(gen, inst, 0, chan);
 659       int v1 = get_src_vec(gen, inst, 1, chan);
 660       int v2 = get_dst_vec(gen, inst, chan);
 661
 662       /* emit binop */
 663       switch (inst->Instruction.Opcode) {
 664       case TGSI_OPCODE_ADD:
 665          ppc_vaddfp(gen->f, v2, v0, v1);
 666          break;
 667       case TGSI_OPCODE_SUB:
 668          ppc_vsubfp(gen->f, v2, v0, v1);
 669          break;
 670       case TGSI_OPCODE_MUL:
 671          ppc_vmaddfp(gen->f, v2, v0, v1, zero_vec);
 672          break;
 673       case TGSI_OPCODE_MIN:
 674          ppc_vminfp(gen->f, v2, v0, v1);
 675          break;
 676       case TGSI_OPCODE_MAX:
 677          ppc_vmaxfp(gen->f, v2, v0, v1);
 678          break;
 679       default:
 680          assert(0);
 681       }
 682
 683       /* store v2 */
 684       emit_store(gen, v2, inst, chan, TRUE);
 685    }
 686
 687    if (inst->Instruction.Opcode == TGSI_OPCODE_MUL)
 688       ppc_release_vec_register(gen->f, zero_vec);
 689
 690    release_src_vecs(gen);
 691 }
 692
 693
 694 static void
 695 emit_triop(struct gen_context *gen, struct tgsi_full_instruction *inst)
 696 {
 697    uint chan;
 698
 699    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan) {
 700       /* fetch src operands */
 701       int v0 = get_src_vec(gen, inst, 0, chan);
 702       int v1 = get_src_vec(gen, inst, 1, chan);
 703       int v2 = get_src_vec(gen, inst, 2, chan);
 704       int v3 = get_dst_vec(gen, inst, chan);
 705
 706       /* emit ALU */
 707       switch (inst->Instruction.Opcode) {
 708       case TGSI_OPCODE_MAD:
 709          ppc_vmaddfp(gen->f, v3, v0, v1, v2);   /* v3 = v0 * v1 + v2 */
 710          break;
 711       case TGSI_OPCODE_LRP:
 712          ppc_vsubfp(gen->f, v3, v1, v2);        /* v3 = v1 - v2 */
 713          ppc_vmaddfp(gen->f, v3, v0, v3, v2);   /* v3 = v0 * v3 + v2 */
 714          break;
 715       default:
 716          assert(0);
 717       }
 718
 719       /* store v3 */
 720       emit_store(gen, v3, inst, chan, TRUE);
 721    }
 722
 723    release_src_vecs(gen);
 724 }
 725
 726
 727 /**
 728  * Vector comparisons, resulting in 1.0 or 0.0 values.
 729  */
 730 static void
 731 emit_inequality(struct gen_context *gen, struct tgsi_full_instruction *inst)
 732 {
 733    uint chan;
 734    int one_vec = gen_one_vec(gen);
 735
 736    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan) {
 737       /* fetch src operands */
 738       int v0 = get_src_vec(gen, inst, 0, chan);
 739       int v1 = get_src_vec(gen, inst, 1, chan);
 740       int v2 = get_dst_vec(gen, inst, chan);
 741       boolean complement = FALSE;
 742
 743       switch (inst->Instruction.Opcode) {
 744       case TGSI_OPCODE_SNE:
 745          complement = TRUE;
 746          /* fall-through */
 747       case TGSI_OPCODE_SEQ:
 748          ppc_vcmpeqfpx(gen->f, v2, v0, v1); /* v2 = v0 == v1 ? ~0 : 0 */
 749          break;
 750
 751       case TGSI_OPCODE_SGE:
 752          complement = TRUE;
 753          /* fall-through */
 754       case TGSI_OPCODE_SLT:
 755          ppc_vcmpgtfpx(gen->f, v2, v1, v0); /* v2 = v1 > v0 ? ~0 : 0 */
 756          break;
 757
 758       case TGSI_OPCODE_SLE:
 759          complement = TRUE;
 760          /* fall-through */
 761       case TGSI_OPCODE_SGT:
 762          ppc_vcmpgtfpx(gen->f, v2, v0, v1); /* v2 = v0 > v1 ? ~0 : 0 */
 763          break;
 764       default:
 765          assert(0);
 766       }
 767
 768       /* v2 is now {0,0,0,0} or {~0,~0,~0,~0} */
 769
 770       if (complement)
 771          ppc_vandc(gen->f, v2, one_vec, v2);    /* v2 = one_vec & ~v2 */
 772       else
 773          ppc_vand(gen->f, v2, one_vec, v2);     /* v2 = one_vec & v2 */
 774
 775       /* store v2 */
 776       emit_store(gen, v2, inst, chan, TRUE);
 777    }
 778
 779    release_src_vecs(gen);
 780 }
 781
 782
 783 static void
 784 emit_dotprod(struct gen_context *gen, struct tgsi_full_instruction *inst)
 785 {
 786    int v0, v1, v2;
 787    uint chan_index;
 788
 789    v2 = ppc_allocate_vec_register(gen->f);
 790
 791    ppc_vzero(gen->f, v2);                  /* v2 = {0, 0, 0, 0} */
 792
 793    v0 = get_src_vec(gen, inst, 0, CHAN_X); /* v0 = src0.XXXX */
 794    v1 = get_src_vec(gen, inst, 1, CHAN_X); /* v1 = src1.XXXX */
 795    ppc_vmaddfp(gen->f, v2, v0, v1, v2);    /* v2 = v0 * v1 + v2 */
 796
 797    v0 = get_src_vec(gen, inst, 0, CHAN_Y); /* v0 = src0.YYYY */
 798    v1 = get_src_vec(gen, inst, 1, CHAN_Y); /* v1 = src1.YYYY */
 799    ppc_vmaddfp(gen->f, v2, v0, v1, v2);    /* v2 = v0 * v1 + v2 */
 800
 801    v0 = get_src_vec(gen, inst, 0, CHAN_Z); /* v0 = src0.ZZZZ */
 802    v1 = get_src_vec(gen, inst, 1, CHAN_Z); /* v1 = src1.ZZZZ */
 803    ppc_vmaddfp(gen->f, v2, v0, v1, v2);    /* v2 = v0 * v1 + v2 */
 804
 805    if (inst->Instruction.Opcode == TGSI_OPCODE_DP4) {
 806       v0 = get_src_vec(gen, inst, 0, CHAN_W); /* v0 = src0.WWWW */
 807       v1 = get_src_vec(gen, inst, 1, CHAN_W); /* v1 = src1.WWWW */
 808       ppc_vmaddfp(gen->f, v2, v0, v1, v2);    /* v2 = v0 * v1 + v2 */
 809    }
 810    else if (inst->Instruction.Opcode == TGSI_OPCODE_DPH) {
 811       v1 = get_src_vec(gen, inst, 1, CHAN_W); /* v1 = src1.WWWW */
 812       ppc_vaddfp(gen->f, v2, v2, v1);         /* v2 = v2 + v1 */
 813    }
 814
 815    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan_index) {
 816       emit_store(gen, v2, inst, chan_index, FALSE);  /* store v2, free v2 later */
 817    }
 818
 819    release_src_vecs(gen);
 820
 821    ppc_release_vec_register(gen->f, v2);
 822 }
 823
 824
 825 /** Approximation for vr = pow(va, vb) */
 826 static void
 827 ppc_vec_pow(struct ppc_function *f, int vr, int va, int vb)
 828 {
 829    /* pow(a,b) ~= exp2(log2(a) * b) */
 830    int t_vec = ppc_allocate_vec_register(f);
 831    int zero_vec = ppc_allocate_vec_register(f);
 832
 833    ppc_vzero(f, zero_vec);
 834
 835    ppc_vlogefp(f, t_vec, va);                   /* t = log2(va) */
 836    ppc_vmaddfp(f, t_vec, t_vec, vb, zero_vec);  /* t = t * vb + zero */
 837    ppc_vexptefp(f, vr, t_vec);                  /* vr = 2^t */
 838
 839    ppc_release_vec_register(f, t_vec);
 840    ppc_release_vec_register(f, zero_vec);
 841 }
 842
 843
 844 static void
 845 emit_lit(struct gen_context *gen, struct tgsi_full_instruction *inst)
 846 {
 847    int one_vec = gen_one_vec(gen);
 848
 849    /* Compute X */
 850    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X)) {
 851       emit_store(gen, one_vec, inst, CHAN_X, FALSE);
 852    }
 853
 854    /* Compute Y, Z */
 855    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y) ||
 856        IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
 857       int x_vec;
 858       int zero_vec = ppc_allocate_vec_register(gen->f);
 859
 860       x_vec = get_src_vec(gen, inst, 0, CHAN_X);  /* x_vec = src[0].x */
 861
 862       ppc_vzero(gen->f, zero_vec);                /* zero = {0,0,0,0} */
 863       ppc_vmaxfp(gen->f, x_vec, x_vec, zero_vec); /* x_vec = max(x_vec, 0) */
 864
 865       if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y)) {
 866          emit_store(gen, x_vec, inst, CHAN_Y, FALSE);
 867       }
 868
 869       if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
 870          int y_vec, w_vec;
 871          int z_vec = ppc_allocate_vec_register(gen->f);
 872          int pow_vec = ppc_allocate_vec_register(gen->f);
 873          int pos_vec = ppc_allocate_vec_register(gen->f);
 874          int p128_vec = ppc_allocate_vec_register(gen->f);
 875          int n128_vec = ppc_allocate_vec_register(gen->f);
 876
 877          y_vec = get_src_vec(gen, inst, 0, CHAN_Y);  /* y_vec = src[0].y */
 878          ppc_vmaxfp(gen->f, y_vec, y_vec, zero_vec); /* y_vec = max(y_vec, 0) */
 879
 880          w_vec = get_src_vec(gen, inst, 0, CHAN_W);  /* w_vec = src[0].w */
 881
 882          /* clamp W to [-128, 128] */
 883          load_constant_vec(gen, p128_vec, 128.0f);
 884          load_constant_vec(gen, n128_vec, -128.0f);
 885          ppc_vmaxfp(gen->f, w_vec, w_vec, n128_vec); /* w = max(w, -128) */
 886          ppc_vminfp(gen->f, w_vec, w_vec, p128_vec); /* w = min(w, 128) */
 887
 888          /* if temp.x > 0
 889           *    z = pow(tmp.y, tmp.w)
 890           * else
 891           *    z = 0.0
 892           */
 893          ppc_vec_pow(gen->f, pow_vec, y_vec, w_vec);      /* pow = pow(y, w) */
 894          ppc_vcmpgtfpx(gen->f, pos_vec, x_vec, zero_vec); /* pos = x > 0 */
 895          ppc_vand(gen->f, z_vec, pow_vec, pos_vec);       /* z = pow & pos */
 896
 897          emit_store(gen, z_vec, inst, CHAN_Z, FALSE);
 898
 899          ppc_release_vec_register(gen->f, z_vec);
 900          ppc_release_vec_register(gen->f, pow_vec);
 901          ppc_release_vec_register(gen->f, pos_vec);
 902          ppc_release_vec_register(gen->f, p128_vec);
 903          ppc_release_vec_register(gen->f, n128_vec);
 904       }
 905
 906       ppc_release_vec_register(gen->f, zero_vec);
 907    }
 908
 909    /* Compute W */
 910    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_W)) {
 911       emit_store(gen, one_vec, inst, CHAN_W, FALSE);
 912    }
 913
 914    release_src_vecs(gen);
 915 }
 916
 917
 918 static void
 919 emit_exp(struct gen_context *gen, struct tgsi_full_instruction *inst)
 920 {
 921    const int one_vec = gen_one_vec(gen);
 922    int src_vec;
 923
 924    /* get src arg */
 925    src_vec = get_src_vec(gen, inst, 0, CHAN_X);
 926
 927    /* Compute X = 2^floor(src) */
 928    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X)) {
 929       int dst_vec = get_dst_vec(gen, inst, CHAN_X);
 930       int tmp_vec = ppc_allocate_vec_register(gen->f);
 931       ppc_vrfim(gen->f, tmp_vec, src_vec);             /* tmp = floor(src); */
 932       ppc_vexptefp(gen->f, dst_vec, tmp_vec);          /* dst = 2 ^ tmp */
 933       emit_store(gen, dst_vec, inst, CHAN_X, TRUE);
 934       ppc_release_vec_register(gen->f, tmp_vec);
 935    }
 936
 937    /* Compute Y = src - floor(src) */
 938    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y)) {
 939       int dst_vec = get_dst_vec(gen, inst, CHAN_Y);
 940       int tmp_vec = ppc_allocate_vec_register(gen->f);
 941       ppc_vrfim(gen->f, tmp_vec, src_vec);             /* tmp = floor(src); */
 942       ppc_vsubfp(gen->f, dst_vec, src_vec, tmp_vec);   /* dst = src - tmp */
 943       emit_store(gen, dst_vec, inst, CHAN_Y, TRUE);
 944       ppc_release_vec_register(gen->f, tmp_vec);
 945    }
 946
 947    /* Compute Z = RoughApprox2ToX(src) */
 948    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
 949       int dst_vec = get_dst_vec(gen, inst, CHAN_Z);
 950       ppc_vexptefp(gen->f, dst_vec, src_vec);          /* dst = 2 ^ src */
 951       emit_store(gen, dst_vec, inst, CHAN_Z, TRUE);
 952    }
 953
 954    /* Compute W = 1.0 */
 955    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_W)) {
 956       emit_store(gen, one_vec, inst, CHAN_W, FALSE);
 957    }
 958
 959    release_src_vecs(gen);
 960 }
 961
 962
 963 static void
 964 emit_log(struct gen_context *gen, struct tgsi_full_instruction *inst)
 965 {
 966    const int bit31_vec = gen_get_bit31_vec(gen);
 967    const int one_vec = gen_one_vec(gen);
 968    int src_vec, abs_vec;
 969
 970    /* get src arg */
 971    src_vec = get_src_vec(gen, inst, 0, CHAN_X);
 972
 973    /* compute abs(src) */
 974    abs_vec = ppc_allocate_vec_register(gen->f);
 975    ppc_vandc(gen->f, abs_vec, src_vec, bit31_vec);     /* abs = src & ~bit31 */
 976
 977    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X) &&
 978        IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y)) {
 979
 980       /* compute tmp = floor(log2(abs)) */
 981       int tmp_vec = ppc_allocate_vec_register(gen->f);
 982       ppc_vlogefp(gen->f, tmp_vec, abs_vec);           /* tmp = log2(abs) */
 983       ppc_vrfim(gen->f, tmp_vec, tmp_vec);             /* tmp = floor(tmp); */
 984
 985       /* Compute X = tmp */
 986       if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X)) {
 987          emit_store(gen, tmp_vec, inst, CHAN_X, FALSE);
 988       }
 989
 990       /* Compute Y = abs / 2^tmp */
 991       if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y)) {
 992          const int zero_vec = ppc_allocate_vec_register(gen->f);
 993          ppc_vzero(gen->f, zero_vec);
 994          ppc_vexptefp(gen->f, tmp_vec, tmp_vec);       /* tmp = 2 ^ tmp */
 995          ppc_vrefp(gen->f, tmp_vec, tmp_vec);          /* tmp = 1 / tmp */
 996          /* tmp = abs * tmp + zero */
 997          ppc_vmaddfp(gen->f, tmp_vec, abs_vec, tmp_vec, zero_vec);
 998          emit_store(gen, tmp_vec, inst, CHAN_Y, FALSE);
 999          ppc_release_vec_register(gen->f, zero_vec);
1000       }
1001
1002       ppc_release_vec_register(gen->f, tmp_vec);
1003    }
1004
1005    /* Compute Z = RoughApproxLog2(abs) */
1006    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
1007       int dst_vec = get_dst_vec(gen, inst, CHAN_Z);
1008       ppc_vlogefp(gen->f, dst_vec, abs_vec);           /* dst = log2(abs) */
1009       emit_store(gen, dst_vec, inst, CHAN_Z, TRUE);
1010    }
1011
1012    /* Compute W = 1.0 */
1013    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_W)) {
1014       emit_store(gen, one_vec, inst, CHAN_W, FALSE);
1015    }
1016
1017    ppc_release_vec_register(gen->f, abs_vec);
1018    release_src_vecs(gen);
1019 }
1020
1021
1022 static void
1023 emit_pow(struct gen_context *gen, struct tgsi_full_instruction *inst)
1024 {
1025    int s0_vec = get_src_vec(gen, inst, 0, CHAN_X);
1026    int s1_vec = get_src_vec(gen, inst, 1, CHAN_X);
1027    int pow_vec = ppc_allocate_vec_register(gen->f);
1028    int chan;
1029
1030    ppc_vec_pow(gen->f, pow_vec, s0_vec, s1_vec);
1031
1032    FOR_EACH_DST0_ENABLED_CHANNEL(*inst, chan) {
1033       emit_store(gen, pow_vec, inst, chan, FALSE);
1034    }
1035
1036    ppc_release_vec_register(gen->f, pow_vec);
1037
1038    release_src_vecs(gen);
1039 }
1040
1041
1042 static void
1043 emit_xpd(struct gen_context *gen, struct tgsi_full_instruction *inst)
1044 {
1045    int x0_vec, y0_vec, z0_vec;
1046    int x1_vec, y1_vec, z1_vec;
1047    int zero_vec, tmp_vec;
1048    int tmp2_vec;
1049
1050    zero_vec = ppc_allocate_vec_register(gen->f);
1051    ppc_vzero(gen->f, zero_vec);
1052
1053    tmp_vec = ppc_allocate_vec_register(gen->f);
1054    tmp2_vec = ppc_allocate_vec_register(gen->f);
1055
1056    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y) ||
1057        IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
1058       x0_vec = get_src_vec(gen, inst, 0, CHAN_X);
1059       x1_vec = get_src_vec(gen, inst, 1, CHAN_X);
1060    }
1061    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X) ||
1062        IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z)) {
1063       y0_vec = get_src_vec(gen, inst, 0, CHAN_Y);
1064       y1_vec = get_src_vec(gen, inst, 1, CHAN_Y);
1065    }
1066    if (IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X) ||
1067        IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y)) {
1068       z0_vec = get_src_vec(gen, inst, 0, CHAN_Z);
1069       z1_vec = get_src_vec(gen, inst, 1, CHAN_Z);
1070    }
1071
1072    IF_IS_DST0_CHANNEL_ENABLED(*inst, CHAN_X) {
1073       /* tmp = y0 * z1 */
1074       ppc_vmaddfp(gen->f, tmp_vec, y0_vec, z1_vec, zero_vec);
1075       /* tmp = tmp - z0 * y1*/
1076       ppc_vnmsubfp(gen->f, tmp_vec, tmp_vec, z0_vec, y1_vec);
1077       emit_store(gen, tmp_vec, inst, CHAN_X, FALSE);
1078    }
1079    IF_IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Y) {
1080       /* tmp = z0 * x1 */
1081       ppc_vmaddfp(gen->f, tmp_vec, z0_vec, x1_vec, zero_vec);
1082       /* tmp = tmp - x0 * z1 */
1083       ppc_vnmsubfp(gen->f, tmp_vec, tmp_vec, x0_vec, z1_vec);
1084       emit_store(gen, tmp_vec, inst, CHAN_Y, FALSE);
1085    }
1086    IF_IS_DST0_CHANNEL_ENABLED(*inst, CHAN_Z) {
1087       /* tmp = x0 * y1 */
1088       ppc_vmaddfp(gen->f, tmp_vec, x0_vec, y1_vec, zero_vec);
1089       /* tmp = tmp - y0 * x1 */
1090       ppc_vnmsubfp(gen->f, tmp_vec, tmp_vec, y0_vec, x1_vec);
1091       emit_store(gen, tmp_vec, inst, CHAN_Z, FALSE);
1092    }
1093    /* W is undefined */
1094
1095    ppc_release_vec_register(gen->f, tmp_vec);
1096    ppc_release_vec_register(gen->f, zero_vec);
1097    release_src_vecs(gen);
1098 }
1099
1100 static int
1101 emit_instruction(struct gen_context *gen,
1102                  struct tgsi_full_instruction *inst)
1103 {
1104
1105    /* we don't handle saturation/clamping yet */
1106    if (inst->Instruction.Saturate != TGSI_SAT_NONE)
1107       return 0;
1108
1109    /* need to use extra temps to fix SOA dependencies : */
1110    if (tgsi_check_soa_dependencies(inst))
1111       return FALSE;
1112
1113    switch (inst->Instruction.Opcode) {
1114    case TGSI_OPCODE_MOV:
1115    case TGSI_OPCODE_ABS:
1116    case TGSI_OPCODE_FLR:
1117    case TGSI_OPCODE_FRC:
1118    case TGSI_OPCODE_EX2:
1119    case TGSI_OPCODE_LG2:
1120       emit_unaryop(gen, inst);
1121       break;
1122    case TGSI_OPCODE_RSQ:
1123    case TGSI_OPCODE_RCP:
1124       emit_scalar_unaryop(gen, inst);
1125       break;
1126    case TGSI_OPCODE_ADD:
1127    case TGSI_OPCODE_SUB:
1128    case TGSI_OPCODE_MUL:
1129    case TGSI_OPCODE_MIN:
1130    case TGSI_OPCODE_MAX:
1131       emit_binop(gen, inst);
1132       break;
1133    case TGSI_OPCODE_SEQ:
1134    case TGSI_OPCODE_SNE:
1135    case TGSI_OPCODE_SLT:
1136    case TGSI_OPCODE_SGT:
1137    case TGSI_OPCODE_SLE:
1138    case TGSI_OPCODE_SGE:
1139       emit_inequality(gen, inst);
1140       break;
1141    case TGSI_OPCODE_MAD:
1142    case TGSI_OPCODE_LRP:
1143       emit_triop(gen, inst);
1144       break;
1145    case TGSI_OPCODE_DP3:
1146    case TGSI_OPCODE_DP4:
1147    case TGSI_OPCODE_DPH:
1148       emit_dotprod(gen, inst);
1149       break;
1150    case TGSI_OPCODE_LIT:
1151       emit_lit(gen, inst);
1152       break;
1153    case TGSI_OPCODE_LOG:
1154       emit_log(gen, inst);
1155       break;
1156    case TGSI_OPCODE_EXP:
1157       emit_exp(gen, inst);
1158       break;
1159    case TGSI_OPCODE_POW:
1160       emit_pow(gen, inst);
1161       break;
1162    case TGSI_OPCODE_XPD:
1163       emit_xpd(gen, inst);
1164       break;
1165    case TGSI_OPCODE_END:
1166       /* normal end */
1167       return 1;
1168    default:
1169       return 0;
1170    }
1171    return 1;
1172 }
1173
1174
1175 static void
1176 emit_declaration(
1177    struct ppc_function *func,
1178    struct tgsi_full_declaration *decl )
1179 {
1180    if( decl->Declaration.File == TGSI_FILE_INPUT ||
1181        decl->Declaration.File == TGSI_FILE_SYSTEM_VALUE ) {
1182 #if 0
1183       unsigned first, last, mask;
1184       unsigned i, j;
1185
1186       first = decl->Range.First;
1187       last = decl->Range.Last;
1188       mask = decl->Declaration.UsageMask;
1189
1190       for( i = first; i <= last; i++ ) {
1191          for( j = 0; j < NUM_CHANNELS; j++ ) {
1192             if( mask & (1 << j) ) {
1193                switch( decl->Declaration.Interpolate ) {
1194                case TGSI_INTERPOLATE_CONSTANT:
1195                   emit_coef_a0( func, 0, i, j );
1196                   emit_inputs( func, 0, i, j );
1197                   break;
1198
1199                case TGSI_INTERPOLATE_LINEAR:
1200                   emit_tempf( func, 0, 0, TGSI_SWIZZLE_X );
1201                   emit_coef_dadx( func, 1, i, j );
1202                   emit_tempf( func, 2, 0, TGSI_SWIZZLE_Y );
1203                   emit_coef_dady( func, 3, i, j );
1204                   emit_mul( func, 0, 1 );    /* x * dadx */
1205                   emit_coef_a0( func, 4, i, j );
1206                   emit_mul( func, 2, 3 );    /* y * dady */
1207                   emit_add( func, 0, 4 );    /* x * dadx + a0 */
1208                   emit_add( func, 0, 2 );    /* x * dadx + y * dady + a0 */
1209                   emit_inputs( func, 0, i, j );
1210                   break;
1211
1212                case TGSI_INTERPOLATE_PERSPECTIVE:
1213                   emit_tempf( func, 0, 0, TGSI_SWIZZLE_X );
1214                   emit_coef_dadx( func, 1, i, j );
1215                   emit_tempf( func, 2, 0, TGSI_SWIZZLE_Y );
1216                   emit_coef_dady( func, 3, i, j );
1217                   emit_mul( func, 0, 1 );    /* x * dadx */
1218                   emit_tempf( func, 4, 0, TGSI_SWIZZLE_W );
1219                   emit_coef_a0( func, 5, i, j );
1220                   emit_rcp( func, 4, 4 );    /* 1.0 / w */
1221                   emit_mul( func, 2, 3 );    /* y * dady */
1222                   emit_add( func, 0, 5 );    /* x * dadx + a0 */
1223                   emit_add( func, 0, 2 );    /* x * dadx + y * dady + a0 */
1224                   emit_mul( func, 0, 4 );    /* (x * dadx + y * dady + a0) / w */
1225                   emit_inputs( func, 0, i, j );
1226                   break;
1227
1228                default:
1229                   assert( 0 );
1230                   break;
1231                }
1232             }
1233          }
1234       }
1235 #endif
1236    }
1237 }
1238
1239
1240
1241 static void
1242 emit_prologue(struct ppc_function *func)
1243 {
1244    /* XXX set up stack frame */
1245 }
1246
1247
1248 static void
1249 emit_epilogue(struct ppc_function *func)
1250 {
1251    ppc_comment(func, -4, "Epilogue:");
1252    ppc_return(func);
1253    /* XXX restore prev stack frame */
1254 #if 0
1255    debug_printf("PPC: Emitted %u instructions\n", func->num_inst);
1256 #endif
1257 }
1258
1259
1260
1261 /**
1262  * Translate a TGSI vertex/fragment shader to PPC code.
1263  *
1264  * \param tokens  the TGSI input shader
1265  * \param func  the output PPC code/function
1266  * \param immediates  buffer to place immediates, later passed to PPC func
1267  * \return TRUE for success, FALSE if translation failed
1268  */
1269 boolean
1270 tgsi_emit_ppc(const struct tgsi_token *tokens,
1271               struct ppc_function *func,
1272               float (*immediates)[4],
1273               boolean do_swizzles )
1274 {
1275    static int use_ppc_asm = -1;
1276    struct tgsi_parse_context parse;
1277    /*boolean instruction_phase = FALSE;*/
1278    unsigned ok = 1;
1279    uint num_immediates = 0;
1280    struct gen_context gen;
1281    uint ic = 0;
1282
1283    if (use_ppc_asm < 0) {
1284       /* If GALLIUM_NOPPC is set, don't use PPC codegen */
1285       use_ppc_asm = !debug_get_bool_option("GALLIUM_NOPPC", FALSE);
1286    }
1287    if (!use_ppc_asm)
1288       return FALSE;
1289
1290    if (0) {
1291       debug_printf("\n********* TGSI->PPC ********\n");
1292       tgsi_dump(tokens, 0);
1293    }
1294
1295    util_init_math();
1296
1297    init_gen_context(&gen, func);
1298
1299    emit_prologue(func);
1300
1301    tgsi_parse_init( &parse, tokens );
1302
1303    while (!tgsi_parse_end_of_tokens(&parse) && ok) {
1304       tgsi_parse_token(&parse);
1305
1306       switch (parse.FullToken.Token.Type) {
1307       case TGSI_TOKEN_TYPE_DECLARATION:
1308          if (parse.FullHeader.Processor.Processor == TGSI_PROCESSOR_FRAGMENT) {
1309             emit_declaration(func, &parse.FullToken.FullDeclaration );
1310          }
1311          break;
1312
1313       case TGSI_TOKEN_TYPE_INSTRUCTION:
1314          if (func->print) {
1315             _debug_printf("# ");
1316             ic++;
1317             tgsi_dump_instruction(&parse.FullToken.FullInstruction, ic);
1318          }
1319
1320          ok = emit_instruction(&gen, &parse.FullToken.FullInstruction);
1321
1322          if (!ok) {
1323             uint opcode = parse.FullToken.FullInstruction.Instruction.Opcode;
1324             debug_printf("failed to translate tgsi opcode %d (%s) to PPC (%s)\n",
1325                          opcode,
1326                          tgsi_get_opcode_name(opcode),
1327                          parse.FullHeader.Processor.Processor == TGSI_PROCESSOR_VERTEX ?
1328                          "vertex shader" : "fragment shader");
1329          }
1330          break;
1331
1332       case TGSI_TOKEN_TYPE_IMMEDIATE:
1333          /* splat each immediate component into a float[4] vector for SoA */
1334          {
1335             const uint size = parse.FullToken.FullImmediate.Immediate.NrTokens - 1;
1336             uint i;
1337             assert(size <= 4);
1338             assert(num_immediates < TGSI_EXEC_NUM_IMMEDIATES);
1339             for (i = 0; i < size; i++) {
1340                immediates[num_immediates][i] =
1341                   parse.FullToken.FullImmediate.u[i].Float;
1342             }
1343             num_immediates++;
1344          }
1345          break;
1346
1347       case TGSI_TOKEN_TYPE_PROPERTY:
1348          break;
1349
1350       default:
1351          ok = 0;
1352          assert( 0 );
1353       }
1354    }
1355
1356    emit_epilogue(func);
1357
1358    tgsi_parse_free( &parse );
1359
1360    if (ppc_num_instructions(func) == 0) {
1361       /* ran out of memory for instructions */
1362       ok = FALSE;
1363    }
1364
1365    if (!ok)
1366       debug_printf("TGSI->PPC translation failed\n");
1367
1368    return ok;
1369 }
1370
1371 #else
1372
1373 void ppc_dummy_func(void);
1374
1375 void ppc_dummy_func(void)
1376 {
1377 }
1378
1379 #endif /* PIPE_ARCH_PPC */