src/gallium/auxiliary/tgsi/tgsi_scan.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2008 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 /**
  30  * TGSI program scan utility.
  31  * Used to determine which registers and instructions are used by a shader.
  32  *
  33  * Authors:  Brian Paul
  34  */
  35
  36
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_memory.h"
  40 #include "util/u_prim.h"
  41 #include "tgsi/tgsi_info.h"
  42 #include "tgsi/tgsi_parse.h"
  43 #include "tgsi/tgsi_util.h"
  44 #include "tgsi/tgsi_scan.h"
  45
  46
  47 static bool
  48 is_memory_file(unsigned file)
  49 {
  50    return file == TGSI_FILE_SAMPLER ||
  51           file == TGSI_FILE_SAMPLER_VIEW ||
  52           file == TGSI_FILE_IMAGE ||
  53           file == TGSI_FILE_BUFFER;
  54 }
  55
  56
  57 static bool
  58 is_mem_query_inst(unsigned opcode)
  59 {
  60    return opcode == TGSI_OPCODE_RESQ ||
  61           opcode == TGSI_OPCODE_TXQ ||
  62           opcode == TGSI_OPCODE_TXQS ||
  63           opcode == TGSI_OPCODE_TXQ_LZ ||
  64           opcode == TGSI_OPCODE_LODQ;
  65 }
  66
  67 /**
  68  * Is the opcode a "true" texture instruction which samples from a
  69  * texture map?
  70  */
  71 static bool
  72 is_texture_inst(unsigned opcode)
  73 {
  74    return (!is_mem_query_inst(opcode) &&
  75            tgsi_get_opcode_info(opcode)->is_tex);
  76 }
  77
  78
  79 /**
  80  * Is the opcode an instruction which computes a derivative explicitly or
  81  * implicitly?
  82  */
  83 static bool
  84 computes_derivative(unsigned opcode)
  85 {
  86    if (tgsi_get_opcode_info(opcode)->is_tex) {
  87       return opcode != TGSI_OPCODE_TG4 &&
  88              opcode != TGSI_OPCODE_TXD &&
  89              opcode != TGSI_OPCODE_TXF &&
  90              opcode != TGSI_OPCODE_TXL &&
  91              opcode != TGSI_OPCODE_TXL2 &&
  92              opcode != TGSI_OPCODE_TXQ &&
  93              opcode != TGSI_OPCODE_TXQ_LZ &&
  94              opcode != TGSI_OPCODE_TXQS;
  95    }
  96
  97    return opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE ||
  98           opcode == TGSI_OPCODE_DDY || opcode == TGSI_OPCODE_DDY_FINE ||
  99           opcode == TGSI_OPCODE_SAMPLE ||
 100           opcode == TGSI_OPCODE_SAMPLE_B ||
 101           opcode == TGSI_OPCODE_SAMPLE_C;
 102 }
 103
 104
 105 static void
 106 scan_src_operand(struct tgsi_shader_info *info,
 107                  const struct tgsi_full_instruction *fullinst,
 108                  const struct tgsi_full_src_register *src,
 109                  unsigned src_index,
 110                  unsigned usage_mask,
 111                  bool is_interp_instruction,
 112                  bool *is_mem_inst)
 113 {
 114    int ind = src->Register.Index;
 115
 116    /* Mark which inputs are effectively used */
 117    if (src->Register.File == TGSI_FILE_INPUT) {
 118       if (src->Register.Indirect) {
 119          for (ind = 0; ind < info->num_inputs; ++ind) {
 120             info->input_usage_mask[ind] |= usage_mask;
 121          }
 122       } else {
 123          assert(ind >= 0);
 124          assert(ind < PIPE_MAX_SHADER_INPUTS);
 125          info->input_usage_mask[ind] |= usage_mask;
 126       }
 127
 128       if (info->processor == PIPE_SHADER_FRAGMENT) {
 129          unsigned name, index, input;
 130
 131          if (src->Register.Indirect && src->Indirect.ArrayID)
 132             input = info->input_array_first[src->Indirect.ArrayID];
 133          else
 134             input = src->Register.Index;
 135
 136          name = info->input_semantic_name[input];
 137          index = info->input_semantic_index[input];
 138
 139          if (name == TGSI_SEMANTIC_POSITION &&
 140              (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
 141               src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
 142               src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
 143               src->Register.SwizzleW == TGSI_SWIZZLE_Z))
 144             info->reads_z = TRUE;
 145
 146          if (name == TGSI_SEMANTIC_COLOR) {
 147             unsigned mask =
 148                (1 << src->Register.SwizzleX) |
 149                (1 << src->Register.SwizzleY) |
 150                (1 << src->Register.SwizzleZ) |
 151                (1 << src->Register.SwizzleW);
 152
 153             info->colors_read |= mask << (index * 4);
 154          }
 155
 156          /* Process only interpolated varyings. Don't include POSITION.
 157           * Don't include integer varyings, because they are not
 158           * interpolated. Don't process inputs interpolated by INTERP
 159           * opcodes. Those are tracked separately.
 160           */
 161          if ((!is_interp_instruction || src_index != 0) &&
 162              (name == TGSI_SEMANTIC_GENERIC ||
 163               name == TGSI_SEMANTIC_TEXCOORD ||
 164               name == TGSI_SEMANTIC_COLOR ||
 165               name == TGSI_SEMANTIC_BCOLOR ||
 166               name == TGSI_SEMANTIC_FOG ||
 167               name == TGSI_SEMANTIC_CLIPDIST)) {
 168             switch (info->input_interpolate[input]) {
 169             case TGSI_INTERPOLATE_COLOR:
 170             case TGSI_INTERPOLATE_PERSPECTIVE:
 171                switch (info->input_interpolate_loc[input]) {
 172                case TGSI_INTERPOLATE_LOC_CENTER:
 173                   info->uses_persp_center = TRUE;
 174                   break;
 175                case TGSI_INTERPOLATE_LOC_CENTROID:
 176                   info->uses_persp_centroid = TRUE;
 177                   break;
 178                case TGSI_INTERPOLATE_LOC_SAMPLE:
 179                   info->uses_persp_sample = TRUE;
 180                   break;
 181                }
 182                break;
 183             case TGSI_INTERPOLATE_LINEAR:
 184                switch (info->input_interpolate_loc[input]) {
 185                case TGSI_INTERPOLATE_LOC_CENTER:
 186                   info->uses_linear_center = TRUE;
 187                   break;
 188                case TGSI_INTERPOLATE_LOC_CENTROID:
 189                   info->uses_linear_centroid = TRUE;
 190                   break;
 191                case TGSI_INTERPOLATE_LOC_SAMPLE:
 192                   info->uses_linear_sample = TRUE;
 193                   break;
 194                }
 195                break;
 196                /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */
 197             }
 198          }
 199       }
 200    }
 201
 202    /* check for indirect register reads */
 203    if (src->Register.Indirect) {
 204       info->indirect_files |= (1 << src->Register.File);
 205       info->indirect_files_read |= (1 << src->Register.File);
 206
 207       /* record indirect constant buffer indexing */
 208       if (src->Register.File == TGSI_FILE_CONSTANT) {
 209          if (src->Register.Dimension) {
 210             if (src->Dimension.Indirect)
 211                info->const_buffers_indirect = info->const_buffers_declared;
 212             else
 213                info->const_buffers_indirect |= 1u << src->Dimension.Index;
 214          } else {
 215             info->const_buffers_indirect |= 1;
 216          }
 217       }
 218    }
 219
 220    if (src->Register.Dimension && src->Dimension.Indirect)
 221       info->dim_indirect_files |= 1u << src->Register.File;
 222
 223    /* Texture samplers */
 224    if (src->Register.File == TGSI_FILE_SAMPLER) {
 225       const unsigned index = src->Register.Index;
 226
 227       assert(fullinst->Instruction.Texture);
 228       assert(index < ARRAY_SIZE(info->is_msaa_sampler));
 229       assert(index < PIPE_MAX_SAMPLERS);
 230
 231       if (is_texture_inst(fullinst->Instruction.Opcode)) {
 232          const unsigned target = fullinst->Texture.Texture;
 233          assert(target < TGSI_TEXTURE_UNKNOWN);
 234          /* for texture instructions, check that the texture instruction
 235           * target matches the previous sampler view declaration (if there
 236           * was one.)
 237           */
 238          if (info->sampler_targets[index] == TGSI_TEXTURE_UNKNOWN) {
 239             /* probably no sampler view declaration */
 240             info->sampler_targets[index] = target;
 241          } else {
 242             /* Make sure the texture instruction's sampler/target info
 243              * agrees with the sampler view declaration.
 244              */
 245             assert(info->sampler_targets[index] == target);
 246          }
 247          /* MSAA samplers */
 248          if (target == TGSI_TEXTURE_2D_MSAA ||
 249              target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
 250             info->is_msaa_sampler[src->Register.Index] = TRUE;
 251          }
 252       }
 253    }
 254
 255    if (is_memory_file(src->Register.File) &&
 256        !is_mem_query_inst(fullinst->Instruction.Opcode)) {
 257       *is_mem_inst = true;
 258
 259       if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) {
 260          info->writes_memory = TRUE;
 261
 262          if (src->Register.File == TGSI_FILE_IMAGE) {
 263             if (src->Register.Indirect)
 264                info->images_writemask = info->images_declared;
 265             else
 266                info->images_writemask |= 1 << src->Register.Index;
 267          } else if (src->Register.File == TGSI_FILE_BUFFER) {
 268             if (src->Register.Indirect)
 269                info->shader_buffers_atomic = info->shader_buffers_declared;
 270             else
 271                info->shader_buffers_atomic |= 1 << src->Register.Index;
 272          }
 273       } else {
 274          if (src->Register.File == TGSI_FILE_BUFFER) {
 275             if (src->Register.Indirect)
 276                info->shader_buffers_load = info->shader_buffers_declared;
 277             else
 278                info->shader_buffers_load |= 1 << src->Register.Index;
 279          }
 280       }
 281    }
 282 }
 283
 284
 285 static void
 286 scan_instruction(struct tgsi_shader_info *info,
 287                  const struct tgsi_full_instruction *fullinst,
 288                  unsigned *current_depth)
 289 {
 290    unsigned i;
 291    bool is_mem_inst = false;
 292    bool is_interp_instruction = false;
 293
 294    assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST);
 295    info->opcode_count[fullinst->Instruction.Opcode]++;
 296
 297    switch (fullinst->Instruction.Opcode) {
 298    case TGSI_OPCODE_IF:
 299    case TGSI_OPCODE_UIF:
 300    case TGSI_OPCODE_BGNLOOP:
 301       (*current_depth)++;
 302       info->max_depth = MAX2(info->max_depth, *current_depth);
 303       break;
 304    case TGSI_OPCODE_ENDIF:
 305    case TGSI_OPCODE_ENDLOOP:
 306       (*current_depth)--;
 307       break;
 308    default:
 309       break;
 310    }
 311
 312    if (fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_CENTROID ||
 313        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET ||
 314        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
 315       const struct tgsi_full_src_register *src0 = &fullinst->Src[0];
 316       unsigned input;
 317
 318       is_interp_instruction = true;
 319
 320       if (src0->Register.Indirect && src0->Indirect.ArrayID)
 321          input = info->input_array_first[src0->Indirect.ArrayID];
 322       else
 323          input = src0->Register.Index;
 324
 325       /* For the INTERP opcodes, the interpolation is always
 326        * PERSPECTIVE unless LINEAR is specified.
 327        */
 328       switch (info->input_interpolate[input]) {
 329       case TGSI_INTERPOLATE_COLOR:
 330       case TGSI_INTERPOLATE_CONSTANT:
 331       case TGSI_INTERPOLATE_PERSPECTIVE:
 332          switch (fullinst->Instruction.Opcode) {
 333          case TGSI_OPCODE_INTERP_CENTROID:
 334             info->uses_persp_opcode_interp_centroid = TRUE;
 335             break;
 336          case TGSI_OPCODE_INTERP_OFFSET:
 337             info->uses_persp_opcode_interp_offset = TRUE;
 338             break;
 339          case TGSI_OPCODE_INTERP_SAMPLE:
 340             info->uses_persp_opcode_interp_sample = TRUE;
 341             break;
 342          }
 343          break;
 344
 345       case TGSI_INTERPOLATE_LINEAR:
 346          switch (fullinst->Instruction.Opcode) {
 347          case TGSI_OPCODE_INTERP_CENTROID:
 348             info->uses_linear_opcode_interp_centroid = TRUE;
 349             break;
 350          case TGSI_OPCODE_INTERP_OFFSET:
 351             info->uses_linear_opcode_interp_offset = TRUE;
 352             break;
 353          case TGSI_OPCODE_INTERP_SAMPLE:
 354             info->uses_linear_opcode_interp_sample = TRUE;
 355             break;
 356          }
 357          break;
 358       }
 359    }
 360
 361    if (fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D &&
 362        fullinst->Instruction.Opcode <= TGSI_OPCODE_DSSG)
 363       info->uses_doubles = TRUE;
 364
 365    for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
 366       scan_src_operand(info, fullinst, &fullinst->Src[i], i,
 367                        tgsi_util_get_inst_usage_mask(fullinst, i),
 368                        is_interp_instruction, &is_mem_inst);
 369    }
 370
 371    /* check for indirect register writes */
 372    for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
 373       const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
 374       if (dst->Register.Indirect) {
 375          info->indirect_files |= (1 << dst->Register.File);
 376          info->indirect_files_written |= (1 << dst->Register.File);
 377       }
 378
 379       if (dst->Register.Dimension && dst->Dimension.Indirect)
 380          info->dim_indirect_files |= 1u << dst->Register.File;
 381
 382       if (is_memory_file(dst->Register.File)) {
 383          assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);
 384
 385          is_mem_inst = true;
 386          info->writes_memory = TRUE;
 387
 388          if (dst->Register.File == TGSI_FILE_IMAGE) {
 389             if (dst->Register.Indirect)
 390                info->images_writemask = info->images_declared;
 391             else
 392                info->images_writemask |= 1 << dst->Register.Index;
 393          } else if (dst->Register.File == TGSI_FILE_BUFFER) {
 394             if (dst->Register.Indirect)
 395                info->shader_buffers_store = info->shader_buffers_declared;
 396             else
 397                info->shader_buffers_store |= 1 << dst->Register.Index;
 398          }
 399       }
 400    }
 401
 402    if (is_mem_inst)
 403       info->num_memory_instructions++;
 404
 405    if (computes_derivative(fullinst->Instruction.Opcode))
 406       info->uses_derivatives = true;
 407
 408    info->num_instructions++;
 409 }
 410
 411
 412 static void
 413 scan_declaration(struct tgsi_shader_info *info,
 414                  const struct tgsi_full_declaration *fulldecl)
 415 {
 416    const uint file = fulldecl->Declaration.File;
 417    const unsigned procType = info->processor;
 418    uint reg;
 419
 420    if (fulldecl->Declaration.Array) {
 421       unsigned array_id = fulldecl->Array.ArrayID;
 422
 423       switch (file) {
 424       case TGSI_FILE_INPUT:
 425          assert(array_id < ARRAY_SIZE(info->input_array_first));
 426          info->input_array_first[array_id] = fulldecl->Range.First;
 427          info->input_array_last[array_id] = fulldecl->Range.Last;
 428          break;
 429       case TGSI_FILE_OUTPUT:
 430          assert(array_id < ARRAY_SIZE(info->output_array_first));
 431          info->output_array_first[array_id] = fulldecl->Range.First;
 432          info->output_array_last[array_id] = fulldecl->Range.Last;
 433          break;
 434       }
 435       info->array_max[file] = MAX2(info->array_max[file], array_id);
 436    }
 437
 438    for (reg = fulldecl->Range.First; reg <= fulldecl->Range.Last; reg++) {
 439       unsigned semName = fulldecl->Semantic.Name;
 440       unsigned semIndex = fulldecl->Semantic.Index +
 441          (reg - fulldecl->Range.First);
 442
 443       /* only first 32 regs will appear in this bitfield */
 444       info->file_mask[file] |= (1 << reg);
 445       info->file_count[file]++;
 446       info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 447
 448       if (file == TGSI_FILE_CONSTANT) {
 449          int buffer = 0;
 450
 451          if (fulldecl->Declaration.Dimension)
 452             buffer = fulldecl->Dim.Index2D;
 453
 454          info->const_file_max[buffer] =
 455             MAX2(info->const_file_max[buffer], (int)reg);
 456          info->const_buffers_declared |= 1u << buffer;
 457       } else if (file == TGSI_FILE_IMAGE) {
 458          info->images_declared |= 1u << reg;
 459       } else if (file == TGSI_FILE_BUFFER) {
 460          info->shader_buffers_declared |= 1u << reg;
 461       } else if (file == TGSI_FILE_INPUT) {
 462          info->input_semantic_name[reg] = (ubyte) semName;
 463          info->input_semantic_index[reg] = (ubyte) semIndex;
 464          info->input_interpolate[reg] = (ubyte)fulldecl->Interp.Interpolate;
 465          info->input_interpolate_loc[reg] = (ubyte)fulldecl->Interp.Location;
 466          info->input_cylindrical_wrap[reg] = (ubyte)fulldecl->Interp.CylindricalWrap;
 467
 468          /* Vertex shaders can have inputs with holes between them. */
 469          info->num_inputs = MAX2(info->num_inputs, reg + 1);
 470
 471          if (semName == TGSI_SEMANTIC_PRIMID)
 472             info->uses_primid = TRUE;
 473          else if (procType == PIPE_SHADER_FRAGMENT) {
 474             if (semName == TGSI_SEMANTIC_POSITION)
 475                info->reads_position = TRUE;
 476             else if (semName == TGSI_SEMANTIC_FACE)
 477                info->uses_frontface = TRUE;
 478          }
 479       }
 480       else if (file == TGSI_FILE_SYSTEM_VALUE) {
 481          unsigned index = fulldecl->Range.First;
 482
 483          info->system_value_semantic_name[index] = semName;
 484          info->num_system_values = MAX2(info->num_system_values, index + 1);
 485
 486          switch (semName) {
 487          case TGSI_SEMANTIC_INSTANCEID:
 488             info->uses_instanceid = TRUE;
 489             break;
 490          case TGSI_SEMANTIC_VERTEXID:
 491             info->uses_vertexid = TRUE;
 492             break;
 493          case TGSI_SEMANTIC_VERTEXID_NOBASE:
 494             info->uses_vertexid_nobase = TRUE;
 495             break;
 496          case TGSI_SEMANTIC_BASEVERTEX:
 497             info->uses_basevertex = TRUE;
 498             break;
 499          case TGSI_SEMANTIC_PRIMID:
 500             info->uses_primid = TRUE;
 501             break;
 502          case TGSI_SEMANTIC_INVOCATIONID:
 503             info->uses_invocationid = TRUE;
 504             break;
 505          case TGSI_SEMANTIC_POSITION:
 506             info->reads_position = TRUE;
 507             break;
 508          case TGSI_SEMANTIC_FACE:
 509             info->uses_frontface = TRUE;
 510             break;
 511          case TGSI_SEMANTIC_SAMPLEMASK:
 512             info->reads_samplemask = TRUE;
 513             break;
 514          }
 515       }
 516       else if (file == TGSI_FILE_OUTPUT) {
 517          info->output_semantic_name[reg] = (ubyte) semName;
 518          info->output_semantic_index[reg] = (ubyte) semIndex;
 519          info->num_outputs = MAX2(info->num_outputs, reg + 1);
 520
 521          if (semName == TGSI_SEMANTIC_COLOR)
 522             info->colors_written |= 1 << semIndex;
 523
 524          if (procType == PIPE_SHADER_VERTEX ||
 525              procType == PIPE_SHADER_GEOMETRY ||
 526              procType == PIPE_SHADER_TESS_CTRL ||
 527              procType == PIPE_SHADER_TESS_EVAL) {
 528             switch (semName) {
 529             case TGSI_SEMANTIC_VIEWPORT_INDEX:
 530                info->writes_viewport_index = TRUE;
 531                break;
 532             case TGSI_SEMANTIC_LAYER:
 533                info->writes_layer = TRUE;
 534                break;
 535             case TGSI_SEMANTIC_PSIZE:
 536                info->writes_psize = TRUE;
 537                break;
 538             case TGSI_SEMANTIC_CLIPVERTEX:
 539                info->writes_clipvertex = TRUE;
 540                break;
 541             }
 542          }
 543
 544          if (procType == PIPE_SHADER_FRAGMENT) {
 545             switch (semName) {
 546             case TGSI_SEMANTIC_POSITION:
 547                info->writes_z = TRUE;
 548                break;
 549             case TGSI_SEMANTIC_STENCIL:
 550                info->writes_stencil = TRUE;
 551                break;
 552             case TGSI_SEMANTIC_SAMPLEMASK:
 553                info->writes_samplemask = TRUE;
 554                break;
 555             }
 556          }
 557
 558          if (procType == PIPE_SHADER_VERTEX) {
 559             if (semName == TGSI_SEMANTIC_EDGEFLAG) {
 560                info->writes_edgeflag = TRUE;
 561             }
 562          }
 563       } else if (file == TGSI_FILE_SAMPLER) {
 564          STATIC_ASSERT(sizeof(info->samplers_declared) * 8 >= PIPE_MAX_SAMPLERS);
 565          info->samplers_declared |= 1u << reg;
 566       } else if (file == TGSI_FILE_SAMPLER_VIEW) {
 567          unsigned target = fulldecl->SamplerView.Resource;
 568          unsigned type = fulldecl->SamplerView.ReturnTypeX;
 569
 570          assert(target < TGSI_TEXTURE_UNKNOWN);
 571          if (info->sampler_targets[reg] == TGSI_TEXTURE_UNKNOWN) {
 572             /* Save sampler target for this sampler index */
 573             info->sampler_targets[reg] = target;
 574             info->sampler_type[reg] = type;
 575          } else {
 576             /* if previously declared, make sure targets agree */
 577             assert(info->sampler_targets[reg] == target);
 578             assert(info->sampler_type[reg] == type);
 579          }
 580       } else if (file == TGSI_FILE_IMAGE) {
 581          if (fulldecl->Image.Resource == TGSI_TEXTURE_BUFFER)
 582             info->images_buffers |= 1 << reg;
 583       }
 584    }
 585 }
 586
 587
 588 static void
 589 scan_immediate(struct tgsi_shader_info *info)
 590 {
 591    uint reg = info->immediate_count++;
 592    uint file = TGSI_FILE_IMMEDIATE;
 593
 594    info->file_mask[file] |= (1 << reg);
 595    info->file_count[file]++;
 596    info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 597 }
 598
 599
 600 static void
 601 scan_property(struct tgsi_shader_info *info,
 602               const struct tgsi_full_property *fullprop)
 603 {
 604    unsigned name = fullprop->Property.PropertyName;
 605    unsigned value = fullprop->u[0].Data;
 606
 607    assert(name < ARRAY_SIZE(info->properties));
 608    info->properties[name] = value;
 609
 610    switch (name) {
 611    case TGSI_PROPERTY_NUM_CLIPDIST_ENABLED:
 612       info->num_written_clipdistance = value;
 613       info->clipdist_writemask |= (1 << value) - 1;
 614       break;
 615    case TGSI_PROPERTY_NUM_CULLDIST_ENABLED:
 616       info->num_written_culldistance = value;
 617       info->culldist_writemask |= (1 << value) - 1;
 618       break;
 619    }
 620 }
 621
 622
 623 /**
 624  * Scan the given TGSI shader to collect information such as number of
 625  * registers used, special instructions used, etc.
 626  * \return info  the result of the scan
 627  */
 628 void
 629 tgsi_scan_shader(const struct tgsi_token *tokens,
 630                  struct tgsi_shader_info *info)
 631 {
 632    uint procType, i;
 633    struct tgsi_parse_context parse;
 634    unsigned current_depth = 0;
 635
 636    memset(info, 0, sizeof(*info));
 637    for (i = 0; i < TGSI_FILE_COUNT; i++)
 638       info->file_max[i] = -1;
 639    for (i = 0; i < ARRAY_SIZE(info->const_file_max); i++)
 640       info->const_file_max[i] = -1;
 641    info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = 1;
 642    for (i = 0; i < ARRAY_SIZE(info->sampler_targets); i++)
 643       info->sampler_targets[i] = TGSI_TEXTURE_UNKNOWN;
 644
 645    /**
 646     ** Setup to begin parsing input shader
 647     **/
 648    if (tgsi_parse_init( &parse, tokens ) != TGSI_PARSE_OK) {
 649       debug_printf("tgsi_parse_init() failed in tgsi_scan_shader()!\n");
 650       return;
 651    }
 652    procType = parse.FullHeader.Processor.Processor;
 653    assert(procType == PIPE_SHADER_FRAGMENT ||
 654           procType == PIPE_SHADER_VERTEX ||
 655           procType == PIPE_SHADER_GEOMETRY ||
 656           procType == PIPE_SHADER_TESS_CTRL ||
 657           procType == PIPE_SHADER_TESS_EVAL ||
 658           procType == PIPE_SHADER_COMPUTE);
 659    info->processor = procType;
 660
 661    /**
 662     ** Loop over incoming program tokens/instructions
 663     */
 664    while (!tgsi_parse_end_of_tokens(&parse)) {
 665       info->num_tokens++;
 666
 667       tgsi_parse_token( &parse );
 668
 669       switch( parse.FullToken.Token.Type ) {
 670       case TGSI_TOKEN_TYPE_INSTRUCTION:
 671          scan_instruction(info, &parse.FullToken.FullInstruction,
 672                           &current_depth);
 673          break;
 674       case TGSI_TOKEN_TYPE_DECLARATION:
 675          scan_declaration(info, &parse.FullToken.FullDeclaration);
 676          break;
 677       case TGSI_TOKEN_TYPE_IMMEDIATE:
 678          scan_immediate(info);
 679          break;
 680       case TGSI_TOKEN_TYPE_PROPERTY:
 681          scan_property(info, &parse.FullToken.FullProperty);
 682          break;
 683       default:
 684          assert(!"Unexpected TGSI token type");
 685       }
 686    }
 687
 688    info->uses_kill = (info->opcode_count[TGSI_OPCODE_KILL_IF] ||
 689                       info->opcode_count[TGSI_OPCODE_KILL]);
 690
 691    /* The dimensions of the IN decleration in geometry shader have
 692     * to be deduced from the type of the input primitive.
 693     */
 694    if (procType == PIPE_SHADER_GEOMETRY) {
 695       unsigned input_primitive =
 696             info->properties[TGSI_PROPERTY_GS_INPUT_PRIM];
 697       int num_verts = u_vertices_per_prim(input_primitive);
 698       int j;
 699       info->file_count[TGSI_FILE_INPUT] = num_verts;
 700       info->file_max[TGSI_FILE_INPUT] =
 701             MAX2(info->file_max[TGSI_FILE_INPUT], num_verts - 1);
 702       for (j = 0; j < num_verts; ++j) {
 703          info->file_mask[TGSI_FILE_INPUT] |= (1 << j);
 704       }
 705    }
 706
 707    tgsi_parse_free(&parse);
 708 }
 709
 710 /**
 711  * Collect information about the arrays of a given register file.
 712  *
 713  * @param tokens TGSI shader
 714  * @param file the register file to scan through
 715  * @param max_array_id number of entries in @p arrays; should be equal to the
 716  *                     highest array id, i.e. tgsi_shader_info::array_max[file].
 717  * @param arrays info for array of each ID will be written to arrays[ID - 1].
 718  */
 719 void
 720 tgsi_scan_arrays(const struct tgsi_token *tokens,
 721                  unsigned file,
 722                  unsigned max_array_id,
 723                  struct tgsi_array_info *arrays)
 724 {
 725    struct tgsi_parse_context parse;
 726
 727    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 728       debug_printf("tgsi_parse_init() failed in tgsi_scan_arrays()!\n");
 729       return;
 730    }
 731
 732    memset(arrays, 0, sizeof(arrays[0]) * max_array_id);
 733
 734    while (!tgsi_parse_end_of_tokens(&parse)) {
 735       struct tgsi_full_instruction *inst;
 736
 737       tgsi_parse_token(&parse);
 738
 739       if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) {
 740          struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
 741
 742          if (decl->Declaration.Array && decl->Declaration.File == file &&
 743              decl->Array.ArrayID > 0 && decl->Array.ArrayID <= max_array_id) {
 744             struct tgsi_array_info *array = &arrays[decl->Array.ArrayID - 1];
 745             assert(!array->declared);
 746             array->declared = true;
 747             array->range = decl->Range;
 748          }
 749       }
 750
 751       if (parse.FullToken.Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
 752          continue;
 753
 754       inst = &parse.FullToken.FullInstruction;
 755       for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) {
 756          const struct tgsi_full_dst_register *dst = &inst->Dst[i];
 757          if (dst->Register.File != file)
 758             continue;
 759
 760          if (dst->Register.Indirect) {
 761             if (dst->Indirect.ArrayID > 0 &&
 762                 dst->Indirect.ArrayID <= max_array_id) {
 763                arrays[dst->Indirect.ArrayID - 1].writemask |= dst->Register.WriteMask;
 764             } else {
 765                /* Indirect writes without an ArrayID can write anywhere. */
 766                for (unsigned j = 0; j < max_array_id; ++j)
 767                   arrays[j].writemask |= dst->Register.WriteMask;
 768             }
 769          } else {
 770             /* Check whether the write falls into any of the arrays anyway. */
 771             for (unsigned j = 0; j < max_array_id; ++j) {
 772                struct tgsi_array_info *array = &arrays[j];
 773                if (array->declared &&
 774                    dst->Register.Index >= array->range.First &&
 775                    dst->Register.Index <= array->range.Last)
 776                   array->writemask |= dst->Register.WriteMask;
 777             }
 778          }
 779       }
 780    }
 781
 782    tgsi_parse_free(&parse);
 783
 784    return;
 785 }
 786
 787
 788 /**
 789  * Check if the given shader is a "passthrough" shader consisting of only
 790  * MOV instructions of the form:  MOV OUT[n], IN[n]
 791  *
 792  */
 793 boolean
 794 tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
 795 {
 796    struct tgsi_parse_context parse;
 797
 798    /**
 799     ** Setup to begin parsing input shader
 800     **/
 801    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 802       debug_printf("tgsi_parse_init() failed in tgsi_is_passthrough_shader()!\n");
 803       return FALSE;
 804    }
 805
 806    /**
 807     ** Loop over incoming program tokens/instructions
 808     */
 809    while (!tgsi_parse_end_of_tokens(&parse)) {
 810
 811       tgsi_parse_token(&parse);
 812
 813       switch (parse.FullToken.Token.Type) {
 814       case TGSI_TOKEN_TYPE_INSTRUCTION:
 815          {
 816             struct tgsi_full_instruction *fullinst =
 817                &parse.FullToken.FullInstruction;
 818             const struct tgsi_full_src_register *src =
 819                &fullinst->Src[0];
 820             const struct tgsi_full_dst_register *dst =
 821                &fullinst->Dst[0];
 822
 823             /* Do a whole bunch of checks for a simple move */
 824             if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
 825                 (src->Register.File != TGSI_FILE_INPUT &&
 826                  src->Register.File != TGSI_FILE_SYSTEM_VALUE) ||
 827                 dst->Register.File != TGSI_FILE_OUTPUT ||
 828                 src->Register.Index != dst->Register.Index ||
 829
 830                 src->Register.Negate ||
 831                 src->Register.Absolute ||
 832
 833                 src->Register.SwizzleX != TGSI_SWIZZLE_X ||
 834                 src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
 835                 src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
 836                 src->Register.SwizzleW != TGSI_SWIZZLE_W ||
 837
 838                 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
 839             {
 840                tgsi_parse_free(&parse);
 841                return FALSE;
 842             }
 843          }
 844          break;
 845
 846       case TGSI_TOKEN_TYPE_DECLARATION:
 847          /* fall-through */
 848       case TGSI_TOKEN_TYPE_IMMEDIATE:
 849          /* fall-through */
 850       case TGSI_TOKEN_TYPE_PROPERTY:
 851          /* fall-through */
 852       default:
 853          ; /* no-op */
 854       }
 855    }
 856
 857    tgsi_parse_free(&parse);
 858
 859    /* if we get here, it's a pass-through shader */
 860    return TRUE;
 861 }