src/gallium/auxiliary/tgsi/tgsi_scan.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2008 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 /**
  30  * TGSI program scan utility.
  31  * Used to determine which registers and instructions are used by a shader.
  32  *
  33  * Authors:  Brian Paul
  34  */
  35
  36
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_memory.h"
  40 #include "util/u_prim.h"
  41 #include "tgsi/tgsi_info.h"
  42 #include "tgsi/tgsi_parse.h"
  43 #include "tgsi/tgsi_util.h"
  44 #include "tgsi/tgsi_scan.h"
  45
  46
  47 static bool
  48 is_memory_file(unsigned file)
  49 {
  50    return file == TGSI_FILE_SAMPLER ||
  51           file == TGSI_FILE_SAMPLER_VIEW ||
  52           file == TGSI_FILE_IMAGE ||
  53           file == TGSI_FILE_BUFFER;
  54 }
  55
  56
  57 static bool
  58 is_mem_query_inst(unsigned opcode)
  59 {
  60    return opcode == TGSI_OPCODE_RESQ ||
  61           opcode == TGSI_OPCODE_TXQ ||
  62           opcode == TGSI_OPCODE_TXQS ||
  63           opcode == TGSI_OPCODE_TXQ_LZ ||
  64           opcode == TGSI_OPCODE_LODQ;
  65 }
  66
  67 /**
  68  * Is the opcode a "true" texture instruction which samples from a
  69  * texture map?
  70  */
  71 static bool
  72 is_texture_inst(unsigned opcode)
  73 {
  74    return (!is_mem_query_inst(opcode) &&
  75            tgsi_get_opcode_info(opcode)->is_tex);
  76 }
  77
  78
  79 /**
  80  * Is the opcode an instruction which computes a derivative explicitly or
  81  * implicitly?
  82  */
  83 static bool
  84 computes_derivative(unsigned opcode)
  85 {
  86    if (tgsi_get_opcode_info(opcode)->is_tex) {
  87       return opcode != TGSI_OPCODE_TG4 &&
  88              opcode != TGSI_OPCODE_TXD &&
  89              opcode != TGSI_OPCODE_TXF &&
  90              opcode != TGSI_OPCODE_TXL &&
  91              opcode != TGSI_OPCODE_TXL2 &&
  92              opcode != TGSI_OPCODE_TXQ &&
  93              opcode != TGSI_OPCODE_TXQ_LZ &&
  94              opcode != TGSI_OPCODE_TXQS;
  95    }
  96
  97    return opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE ||
  98           opcode == TGSI_OPCODE_DDY || opcode == TGSI_OPCODE_DDY_FINE ||
  99           opcode == TGSI_OPCODE_SAMPLE ||
 100           opcode == TGSI_OPCODE_SAMPLE_B ||
 101           opcode == TGSI_OPCODE_SAMPLE_C;
 102 }
 103
 104
 105 static void
 106 scan_instruction(struct tgsi_shader_info *info,
 107                  const struct tgsi_full_instruction *fullinst,
 108                  unsigned *current_depth)
 109 {
 110    unsigned i;
 111    bool is_mem_inst = false;
 112    bool is_interp_instruction = false;
 113
 114    assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST);
 115    info->opcode_count[fullinst->Instruction.Opcode]++;
 116
 117    switch (fullinst->Instruction.Opcode) {
 118    case TGSI_OPCODE_IF:
 119    case TGSI_OPCODE_UIF:
 120    case TGSI_OPCODE_BGNLOOP:
 121       (*current_depth)++;
 122       info->max_depth = MAX2(info->max_depth, *current_depth);
 123       break;
 124    case TGSI_OPCODE_ENDIF:
 125    case TGSI_OPCODE_ENDLOOP:
 126       (*current_depth)--;
 127       break;
 128    default:
 129       break;
 130    }
 131
 132    if (fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_CENTROID ||
 133        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET ||
 134        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
 135       const struct tgsi_full_src_register *src0 = &fullinst->Src[0];
 136       unsigned input;
 137
 138       is_interp_instruction = true;
 139
 140       if (src0->Register.Indirect && src0->Indirect.ArrayID)
 141          input = info->input_array_first[src0->Indirect.ArrayID];
 142       else
 143          input = src0->Register.Index;
 144
 145       /* For the INTERP opcodes, the interpolation is always
 146        * PERSPECTIVE unless LINEAR is specified.
 147        */
 148       switch (info->input_interpolate[input]) {
 149       case TGSI_INTERPOLATE_COLOR:
 150       case TGSI_INTERPOLATE_CONSTANT:
 151       case TGSI_INTERPOLATE_PERSPECTIVE:
 152          switch (fullinst->Instruction.Opcode) {
 153          case TGSI_OPCODE_INTERP_CENTROID:
 154             info->uses_persp_opcode_interp_centroid = TRUE;
 155             break;
 156          case TGSI_OPCODE_INTERP_OFFSET:
 157             info->uses_persp_opcode_interp_offset = TRUE;
 158             break;
 159          case TGSI_OPCODE_INTERP_SAMPLE:
 160             info->uses_persp_opcode_interp_sample = TRUE;
 161             break;
 162          }
 163          break;
 164
 165       case TGSI_INTERPOLATE_LINEAR:
 166          switch (fullinst->Instruction.Opcode) {
 167          case TGSI_OPCODE_INTERP_CENTROID:
 168             info->uses_linear_opcode_interp_centroid = TRUE;
 169             break;
 170          case TGSI_OPCODE_INTERP_OFFSET:
 171             info->uses_linear_opcode_interp_offset = TRUE;
 172             break;
 173          case TGSI_OPCODE_INTERP_SAMPLE:
 174             info->uses_linear_opcode_interp_sample = TRUE;
 175             break;
 176          }
 177          break;
 178       }
 179    }
 180
 181    if (fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D &&
 182        fullinst->Instruction.Opcode <= TGSI_OPCODE_DSSG)
 183       info->uses_doubles = TRUE;
 184
 185    for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
 186       const struct tgsi_full_src_register *src = &fullinst->Src[i];
 187       int ind = src->Register.Index;
 188
 189       /* Mark which inputs are effectively used */
 190       if (src->Register.File == TGSI_FILE_INPUT) {
 191          unsigned usage_mask;
 192          usage_mask = tgsi_util_get_inst_usage_mask(fullinst, i);
 193          if (src->Register.Indirect) {
 194             for (ind = 0; ind < info->num_inputs; ++ind) {
 195                info->input_usage_mask[ind] |= usage_mask;
 196             }
 197          } else {
 198             assert(ind >= 0);
 199             assert(ind < PIPE_MAX_SHADER_INPUTS);
 200             info->input_usage_mask[ind] |= usage_mask;
 201          }
 202
 203          if (info->processor == PIPE_SHADER_FRAGMENT) {
 204             unsigned name, index, input;
 205
 206             if (src->Register.Indirect && src->Indirect.ArrayID)
 207                input = info->input_array_first[src->Indirect.ArrayID];
 208             else
 209                input = src->Register.Index;
 210
 211             name = info->input_semantic_name[input];
 212             index = info->input_semantic_index[input];
 213
 214             if (name == TGSI_SEMANTIC_POSITION &&
 215                 (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
 216                  src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
 217                  src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
 218                  src->Register.SwizzleW == TGSI_SWIZZLE_Z))
 219                info->reads_z = TRUE;
 220
 221             if (name == TGSI_SEMANTIC_COLOR) {
 222                unsigned mask =
 223                   (1 << src->Register.SwizzleX) |
 224                   (1 << src->Register.SwizzleY) |
 225                   (1 << src->Register.SwizzleZ) |
 226                   (1 << src->Register.SwizzleW);
 227
 228                info->colors_read |= mask << (index * 4);
 229             }
 230
 231             /* Process only interpolated varyings. Don't include POSITION.
 232              * Don't include integer varyings, because they are not
 233              * interpolated. Don't process inputs interpolated by INTERP
 234              * opcodes. Those are tracked separately.
 235              */
 236             if ((!is_interp_instruction || i != 0) &&
 237                 (name == TGSI_SEMANTIC_GENERIC ||
 238                  name == TGSI_SEMANTIC_TEXCOORD ||
 239                  name == TGSI_SEMANTIC_COLOR ||
 240                  name == TGSI_SEMANTIC_BCOLOR ||
 241                  name == TGSI_SEMANTIC_FOG ||
 242                  name == TGSI_SEMANTIC_CLIPDIST)) {
 243                switch (info->input_interpolate[input]) {
 244                case TGSI_INTERPOLATE_COLOR:
 245                case TGSI_INTERPOLATE_PERSPECTIVE:
 246                   switch (info->input_interpolate_loc[input]) {
 247                   case TGSI_INTERPOLATE_LOC_CENTER:
 248                      info->uses_persp_center = TRUE;
 249                      break;
 250                   case TGSI_INTERPOLATE_LOC_CENTROID:
 251                      info->uses_persp_centroid = TRUE;
 252                      break;
 253                   case TGSI_INTERPOLATE_LOC_SAMPLE:
 254                      info->uses_persp_sample = TRUE;
 255                      break;
 256                   }
 257                   break;
 258                case TGSI_INTERPOLATE_LINEAR:
 259                   switch (info->input_interpolate_loc[input]) {
 260                   case TGSI_INTERPOLATE_LOC_CENTER:
 261                      info->uses_linear_center = TRUE;
 262                      break;
 263                   case TGSI_INTERPOLATE_LOC_CENTROID:
 264                      info->uses_linear_centroid = TRUE;
 265                      break;
 266                   case TGSI_INTERPOLATE_LOC_SAMPLE:
 267                      info->uses_linear_sample = TRUE;
 268                      break;
 269                   }
 270                   break;
 271                   /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */
 272                }
 273             }
 274          }
 275       }
 276
 277       /* check for indirect register reads */
 278       if (src->Register.Indirect) {
 279          info->indirect_files |= (1 << src->Register.File);
 280          info->indirect_files_read |= (1 << src->Register.File);
 281
 282          /* record indirect constant buffer indexing */
 283          if (src->Register.File == TGSI_FILE_CONSTANT) {
 284             if (src->Register.Dimension) {
 285                if (src->Dimension.Indirect)
 286                   info->const_buffers_indirect = info->const_buffers_declared;
 287                else
 288                   info->const_buffers_indirect |= 1u << src->Dimension.Index;
 289             } else {
 290                info->const_buffers_indirect |= 1;
 291             }
 292          }
 293       }
 294
 295       if (src->Register.Dimension && src->Dimension.Indirect)
 296          info->dim_indirect_files |= 1u << src->Register.File;
 297
 298       /* Texture samplers */
 299       if (src->Register.File == TGSI_FILE_SAMPLER) {
 300          const unsigned index = src->Register.Index;
 301
 302          assert(fullinst->Instruction.Texture);
 303          assert(index < ARRAY_SIZE(info->is_msaa_sampler));
 304          assert(index < PIPE_MAX_SAMPLERS);
 305
 306          if (is_texture_inst(fullinst->Instruction.Opcode)) {
 307             const unsigned target = fullinst->Texture.Texture;
 308             assert(target < TGSI_TEXTURE_UNKNOWN);
 309             /* for texture instructions, check that the texture instruction
 310              * target matches the previous sampler view declaration (if there
 311              * was one.)
 312              */
 313             if (info->sampler_targets[index] == TGSI_TEXTURE_UNKNOWN) {
 314                /* probably no sampler view declaration */
 315                info->sampler_targets[index] = target;
 316             } else {
 317                /* Make sure the texture instruction's sampler/target info
 318                 * agrees with the sampler view declaration.
 319                 */
 320                assert(info->sampler_targets[index] == target);
 321             }
 322             /* MSAA samplers */
 323             if (target == TGSI_TEXTURE_2D_MSAA ||
 324                 target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
 325                info->is_msaa_sampler[src->Register.Index] = TRUE;
 326             }
 327          }
 328       }
 329
 330       if (is_memory_file(src->Register.File) &&
 331           !is_mem_query_inst(fullinst->Instruction.Opcode)) {
 332          is_mem_inst = true;
 333
 334          if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) {
 335             info->writes_memory = TRUE;
 336
 337             if (src->Register.File == TGSI_FILE_IMAGE) {
 338                if (src->Register.Indirect)
 339                   info->images_writemask = info->images_declared;
 340                else
 341                   info->images_writemask |= 1 << src->Register.Index;
 342             } else if (src->Register.File == TGSI_FILE_BUFFER) {
 343                if (src->Register.Indirect)
 344                   info->shader_buffers_atomic = info->shader_buffers_declared;
 345                else
 346                   info->shader_buffers_atomic |= 1 << src->Register.Index;
 347             }
 348          } else {
 349             if (src->Register.File == TGSI_FILE_BUFFER) {
 350                if (src->Register.Indirect)
 351                   info->shader_buffers_load = info->shader_buffers_declared;
 352                else
 353                   info->shader_buffers_load |= 1 << src->Register.Index;
 354             }
 355          }
 356       }
 357    }
 358
 359    /* check for indirect register writes */
 360    for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
 361       const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
 362       if (dst->Register.Indirect) {
 363          info->indirect_files |= (1 << dst->Register.File);
 364          info->indirect_files_written |= (1 << dst->Register.File);
 365       }
 366
 367       if (dst->Register.Dimension && dst->Dimension.Indirect)
 368          info->dim_indirect_files |= 1u << dst->Register.File;
 369
 370       if (is_memory_file(dst->Register.File)) {
 371          assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);
 372
 373          is_mem_inst = true;
 374          info->writes_memory = TRUE;
 375
 376          if (dst->Register.File == TGSI_FILE_IMAGE) {
 377             if (dst->Register.Indirect)
 378                info->images_writemask = info->images_declared;
 379             else
 380                info->images_writemask |= 1 << dst->Register.Index;
 381          } else if (dst->Register.File == TGSI_FILE_BUFFER) {
 382             if (dst->Register.Indirect)
 383                info->shader_buffers_store = info->shader_buffers_declared;
 384             else
 385                info->shader_buffers_store |= 1 << dst->Register.Index;
 386          }
 387       }
 388    }
 389
 390    if (is_mem_inst)
 391       info->num_memory_instructions++;
 392
 393    if (computes_derivative(fullinst->Instruction.Opcode))
 394       info->uses_derivatives = true;
 395
 396    info->num_instructions++;
 397 }
 398
 399
 400 static void
 401 scan_declaration(struct tgsi_shader_info *info,
 402                  const struct tgsi_full_declaration *fulldecl)
 403 {
 404    const uint file = fulldecl->Declaration.File;
 405    const unsigned procType = info->processor;
 406    uint reg;
 407
 408    if (fulldecl->Declaration.Array) {
 409       unsigned array_id = fulldecl->Array.ArrayID;
 410
 411       switch (file) {
 412       case TGSI_FILE_INPUT:
 413          assert(array_id < ARRAY_SIZE(info->input_array_first));
 414          info->input_array_first[array_id] = fulldecl->Range.First;
 415          info->input_array_last[array_id] = fulldecl->Range.Last;
 416          break;
 417       case TGSI_FILE_OUTPUT:
 418          assert(array_id < ARRAY_SIZE(info->output_array_first));
 419          info->output_array_first[array_id] = fulldecl->Range.First;
 420          info->output_array_last[array_id] = fulldecl->Range.Last;
 421          break;
 422       }
 423       info->array_max[file] = MAX2(info->array_max[file], array_id);
 424    }
 425
 426    for (reg = fulldecl->Range.First; reg <= fulldecl->Range.Last; reg++) {
 427       unsigned semName = fulldecl->Semantic.Name;
 428       unsigned semIndex = fulldecl->Semantic.Index +
 429          (reg - fulldecl->Range.First);
 430
 431       /* only first 32 regs will appear in this bitfield */
 432       info->file_mask[file] |= (1 << reg);
 433       info->file_count[file]++;
 434       info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 435
 436       if (file == TGSI_FILE_CONSTANT) {
 437          int buffer = 0;
 438
 439          if (fulldecl->Declaration.Dimension)
 440             buffer = fulldecl->Dim.Index2D;
 441
 442          info->const_file_max[buffer] =
 443             MAX2(info->const_file_max[buffer], (int)reg);
 444          info->const_buffers_declared |= 1u << buffer;
 445       } else if (file == TGSI_FILE_IMAGE) {
 446          info->images_declared |= 1u << reg;
 447       } else if (file == TGSI_FILE_BUFFER) {
 448          info->shader_buffers_declared |= 1u << reg;
 449       } else if (file == TGSI_FILE_INPUT) {
 450          info->input_semantic_name[reg] = (ubyte) semName;
 451          info->input_semantic_index[reg] = (ubyte) semIndex;
 452          info->input_interpolate[reg] = (ubyte)fulldecl->Interp.Interpolate;
 453          info->input_interpolate_loc[reg] = (ubyte)fulldecl->Interp.Location;
 454          info->input_cylindrical_wrap[reg] = (ubyte)fulldecl->Interp.CylindricalWrap;
 455
 456          /* Vertex shaders can have inputs with holes between them. */
 457          info->num_inputs = MAX2(info->num_inputs, reg + 1);
 458
 459          if (semName == TGSI_SEMANTIC_PRIMID)
 460             info->uses_primid = TRUE;
 461          else if (procType == PIPE_SHADER_FRAGMENT) {
 462             if (semName == TGSI_SEMANTIC_POSITION)
 463                info->reads_position = TRUE;
 464             else if (semName == TGSI_SEMANTIC_FACE)
 465                info->uses_frontface = TRUE;
 466          }
 467       }
 468       else if (file == TGSI_FILE_SYSTEM_VALUE) {
 469          unsigned index = fulldecl->Range.First;
 470
 471          info->system_value_semantic_name[index] = semName;
 472          info->num_system_values = MAX2(info->num_system_values, index + 1);
 473
 474          switch (semName) {
 475          case TGSI_SEMANTIC_INSTANCEID:
 476             info->uses_instanceid = TRUE;
 477             break;
 478          case TGSI_SEMANTIC_VERTEXID:
 479             info->uses_vertexid = TRUE;
 480             break;
 481          case TGSI_SEMANTIC_VERTEXID_NOBASE:
 482             info->uses_vertexid_nobase = TRUE;
 483             break;
 484          case TGSI_SEMANTIC_BASEVERTEX:
 485             info->uses_basevertex = TRUE;
 486             break;
 487          case TGSI_SEMANTIC_PRIMID:
 488             info->uses_primid = TRUE;
 489             break;
 490          case TGSI_SEMANTIC_INVOCATIONID:
 491             info->uses_invocationid = TRUE;
 492             break;
 493          case TGSI_SEMANTIC_POSITION:
 494             info->reads_position = TRUE;
 495             break;
 496          case TGSI_SEMANTIC_FACE:
 497             info->uses_frontface = TRUE;
 498             break;
 499          case TGSI_SEMANTIC_SAMPLEMASK:
 500             info->reads_samplemask = TRUE;
 501             break;
 502          }
 503       }
 504       else if (file == TGSI_FILE_OUTPUT) {
 505          info->output_semantic_name[reg] = (ubyte) semName;
 506          info->output_semantic_index[reg] = (ubyte) semIndex;
 507          info->num_outputs = MAX2(info->num_outputs, reg + 1);
 508
 509          if (semName == TGSI_SEMANTIC_COLOR)
 510             info->colors_written |= 1 << semIndex;
 511
 512          if (procType == PIPE_SHADER_VERTEX ||
 513              procType == PIPE_SHADER_GEOMETRY ||
 514              procType == PIPE_SHADER_TESS_CTRL ||
 515              procType == PIPE_SHADER_TESS_EVAL) {
 516             switch (semName) {
 517             case TGSI_SEMANTIC_VIEWPORT_INDEX:
 518                info->writes_viewport_index = TRUE;
 519                break;
 520             case TGSI_SEMANTIC_LAYER:
 521                info->writes_layer = TRUE;
 522                break;
 523             case TGSI_SEMANTIC_PSIZE:
 524                info->writes_psize = TRUE;
 525                break;
 526             case TGSI_SEMANTIC_CLIPVERTEX:
 527                info->writes_clipvertex = TRUE;
 528                break;
 529             }
 530          }
 531
 532          if (procType == PIPE_SHADER_FRAGMENT) {
 533             switch (semName) {
 534             case TGSI_SEMANTIC_POSITION:
 535                info->writes_z = TRUE;
 536                break;
 537             case TGSI_SEMANTIC_STENCIL:
 538                info->writes_stencil = TRUE;
 539                break;
 540             case TGSI_SEMANTIC_SAMPLEMASK:
 541                info->writes_samplemask = TRUE;
 542                break;
 543             }
 544          }
 545
 546          if (procType == PIPE_SHADER_VERTEX) {
 547             if (semName == TGSI_SEMANTIC_EDGEFLAG) {
 548                info->writes_edgeflag = TRUE;
 549             }
 550          }
 551       } else if (file == TGSI_FILE_SAMPLER) {
 552          STATIC_ASSERT(sizeof(info->samplers_declared) * 8 >= PIPE_MAX_SAMPLERS);
 553          info->samplers_declared |= 1u << reg;
 554       } else if (file == TGSI_FILE_SAMPLER_VIEW) {
 555          unsigned target = fulldecl->SamplerView.Resource;
 556          unsigned type = fulldecl->SamplerView.ReturnTypeX;
 557
 558          assert(target < TGSI_TEXTURE_UNKNOWN);
 559          if (info->sampler_targets[reg] == TGSI_TEXTURE_UNKNOWN) {
 560             /* Save sampler target for this sampler index */
 561             info->sampler_targets[reg] = target;
 562             info->sampler_type[reg] = type;
 563          } else {
 564             /* if previously declared, make sure targets agree */
 565             assert(info->sampler_targets[reg] == target);
 566             assert(info->sampler_type[reg] == type);
 567          }
 568       } else if (file == TGSI_FILE_IMAGE) {
 569          if (fulldecl->Image.Resource == TGSI_TEXTURE_BUFFER)
 570             info->images_buffers |= 1 << reg;
 571       }
 572    }
 573 }
 574
 575
 576 static void
 577 scan_immediate(struct tgsi_shader_info *info)
 578 {
 579    uint reg = info->immediate_count++;
 580    uint file = TGSI_FILE_IMMEDIATE;
 581
 582    info->file_mask[file] |= (1 << reg);
 583    info->file_count[file]++;
 584    info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 585 }
 586
 587
 588 static void
 589 scan_property(struct tgsi_shader_info *info,
 590               const struct tgsi_full_property *fullprop)
 591 {
 592    unsigned name = fullprop->Property.PropertyName;
 593    unsigned value = fullprop->u[0].Data;
 594
 595    assert(name < ARRAY_SIZE(info->properties));
 596    info->properties[name] = value;
 597
 598    switch (name) {
 599    case TGSI_PROPERTY_NUM_CLIPDIST_ENABLED:
 600       info->num_written_clipdistance = value;
 601       info->clipdist_writemask |= (1 << value) - 1;
 602       break;
 603    case TGSI_PROPERTY_NUM_CULLDIST_ENABLED:
 604       info->num_written_culldistance = value;
 605       info->culldist_writemask |= (1 << value) - 1;
 606       break;
 607    }
 608 }
 609
 610
 611 /**
 612  * Scan the given TGSI shader to collect information such as number of
 613  * registers used, special instructions used, etc.
 614  * \return info  the result of the scan
 615  */
 616 void
 617 tgsi_scan_shader(const struct tgsi_token *tokens,
 618                  struct tgsi_shader_info *info)
 619 {
 620    uint procType, i;
 621    struct tgsi_parse_context parse;
 622    unsigned current_depth = 0;
 623
 624    memset(info, 0, sizeof(*info));
 625    for (i = 0; i < TGSI_FILE_COUNT; i++)
 626       info->file_max[i] = -1;
 627    for (i = 0; i < ARRAY_SIZE(info->const_file_max); i++)
 628       info->const_file_max[i] = -1;
 629    info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = 1;
 630    for (i = 0; i < ARRAY_SIZE(info->sampler_targets); i++)
 631       info->sampler_targets[i] = TGSI_TEXTURE_UNKNOWN;
 632
 633    /**
 634     ** Setup to begin parsing input shader
 635     **/
 636    if (tgsi_parse_init( &parse, tokens ) != TGSI_PARSE_OK) {
 637       debug_printf("tgsi_parse_init() failed in tgsi_scan_shader()!\n");
 638       return;
 639    }
 640    procType = parse.FullHeader.Processor.Processor;
 641    assert(procType == PIPE_SHADER_FRAGMENT ||
 642           procType == PIPE_SHADER_VERTEX ||
 643           procType == PIPE_SHADER_GEOMETRY ||
 644           procType == PIPE_SHADER_TESS_CTRL ||
 645           procType == PIPE_SHADER_TESS_EVAL ||
 646           procType == PIPE_SHADER_COMPUTE);
 647    info->processor = procType;
 648
 649    /**
 650     ** Loop over incoming program tokens/instructions
 651     */
 652    while (!tgsi_parse_end_of_tokens(&parse)) {
 653       info->num_tokens++;
 654
 655       tgsi_parse_token( &parse );
 656
 657       switch( parse.FullToken.Token.Type ) {
 658       case TGSI_TOKEN_TYPE_INSTRUCTION:
 659          scan_instruction(info, &parse.FullToken.FullInstruction,
 660                           &current_depth);
 661          break;
 662       case TGSI_TOKEN_TYPE_DECLARATION:
 663          scan_declaration(info, &parse.FullToken.FullDeclaration);
 664          break;
 665       case TGSI_TOKEN_TYPE_IMMEDIATE:
 666          scan_immediate(info);
 667          break;
 668       case TGSI_TOKEN_TYPE_PROPERTY:
 669          scan_property(info, &parse.FullToken.FullProperty);
 670          break;
 671       default:
 672          assert(!"Unexpected TGSI token type");
 673       }
 674    }
 675
 676    info->uses_kill = (info->opcode_count[TGSI_OPCODE_KILL_IF] ||
 677                       info->opcode_count[TGSI_OPCODE_KILL]);
 678
 679    /* The dimensions of the IN decleration in geometry shader have
 680     * to be deduced from the type of the input primitive.
 681     */
 682    if (procType == PIPE_SHADER_GEOMETRY) {
 683       unsigned input_primitive =
 684             info->properties[TGSI_PROPERTY_GS_INPUT_PRIM];
 685       int num_verts = u_vertices_per_prim(input_primitive);
 686       int j;
 687       info->file_count[TGSI_FILE_INPUT] = num_verts;
 688       info->file_max[TGSI_FILE_INPUT] =
 689             MAX2(info->file_max[TGSI_FILE_INPUT], num_verts - 1);
 690       for (j = 0; j < num_verts; ++j) {
 691          info->file_mask[TGSI_FILE_INPUT] |= (1 << j);
 692       }
 693    }
 694
 695    tgsi_parse_free(&parse);
 696 }
 697
 698 /**
 699  * Collect information about the arrays of a given register file.
 700  *
 701  * @param tokens TGSI shader
 702  * @param file the register file to scan through
 703  * @param max_array_id number of entries in @p arrays; should be equal to the
 704  *                     highest array id, i.e. tgsi_shader_info::array_max[file].
 705  * @param arrays info for array of each ID will be written to arrays[ID - 1].
 706  */
 707 void
 708 tgsi_scan_arrays(const struct tgsi_token *tokens,
 709                  unsigned file,
 710                  unsigned max_array_id,
 711                  struct tgsi_array_info *arrays)
 712 {
 713    struct tgsi_parse_context parse;
 714
 715    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 716       debug_printf("tgsi_parse_init() failed in tgsi_scan_arrays()!\n");
 717       return;
 718    }
 719
 720    memset(arrays, 0, sizeof(arrays[0]) * max_array_id);
 721
 722    while (!tgsi_parse_end_of_tokens(&parse)) {
 723       struct tgsi_full_instruction *inst;
 724
 725       tgsi_parse_token(&parse);
 726
 727       if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) {
 728          struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
 729
 730          if (decl->Declaration.Array && decl->Declaration.File == file &&
 731              decl->Array.ArrayID > 0 && decl->Array.ArrayID <= max_array_id) {
 732             struct tgsi_array_info *array = &arrays[decl->Array.ArrayID - 1];
 733             assert(!array->declared);
 734             array->declared = true;
 735             array->range = decl->Range;
 736          }
 737       }
 738
 739       if (parse.FullToken.Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
 740          continue;
 741
 742       inst = &parse.FullToken.FullInstruction;
 743       for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) {
 744          const struct tgsi_full_dst_register *dst = &inst->Dst[i];
 745          if (dst->Register.File != file)
 746             continue;
 747
 748          if (dst->Register.Indirect) {
 749             if (dst->Indirect.ArrayID > 0 &&
 750                 dst->Indirect.ArrayID <= max_array_id) {
 751                arrays[dst->Indirect.ArrayID - 1].writemask |= dst->Register.WriteMask;
 752             } else {
 753                /* Indirect writes without an ArrayID can write anywhere. */
 754                for (unsigned j = 0; j < max_array_id; ++j)
 755                   arrays[j].writemask |= dst->Register.WriteMask;
 756             }
 757          } else {
 758             /* Check whether the write falls into any of the arrays anyway. */
 759             for (unsigned j = 0; j < max_array_id; ++j) {
 760                struct tgsi_array_info *array = &arrays[j];
 761                if (array->declared &&
 762                    dst->Register.Index >= array->range.First &&
 763                    dst->Register.Index <= array->range.Last)
 764                   array->writemask |= dst->Register.WriteMask;
 765             }
 766          }
 767       }
 768    }
 769
 770    tgsi_parse_free(&parse);
 771
 772    return;
 773 }
 774
 775
 776 /**
 777  * Check if the given shader is a "passthrough" shader consisting of only
 778  * MOV instructions of the form:  MOV OUT[n], IN[n]
 779  *
 780  */
 781 boolean
 782 tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
 783 {
 784    struct tgsi_parse_context parse;
 785
 786    /**
 787     ** Setup to begin parsing input shader
 788     **/
 789    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 790       debug_printf("tgsi_parse_init() failed in tgsi_is_passthrough_shader()!\n");
 791       return FALSE;
 792    }
 793
 794    /**
 795     ** Loop over incoming program tokens/instructions
 796     */
 797    while (!tgsi_parse_end_of_tokens(&parse)) {
 798
 799       tgsi_parse_token(&parse);
 800
 801       switch (parse.FullToken.Token.Type) {
 802       case TGSI_TOKEN_TYPE_INSTRUCTION:
 803          {
 804             struct tgsi_full_instruction *fullinst =
 805                &parse.FullToken.FullInstruction;
 806             const struct tgsi_full_src_register *src =
 807                &fullinst->Src[0];
 808             const struct tgsi_full_dst_register *dst =
 809                &fullinst->Dst[0];
 810
 811             /* Do a whole bunch of checks for a simple move */
 812             if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
 813                 (src->Register.File != TGSI_FILE_INPUT &&
 814                  src->Register.File != TGSI_FILE_SYSTEM_VALUE) ||
 815                 dst->Register.File != TGSI_FILE_OUTPUT ||
 816                 src->Register.Index != dst->Register.Index ||
 817
 818                 src->Register.Negate ||
 819                 src->Register.Absolute ||
 820
 821                 src->Register.SwizzleX != TGSI_SWIZZLE_X ||
 822                 src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
 823                 src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
 824                 src->Register.SwizzleW != TGSI_SWIZZLE_W ||
 825
 826                 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
 827             {
 828                tgsi_parse_free(&parse);
 829                return FALSE;
 830             }
 831          }
 832          break;
 833
 834       case TGSI_TOKEN_TYPE_DECLARATION:
 835          /* fall-through */
 836       case TGSI_TOKEN_TYPE_IMMEDIATE:
 837          /* fall-through */
 838       case TGSI_TOKEN_TYPE_PROPERTY:
 839          /* fall-through */
 840       default:
 841          ; /* no-op */
 842       }
 843    }
 844
 845    tgsi_parse_free(&parse);
 846
 847    /* if we get here, it's a pass-through shader */
 848    return TRUE;
 849 }