1 /**************************************************************************
3 * Copyright 2008 VMware, Inc.
5 * Copyright 2008 VMware, Inc. All rights Reserved.
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the
9 * "Software"), to deal in the Software without restriction, including
10 * without limitation the rights to use, copy, modify, merge, publish,
11 * distribute, sub license, and/or sell copies of the Software, and to
12 * permit persons to whom the Software is furnished to do so, subject to
13 * the following conditions:
15 * The above copyright notice and this permission notice (including the
16 * next paragraph) shall be included in all copies or substantial portions
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
20 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
21 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
22 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
23 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
24 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
25 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
27 **************************************************************************/
30 * TGSI program scan utility.
31 * Used to determine which registers and instructions are used by a shader.
37 #include "util/u_debug.h"
38 #include "util/u_math.h"
39 #include "util/u_memory.h"
40 #include "util/u_prim.h"
41 #include "tgsi/tgsi_info.h"
42 #include "tgsi/tgsi_parse.h"
43 #include "tgsi/tgsi_util.h"
44 #include "tgsi/tgsi_scan.h"
48 is_memory_file(unsigned file
)
50 return file
== TGSI_FILE_SAMPLER
||
51 file
== TGSI_FILE_SAMPLER_VIEW
||
52 file
== TGSI_FILE_IMAGE
||
53 file
== TGSI_FILE_BUFFER
;
58 is_mem_query_inst(unsigned opcode
)
60 return opcode
== TGSI_OPCODE_RESQ
||
61 opcode
== TGSI_OPCODE_TXQ
||
62 opcode
== TGSI_OPCODE_TXQS
||
63 opcode
== TGSI_OPCODE_TXQ_LZ
||
64 opcode
== TGSI_OPCODE_LODQ
;
68 * Is the opcode a "true" texture instruction which samples from a
72 is_texture_inst(unsigned opcode
)
74 return (!is_mem_query_inst(opcode
) &&
75 tgsi_get_opcode_info(opcode
)->is_tex
);
80 * Is the opcode an instruction which computes a derivative explicitly or
84 computes_derivative(unsigned opcode
)
86 if (tgsi_get_opcode_info(opcode
)->is_tex
) {
87 return opcode
!= TGSI_OPCODE_TG4
&&
88 opcode
!= TGSI_OPCODE_TXD
&&
89 opcode
!= TGSI_OPCODE_TXF
&&
90 opcode
!= TGSI_OPCODE_TXF_LZ
&&
91 opcode
!= TGSI_OPCODE_TEX_LZ
&&
92 opcode
!= TGSI_OPCODE_TXL
&&
93 opcode
!= TGSI_OPCODE_TXL2
&&
94 opcode
!= TGSI_OPCODE_TXQ
&&
95 opcode
!= TGSI_OPCODE_TXQ_LZ
&&
96 opcode
!= TGSI_OPCODE_TXQS
;
99 return opcode
== TGSI_OPCODE_DDX
|| opcode
== TGSI_OPCODE_DDX_FINE
||
100 opcode
== TGSI_OPCODE_DDY
|| opcode
== TGSI_OPCODE_DDY_FINE
||
101 opcode
== TGSI_OPCODE_SAMPLE
||
102 opcode
== TGSI_OPCODE_SAMPLE_B
||
103 opcode
== TGSI_OPCODE_SAMPLE_C
;
108 scan_src_operand(struct tgsi_shader_info
*info
,
109 const struct tgsi_full_instruction
*fullinst
,
110 const struct tgsi_full_src_register
*src
,
113 bool is_interp_instruction
,
116 int ind
= src
->Register
.Index
;
118 if (info
->processor
== PIPE_SHADER_COMPUTE
&&
119 src
->Register
.File
== TGSI_FILE_SYSTEM_VALUE
) {
120 unsigned swizzle
[4], i
, name
;
122 name
= info
->system_value_semantic_name
[src
->Register
.Index
];
123 swizzle
[0] = src
->Register
.SwizzleX
;
124 swizzle
[1] = src
->Register
.SwizzleY
;
125 swizzle
[2] = src
->Register
.SwizzleZ
;
126 swizzle
[3] = src
->Register
.SwizzleW
;
129 case TGSI_SEMANTIC_THREAD_ID
:
130 case TGSI_SEMANTIC_BLOCK_ID
:
131 for (i
= 0; i
< 4; i
++) {
132 if (swizzle
[i
] <= TGSI_SWIZZLE_Z
) {
133 if (name
== TGSI_SEMANTIC_THREAD_ID
)
134 info
->uses_thread_id
[swizzle
[i
]] = true;
136 info
->uses_block_id
[swizzle
[i
]] = true;
140 case TGSI_SEMANTIC_BLOCK_SIZE
:
141 /* The block size is translated to IMM with a fixed block size. */
142 if (info
->properties
[TGSI_PROPERTY_CS_FIXED_BLOCK_WIDTH
] == 0)
143 info
->uses_block_size
= true;
145 case TGSI_SEMANTIC_GRID_SIZE
:
146 info
->uses_grid_size
= true;
151 /* Mark which inputs are effectively used */
152 if (src
->Register
.File
== TGSI_FILE_INPUT
) {
153 if (src
->Register
.Indirect
) {
154 for (ind
= 0; ind
< info
->num_inputs
; ++ind
) {
155 info
->input_usage_mask
[ind
] |= usage_mask
;
159 assert(ind
< PIPE_MAX_SHADER_INPUTS
);
160 info
->input_usage_mask
[ind
] |= usage_mask
;
163 if (info
->processor
== PIPE_SHADER_FRAGMENT
) {
164 unsigned name
, index
, input
;
166 if (src
->Register
.Indirect
&& src
->Indirect
.ArrayID
)
167 input
= info
->input_array_first
[src
->Indirect
.ArrayID
];
169 input
= src
->Register
.Index
;
171 name
= info
->input_semantic_name
[input
];
172 index
= info
->input_semantic_index
[input
];
174 if (name
== TGSI_SEMANTIC_POSITION
&&
175 (src
->Register
.SwizzleX
== TGSI_SWIZZLE_Z
||
176 src
->Register
.SwizzleY
== TGSI_SWIZZLE_Z
||
177 src
->Register
.SwizzleZ
== TGSI_SWIZZLE_Z
||
178 src
->Register
.SwizzleW
== TGSI_SWIZZLE_Z
))
179 info
->reads_z
= TRUE
;
181 if (name
== TGSI_SEMANTIC_COLOR
) {
183 (1 << src
->Register
.SwizzleX
) |
184 (1 << src
->Register
.SwizzleY
) |
185 (1 << src
->Register
.SwizzleZ
) |
186 (1 << src
->Register
.SwizzleW
);
188 info
->colors_read
|= mask
<< (index
* 4);
191 /* Process only interpolated varyings. Don't include POSITION.
192 * Don't include integer varyings, because they are not
193 * interpolated. Don't process inputs interpolated by INTERP
194 * opcodes. Those are tracked separately.
196 if ((!is_interp_instruction
|| src_index
!= 0) &&
197 (name
== TGSI_SEMANTIC_GENERIC
||
198 name
== TGSI_SEMANTIC_TEXCOORD
||
199 name
== TGSI_SEMANTIC_COLOR
||
200 name
== TGSI_SEMANTIC_BCOLOR
||
201 name
== TGSI_SEMANTIC_FOG
||
202 name
== TGSI_SEMANTIC_CLIPDIST
)) {
203 switch (info
->input_interpolate
[input
]) {
204 case TGSI_INTERPOLATE_COLOR
:
205 case TGSI_INTERPOLATE_PERSPECTIVE
:
206 switch (info
->input_interpolate_loc
[input
]) {
207 case TGSI_INTERPOLATE_LOC_CENTER
:
208 info
->uses_persp_center
= TRUE
;
210 case TGSI_INTERPOLATE_LOC_CENTROID
:
211 info
->uses_persp_centroid
= TRUE
;
213 case TGSI_INTERPOLATE_LOC_SAMPLE
:
214 info
->uses_persp_sample
= TRUE
;
218 case TGSI_INTERPOLATE_LINEAR
:
219 switch (info
->input_interpolate_loc
[input
]) {
220 case TGSI_INTERPOLATE_LOC_CENTER
:
221 info
->uses_linear_center
= TRUE
;
223 case TGSI_INTERPOLATE_LOC_CENTROID
:
224 info
->uses_linear_centroid
= TRUE
;
226 case TGSI_INTERPOLATE_LOC_SAMPLE
:
227 info
->uses_linear_sample
= TRUE
;
231 /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */
237 if (info
->processor
== PIPE_SHADER_TESS_CTRL
&&
238 src
->Register
.File
== TGSI_FILE_OUTPUT
) {
241 if (src
->Register
.Indirect
&& src
->Indirect
.ArrayID
)
242 input
= info
->output_array_first
[src
->Indirect
.ArrayID
];
244 input
= src
->Register
.Index
;
246 switch (info
->output_semantic_name
[input
]) {
247 case TGSI_SEMANTIC_PATCH
:
248 info
->reads_perpatch_outputs
= true;
250 case TGSI_SEMANTIC_TESSINNER
:
251 case TGSI_SEMANTIC_TESSOUTER
:
252 info
->reads_tessfactor_outputs
= true;
255 info
->reads_pervertex_outputs
= true;
259 /* check for indirect register reads */
260 if (src
->Register
.Indirect
) {
261 info
->indirect_files
|= (1 << src
->Register
.File
);
262 info
->indirect_files_read
|= (1 << src
->Register
.File
);
264 /* record indirect constant buffer indexing */
265 if (src
->Register
.File
== TGSI_FILE_CONSTANT
) {
266 if (src
->Register
.Dimension
) {
267 if (src
->Dimension
.Indirect
)
268 info
->const_buffers_indirect
= info
->const_buffers_declared
;
270 info
->const_buffers_indirect
|= 1u << src
->Dimension
.Index
;
272 info
->const_buffers_indirect
|= 1;
277 if (src
->Register
.Dimension
&& src
->Dimension
.Indirect
)
278 info
->dim_indirect_files
|= 1u << src
->Register
.File
;
280 /* Texture samplers */
281 if (src
->Register
.File
== TGSI_FILE_SAMPLER
) {
282 const unsigned index
= src
->Register
.Index
;
284 assert(fullinst
->Instruction
.Texture
);
285 assert(index
< ARRAY_SIZE(info
->is_msaa_sampler
));
286 assert(index
< PIPE_MAX_SAMPLERS
);
288 if (is_texture_inst(fullinst
->Instruction
.Opcode
)) {
289 const unsigned target
= fullinst
->Texture
.Texture
;
290 assert(target
< TGSI_TEXTURE_UNKNOWN
);
291 /* for texture instructions, check that the texture instruction
292 * target matches the previous sampler view declaration (if there
295 if (info
->sampler_targets
[index
] == TGSI_TEXTURE_UNKNOWN
) {
296 /* probably no sampler view declaration */
297 info
->sampler_targets
[index
] = target
;
299 /* Make sure the texture instruction's sampler/target info
300 * agrees with the sampler view declaration.
302 assert(info
->sampler_targets
[index
] == target
);
305 if (target
== TGSI_TEXTURE_2D_MSAA
||
306 target
== TGSI_TEXTURE_2D_ARRAY_MSAA
) {
307 info
->is_msaa_sampler
[src
->Register
.Index
] = TRUE
;
312 if (is_memory_file(src
->Register
.File
) &&
313 !is_mem_query_inst(fullinst
->Instruction
.Opcode
)) {
316 if (tgsi_get_opcode_info(fullinst
->Instruction
.Opcode
)->is_store
) {
317 info
->writes_memory
= TRUE
;
319 if (src
->Register
.File
== TGSI_FILE_IMAGE
) {
320 if (src
->Register
.Indirect
)
321 info
->images_atomic
= info
->images_declared
;
323 info
->images_atomic
|= 1 << src
->Register
.Index
;
324 } else if (src
->Register
.File
== TGSI_FILE_BUFFER
) {
325 if (src
->Register
.Indirect
)
326 info
->shader_buffers_atomic
= info
->shader_buffers_declared
;
328 info
->shader_buffers_atomic
|= 1 << src
->Register
.Index
;
331 if (src
->Register
.File
== TGSI_FILE_IMAGE
) {
332 if (src
->Register
.Indirect
)
333 info
->images_load
= info
->images_declared
;
335 info
->images_load
|= 1 << src
->Register
.Index
;
336 } else if (src
->Register
.File
== TGSI_FILE_BUFFER
) {
337 if (src
->Register
.Indirect
)
338 info
->shader_buffers_load
= info
->shader_buffers_declared
;
340 info
->shader_buffers_load
|= 1 << src
->Register
.Index
;
348 scan_instruction(struct tgsi_shader_info
*info
,
349 const struct tgsi_full_instruction
*fullinst
,
350 unsigned *current_depth
)
353 bool is_mem_inst
= false;
354 bool is_interp_instruction
= false;
355 unsigned sampler_src
;
357 assert(fullinst
->Instruction
.Opcode
< TGSI_OPCODE_LAST
);
358 info
->opcode_count
[fullinst
->Instruction
.Opcode
]++;
360 switch (fullinst
->Instruction
.Opcode
) {
362 case TGSI_OPCODE_UIF
:
363 case TGSI_OPCODE_BGNLOOP
:
365 info
->max_depth
= MAX2(info
->max_depth
, *current_depth
);
367 case TGSI_OPCODE_ENDIF
:
368 case TGSI_OPCODE_ENDLOOP
:
371 case TGSI_OPCODE_TEX
:
372 case TGSI_OPCODE_TEX_LZ
:
373 case TGSI_OPCODE_TXB
:
374 case TGSI_OPCODE_TXD
:
375 case TGSI_OPCODE_TXL
:
376 case TGSI_OPCODE_TXP
:
377 case TGSI_OPCODE_TXQ
:
378 case TGSI_OPCODE_TXQS
:
379 case TGSI_OPCODE_TXF
:
380 case TGSI_OPCODE_TXF_LZ
:
381 case TGSI_OPCODE_TEX2
:
382 case TGSI_OPCODE_TXB2
:
383 case TGSI_OPCODE_TXL2
:
384 case TGSI_OPCODE_TG4
:
385 case TGSI_OPCODE_LODQ
:
386 sampler_src
= fullinst
->Instruction
.NumSrcRegs
- 1;
387 if (fullinst
->Src
[sampler_src
].Register
.File
!= TGSI_FILE_SAMPLER
)
388 info
->uses_bindless_samplers
= true;
390 case TGSI_OPCODE_RESQ
:
391 case TGSI_OPCODE_LOAD
:
392 case TGSI_OPCODE_ATOMUADD
:
393 case TGSI_OPCODE_ATOMXCHG
:
394 case TGSI_OPCODE_ATOMCAS
:
395 case TGSI_OPCODE_ATOMAND
:
396 case TGSI_OPCODE_ATOMOR
:
397 case TGSI_OPCODE_ATOMXOR
:
398 case TGSI_OPCODE_ATOMUMIN
:
399 case TGSI_OPCODE_ATOMUMAX
:
400 case TGSI_OPCODE_ATOMIMIN
:
401 case TGSI_OPCODE_ATOMIMAX
:
402 if (tgsi_is_bindless_image_file(fullinst
->Src
[0].Register
.File
))
403 info
->uses_bindless_images
= true;
405 case TGSI_OPCODE_STORE
:
406 if (tgsi_is_bindless_image_file(fullinst
->Dst
[0].Register
.File
))
407 info
->uses_bindless_images
= true;
413 if (fullinst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_CENTROID
||
414 fullinst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_OFFSET
||
415 fullinst
->Instruction
.Opcode
== TGSI_OPCODE_INTERP_SAMPLE
) {
416 const struct tgsi_full_src_register
*src0
= &fullinst
->Src
[0];
419 is_interp_instruction
= true;
421 if (src0
->Register
.Indirect
&& src0
->Indirect
.ArrayID
)
422 input
= info
->input_array_first
[src0
->Indirect
.ArrayID
];
424 input
= src0
->Register
.Index
;
426 /* For the INTERP opcodes, the interpolation is always
427 * PERSPECTIVE unless LINEAR is specified.
429 switch (info
->input_interpolate
[input
]) {
430 case TGSI_INTERPOLATE_COLOR
:
431 case TGSI_INTERPOLATE_CONSTANT
:
432 case TGSI_INTERPOLATE_PERSPECTIVE
:
433 switch (fullinst
->Instruction
.Opcode
) {
434 case TGSI_OPCODE_INTERP_CENTROID
:
435 info
->uses_persp_opcode_interp_centroid
= TRUE
;
437 case TGSI_OPCODE_INTERP_OFFSET
:
438 info
->uses_persp_opcode_interp_offset
= TRUE
;
440 case TGSI_OPCODE_INTERP_SAMPLE
:
441 info
->uses_persp_opcode_interp_sample
= TRUE
;
446 case TGSI_INTERPOLATE_LINEAR
:
447 switch (fullinst
->Instruction
.Opcode
) {
448 case TGSI_OPCODE_INTERP_CENTROID
:
449 info
->uses_linear_opcode_interp_centroid
= TRUE
;
451 case TGSI_OPCODE_INTERP_OFFSET
:
452 info
->uses_linear_opcode_interp_offset
= TRUE
;
454 case TGSI_OPCODE_INTERP_SAMPLE
:
455 info
->uses_linear_opcode_interp_sample
= TRUE
;
462 if (fullinst
->Instruction
.Opcode
>= TGSI_OPCODE_F2D
&&
463 fullinst
->Instruction
.Opcode
<= TGSI_OPCODE_DSSG
)
464 info
->uses_doubles
= TRUE
;
466 for (i
= 0; i
< fullinst
->Instruction
.NumSrcRegs
; i
++) {
467 scan_src_operand(info
, fullinst
, &fullinst
->Src
[i
], i
,
468 tgsi_util_get_inst_usage_mask(fullinst
, i
),
469 is_interp_instruction
, &is_mem_inst
);
472 if (fullinst
->Instruction
.Texture
) {
473 for (i
= 0; i
< fullinst
->Texture
.NumOffsets
; i
++) {
474 struct tgsi_full_src_register src
= {{0}};
476 src
.Register
.File
= fullinst
->TexOffsets
[i
].File
;
477 src
.Register
.Index
= fullinst
->TexOffsets
[i
].Index
;
478 src
.Register
.SwizzleX
= fullinst
->TexOffsets
[i
].SwizzleX
;
479 src
.Register
.SwizzleY
= fullinst
->TexOffsets
[i
].SwizzleY
;
480 src
.Register
.SwizzleZ
= fullinst
->TexOffsets
[i
].SwizzleZ
;
482 /* The usage mask is suboptimal but should be safe. */
483 scan_src_operand(info
, fullinst
, &src
, 0, TGSI_WRITEMASK_XYZ
,
484 false, &is_mem_inst
);
488 /* check for indirect register writes */
489 for (i
= 0; i
< fullinst
->Instruction
.NumDstRegs
; i
++) {
490 const struct tgsi_full_dst_register
*dst
= &fullinst
->Dst
[i
];
491 if (dst
->Register
.Indirect
) {
492 info
->indirect_files
|= (1 << dst
->Register
.File
);
493 info
->indirect_files_written
|= (1 << dst
->Register
.File
);
496 if (dst
->Register
.Dimension
&& dst
->Dimension
.Indirect
)
497 info
->dim_indirect_files
|= 1u << dst
->Register
.File
;
499 if (is_memory_file(dst
->Register
.File
)) {
500 assert(fullinst
->Instruction
.Opcode
== TGSI_OPCODE_STORE
);
503 info
->writes_memory
= TRUE
;
505 if (dst
->Register
.File
== TGSI_FILE_IMAGE
) {
506 if (dst
->Register
.Indirect
)
507 info
->images_store
= info
->images_declared
;
509 info
->images_store
|= 1 << dst
->Register
.Index
;
510 } else if (dst
->Register
.File
== TGSI_FILE_BUFFER
) {
511 if (dst
->Register
.Indirect
)
512 info
->shader_buffers_store
= info
->shader_buffers_declared
;
514 info
->shader_buffers_store
|= 1 << dst
->Register
.Index
;
520 info
->num_memory_instructions
++;
522 if (computes_derivative(fullinst
->Instruction
.Opcode
))
523 info
->uses_derivatives
= true;
525 info
->num_instructions
++;
530 scan_declaration(struct tgsi_shader_info
*info
,
531 const struct tgsi_full_declaration
*fulldecl
)
533 const uint file
= fulldecl
->Declaration
.File
;
534 const unsigned procType
= info
->processor
;
537 if (fulldecl
->Declaration
.Array
) {
538 unsigned array_id
= fulldecl
->Array
.ArrayID
;
541 case TGSI_FILE_INPUT
:
542 assert(array_id
< ARRAY_SIZE(info
->input_array_first
));
543 info
->input_array_first
[array_id
] = fulldecl
->Range
.First
;
544 info
->input_array_last
[array_id
] = fulldecl
->Range
.Last
;
546 case TGSI_FILE_OUTPUT
:
547 assert(array_id
< ARRAY_SIZE(info
->output_array_first
));
548 info
->output_array_first
[array_id
] = fulldecl
->Range
.First
;
549 info
->output_array_last
[array_id
] = fulldecl
->Range
.Last
;
552 info
->array_max
[file
] = MAX2(info
->array_max
[file
], array_id
);
555 for (reg
= fulldecl
->Range
.First
; reg
<= fulldecl
->Range
.Last
; reg
++) {
556 unsigned semName
= fulldecl
->Semantic
.Name
;
557 unsigned semIndex
= fulldecl
->Semantic
.Index
+
558 (reg
- fulldecl
->Range
.First
);
560 unsigned index
, target
, type
;
562 /* only first 32 regs will appear in this bitfield */
563 info
->file_mask
[file
] |= (1 << reg
);
564 info
->file_count
[file
]++;
565 info
->file_max
[file
] = MAX2(info
->file_max
[file
], (int)reg
);
568 case TGSI_FILE_CONSTANT
:
571 if (fulldecl
->Declaration
.Dimension
)
572 buffer
= fulldecl
->Dim
.Index2D
;
574 info
->const_file_max
[buffer
] =
575 MAX2(info
->const_file_max
[buffer
], (int)reg
);
576 info
->const_buffers_declared
|= 1u << buffer
;
579 case TGSI_FILE_IMAGE
:
580 info
->images_declared
|= 1u << reg
;
581 if (fulldecl
->Image
.Resource
== TGSI_TEXTURE_BUFFER
)
582 info
->images_buffers
|= 1 << reg
;
585 case TGSI_FILE_BUFFER
:
586 info
->shader_buffers_declared
|= 1u << reg
;
589 case TGSI_FILE_INPUT
:
590 info
->input_semantic_name
[reg
] = (ubyte
) semName
;
591 info
->input_semantic_index
[reg
] = (ubyte
) semIndex
;
592 info
->input_interpolate
[reg
] = (ubyte
)fulldecl
->Interp
.Interpolate
;
593 info
->input_interpolate_loc
[reg
] = (ubyte
)fulldecl
->Interp
.Location
;
594 info
->input_cylindrical_wrap
[reg
] = (ubyte
)fulldecl
->Interp
.CylindricalWrap
;
596 /* Vertex shaders can have inputs with holes between them. */
597 info
->num_inputs
= MAX2(info
->num_inputs
, reg
+ 1);
600 case TGSI_SEMANTIC_PRIMID
:
601 info
->uses_primid
= true;
603 case TGSI_SEMANTIC_POSITION
:
604 info
->reads_position
= true;
606 case TGSI_SEMANTIC_FACE
:
607 info
->uses_frontface
= true;
612 case TGSI_FILE_SYSTEM_VALUE
:
613 index
= fulldecl
->Range
.First
;
615 info
->system_value_semantic_name
[index
] = semName
;
616 info
->num_system_values
= MAX2(info
->num_system_values
, index
+ 1);
619 case TGSI_SEMANTIC_INSTANCEID
:
620 info
->uses_instanceid
= TRUE
;
622 case TGSI_SEMANTIC_VERTEXID
:
623 info
->uses_vertexid
= TRUE
;
625 case TGSI_SEMANTIC_VERTEXID_NOBASE
:
626 info
->uses_vertexid_nobase
= TRUE
;
628 case TGSI_SEMANTIC_BASEVERTEX
:
629 info
->uses_basevertex
= TRUE
;
631 case TGSI_SEMANTIC_PRIMID
:
632 info
->uses_primid
= TRUE
;
634 case TGSI_SEMANTIC_INVOCATIONID
:
635 info
->uses_invocationid
= TRUE
;
637 case TGSI_SEMANTIC_POSITION
:
638 info
->reads_position
= TRUE
;
640 case TGSI_SEMANTIC_FACE
:
641 info
->uses_frontface
= TRUE
;
643 case TGSI_SEMANTIC_SAMPLEMASK
:
644 info
->reads_samplemask
= TRUE
;
646 case TGSI_SEMANTIC_TESSINNER
:
647 case TGSI_SEMANTIC_TESSOUTER
:
648 info
->reads_tess_factors
= true;
653 case TGSI_FILE_OUTPUT
:
654 info
->output_semantic_name
[reg
] = (ubyte
) semName
;
655 info
->output_semantic_index
[reg
] = (ubyte
) semIndex
;
656 info
->output_usagemask
[reg
] |= fulldecl
->Declaration
.UsageMask
;
657 info
->num_outputs
= MAX2(info
->num_outputs
, reg
+ 1);
659 if (fulldecl
->Declaration
.UsageMask
& TGSI_WRITEMASK_X
) {
660 info
->output_streams
[reg
] |= (ubyte
)fulldecl
->Semantic
.StreamX
;
661 info
->num_stream_output_components
[fulldecl
->Semantic
.StreamX
]++;
663 if (fulldecl
->Declaration
.UsageMask
& TGSI_WRITEMASK_Y
) {
664 info
->output_streams
[reg
] |= (ubyte
)fulldecl
->Semantic
.StreamY
<< 2;
665 info
->num_stream_output_components
[fulldecl
->Semantic
.StreamY
]++;
667 if (fulldecl
->Declaration
.UsageMask
& TGSI_WRITEMASK_Z
) {
668 info
->output_streams
[reg
] |= (ubyte
)fulldecl
->Semantic
.StreamZ
<< 4;
669 info
->num_stream_output_components
[fulldecl
->Semantic
.StreamZ
]++;
671 if (fulldecl
->Declaration
.UsageMask
& TGSI_WRITEMASK_W
) {
672 info
->output_streams
[reg
] |= (ubyte
)fulldecl
->Semantic
.StreamW
<< 6;
673 info
->num_stream_output_components
[fulldecl
->Semantic
.StreamW
]++;
677 case TGSI_SEMANTIC_PRIMID
:
678 info
->writes_primid
= true;
680 case TGSI_SEMANTIC_VIEWPORT_INDEX
:
681 info
->writes_viewport_index
= true;
683 case TGSI_SEMANTIC_LAYER
:
684 info
->writes_layer
= true;
686 case TGSI_SEMANTIC_PSIZE
:
687 info
->writes_psize
= true;
689 case TGSI_SEMANTIC_CLIPVERTEX
:
690 info
->writes_clipvertex
= true;
692 case TGSI_SEMANTIC_COLOR
:
693 info
->colors_written
|= 1 << semIndex
;
695 case TGSI_SEMANTIC_STENCIL
:
696 info
->writes_stencil
= true;
698 case TGSI_SEMANTIC_SAMPLEMASK
:
699 info
->writes_samplemask
= true;
701 case TGSI_SEMANTIC_EDGEFLAG
:
702 info
->writes_edgeflag
= true;
704 case TGSI_SEMANTIC_POSITION
:
705 if (procType
== PIPE_SHADER_FRAGMENT
)
706 info
->writes_z
= true;
708 info
->writes_position
= true;
713 case TGSI_FILE_SAMPLER
:
714 STATIC_ASSERT(sizeof(info
->samplers_declared
) * 8 >= PIPE_MAX_SAMPLERS
);
715 info
->samplers_declared
|= 1u << reg
;
718 case TGSI_FILE_SAMPLER_VIEW
:
719 target
= fulldecl
->SamplerView
.Resource
;
720 type
= fulldecl
->SamplerView
.ReturnTypeX
;
722 assert(target
< TGSI_TEXTURE_UNKNOWN
);
723 if (info
->sampler_targets
[reg
] == TGSI_TEXTURE_UNKNOWN
) {
724 /* Save sampler target for this sampler index */
725 info
->sampler_targets
[reg
] = target
;
726 info
->sampler_type
[reg
] = type
;
728 /* if previously declared, make sure targets agree */
729 assert(info
->sampler_targets
[reg
] == target
);
730 assert(info
->sampler_type
[reg
] == type
);
739 scan_immediate(struct tgsi_shader_info
*info
)
741 uint reg
= info
->immediate_count
++;
742 uint file
= TGSI_FILE_IMMEDIATE
;
744 info
->file_mask
[file
] |= (1 << reg
);
745 info
->file_count
[file
]++;
746 info
->file_max
[file
] = MAX2(info
->file_max
[file
], (int)reg
);
751 scan_property(struct tgsi_shader_info
*info
,
752 const struct tgsi_full_property
*fullprop
)
754 unsigned name
= fullprop
->Property
.PropertyName
;
755 unsigned value
= fullprop
->u
[0].Data
;
757 assert(name
< ARRAY_SIZE(info
->properties
));
758 info
->properties
[name
] = value
;
761 case TGSI_PROPERTY_NUM_CLIPDIST_ENABLED
:
762 info
->num_written_clipdistance
= value
;
763 info
->clipdist_writemask
|= (1 << value
) - 1;
765 case TGSI_PROPERTY_NUM_CULLDIST_ENABLED
:
766 info
->num_written_culldistance
= value
;
767 info
->culldist_writemask
|= (1 << value
) - 1;
774 * Scan the given TGSI shader to collect information such as number of
775 * registers used, special instructions used, etc.
776 * \return info the result of the scan
779 tgsi_scan_shader(const struct tgsi_token
*tokens
,
780 struct tgsi_shader_info
*info
)
783 struct tgsi_parse_context parse
;
784 unsigned current_depth
= 0;
786 memset(info
, 0, sizeof(*info
));
787 for (i
= 0; i
< TGSI_FILE_COUNT
; i
++)
788 info
->file_max
[i
] = -1;
789 for (i
= 0; i
< ARRAY_SIZE(info
->const_file_max
); i
++)
790 info
->const_file_max
[i
] = -1;
791 info
->properties
[TGSI_PROPERTY_GS_INVOCATIONS
] = 1;
792 for (i
= 0; i
< ARRAY_SIZE(info
->sampler_targets
); i
++)
793 info
->sampler_targets
[i
] = TGSI_TEXTURE_UNKNOWN
;
796 ** Setup to begin parsing input shader
798 if (tgsi_parse_init( &parse
, tokens
) != TGSI_PARSE_OK
) {
799 debug_printf("tgsi_parse_init() failed in tgsi_scan_shader()!\n");
802 procType
= parse
.FullHeader
.Processor
.Processor
;
803 assert(procType
== PIPE_SHADER_FRAGMENT
||
804 procType
== PIPE_SHADER_VERTEX
||
805 procType
== PIPE_SHADER_GEOMETRY
||
806 procType
== PIPE_SHADER_TESS_CTRL
||
807 procType
== PIPE_SHADER_TESS_EVAL
||
808 procType
== PIPE_SHADER_COMPUTE
);
809 info
->processor
= procType
;
812 ** Loop over incoming program tokens/instructions
814 while (!tgsi_parse_end_of_tokens(&parse
)) {
817 tgsi_parse_token( &parse
);
819 switch( parse
.FullToken
.Token
.Type
) {
820 case TGSI_TOKEN_TYPE_INSTRUCTION
:
821 scan_instruction(info
, &parse
.FullToken
.FullInstruction
,
824 case TGSI_TOKEN_TYPE_DECLARATION
:
825 scan_declaration(info
, &parse
.FullToken
.FullDeclaration
);
827 case TGSI_TOKEN_TYPE_IMMEDIATE
:
828 scan_immediate(info
);
830 case TGSI_TOKEN_TYPE_PROPERTY
:
831 scan_property(info
, &parse
.FullToken
.FullProperty
);
834 assert(!"Unexpected TGSI token type");
838 info
->uses_kill
= (info
->opcode_count
[TGSI_OPCODE_KILL_IF
] ||
839 info
->opcode_count
[TGSI_OPCODE_KILL
]);
841 /* The dimensions of the IN decleration in geometry shader have
842 * to be deduced from the type of the input primitive.
844 if (procType
== PIPE_SHADER_GEOMETRY
) {
845 unsigned input_primitive
=
846 info
->properties
[TGSI_PROPERTY_GS_INPUT_PRIM
];
847 int num_verts
= u_vertices_per_prim(input_primitive
);
849 info
->file_count
[TGSI_FILE_INPUT
] = num_verts
;
850 info
->file_max
[TGSI_FILE_INPUT
] =
851 MAX2(info
->file_max
[TGSI_FILE_INPUT
], num_verts
- 1);
852 for (j
= 0; j
< num_verts
; ++j
) {
853 info
->file_mask
[TGSI_FILE_INPUT
] |= (1 << j
);
857 tgsi_parse_free(&parse
);
861 * Collect information about the arrays of a given register file.
863 * @param tokens TGSI shader
864 * @param file the register file to scan through
865 * @param max_array_id number of entries in @p arrays; should be equal to the
866 * highest array id, i.e. tgsi_shader_info::array_max[file].
867 * @param arrays info for array of each ID will be written to arrays[ID - 1].
870 tgsi_scan_arrays(const struct tgsi_token
*tokens
,
872 unsigned max_array_id
,
873 struct tgsi_array_info
*arrays
)
875 struct tgsi_parse_context parse
;
877 if (tgsi_parse_init(&parse
, tokens
) != TGSI_PARSE_OK
) {
878 debug_printf("tgsi_parse_init() failed in tgsi_scan_arrays()!\n");
882 memset(arrays
, 0, sizeof(arrays
[0]) * max_array_id
);
884 while (!tgsi_parse_end_of_tokens(&parse
)) {
885 struct tgsi_full_instruction
*inst
;
887 tgsi_parse_token(&parse
);
889 if (parse
.FullToken
.Token
.Type
== TGSI_TOKEN_TYPE_DECLARATION
) {
890 struct tgsi_full_declaration
*decl
= &parse
.FullToken
.FullDeclaration
;
892 if (decl
->Declaration
.Array
&& decl
->Declaration
.File
== file
&&
893 decl
->Array
.ArrayID
> 0 && decl
->Array
.ArrayID
<= max_array_id
) {
894 struct tgsi_array_info
*array
= &arrays
[decl
->Array
.ArrayID
- 1];
895 assert(!array
->declared
);
896 array
->declared
= true;
897 array
->range
= decl
->Range
;
901 if (parse
.FullToken
.Token
.Type
!= TGSI_TOKEN_TYPE_INSTRUCTION
)
904 inst
= &parse
.FullToken
.FullInstruction
;
905 for (unsigned i
= 0; i
< inst
->Instruction
.NumDstRegs
; i
++) {
906 const struct tgsi_full_dst_register
*dst
= &inst
->Dst
[i
];
907 if (dst
->Register
.File
!= file
)
910 if (dst
->Register
.Indirect
) {
911 if (dst
->Indirect
.ArrayID
> 0 &&
912 dst
->Indirect
.ArrayID
<= max_array_id
) {
913 arrays
[dst
->Indirect
.ArrayID
- 1].writemask
|= dst
->Register
.WriteMask
;
915 /* Indirect writes without an ArrayID can write anywhere. */
916 for (unsigned j
= 0; j
< max_array_id
; ++j
)
917 arrays
[j
].writemask
|= dst
->Register
.WriteMask
;
920 /* Check whether the write falls into any of the arrays anyway. */
921 for (unsigned j
= 0; j
< max_array_id
; ++j
) {
922 struct tgsi_array_info
*array
= &arrays
[j
];
923 if (array
->declared
&&
924 dst
->Register
.Index
>= array
->range
.First
&&
925 dst
->Register
.Index
<= array
->range
.Last
)
926 array
->writemask
|= dst
->Register
.WriteMask
;
932 tgsi_parse_free(&parse
);