src/gallium/auxiliary/tgsi/tgsi_scan.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 VMware, Inc.
   4  * All Rights Reserved.
   5  * Copyright 2008 VMware, Inc.  All rights Reserved.
   6  *
   7  * Permission is hereby granted, free of charge, to any person obtaining a
   8  * copy of this software and associated documentation files (the
   9  * "Software"), to deal in the Software without restriction, including
  10  * without limitation the rights to use, copy, modify, merge, publish,
  11  * distribute, sub license, and/or sell copies of the Software, and to
  12  * permit persons to whom the Software is furnished to do so, subject to
  13  * the following conditions:
  14  *
  15  * The above copyright notice and this permission notice (including the
  16  * next paragraph) shall be included in all copies or substantial portions
  17  * of the Software.
  18  *
  19  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  20  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  21  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  22  * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
  23  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  24  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  25  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  26  *
  27  **************************************************************************/
  28
  29 /**
  30  * TGSI program scan utility.
  31  * Used to determine which registers and instructions are used by a shader.
  32  *
  33  * Authors:  Brian Paul
  34  */
  35
  36
  37 #include "util/u_debug.h"
  38 #include "util/u_math.h"
  39 #include "util/u_memory.h"
  40 #include "util/u_prim.h"
  41 #include "tgsi/tgsi_info.h"
  42 #include "tgsi/tgsi_parse.h"
  43 #include "tgsi/tgsi_util.h"
  44 #include "tgsi/tgsi_scan.h"
  45
  46
  47 static bool
  48 is_memory_file(unsigned file)
  49 {
  50    return file == TGSI_FILE_SAMPLER ||
  51           file == TGSI_FILE_SAMPLER_VIEW ||
  52           file == TGSI_FILE_IMAGE ||
  53           file == TGSI_FILE_BUFFER;
  54 }
  55
  56
  57 /**
  58  * Is the opcode a "true" texture instruction which samples from a
  59  * texture map?
  60  */
  61 static bool
  62 is_texture_inst(unsigned opcode)
  63 {
  64    return (opcode != TGSI_OPCODE_TXQ &&
  65            opcode != TGSI_OPCODE_TXQS &&
  66            opcode != TGSI_OPCODE_TXQ_LZ &&
  67            opcode != TGSI_OPCODE_LODQ &&
  68            tgsi_get_opcode_info(opcode)->is_tex);
  69 }
  70
  71
  72 /**
  73  * Is the opcode an instruction which computes a derivative explicitly or
  74  * implicitly?
  75  */
  76 static bool
  77 computes_derivative(unsigned opcode)
  78 {
  79    if (tgsi_get_opcode_info(opcode)->is_tex) {
  80       return opcode != TGSI_OPCODE_TG4 &&
  81              opcode != TGSI_OPCODE_TXD &&
  82              opcode != TGSI_OPCODE_TXF &&
  83              opcode != TGSI_OPCODE_TXL &&
  84              opcode != TGSI_OPCODE_TXL2 &&
  85              opcode != TGSI_OPCODE_TXQ &&
  86              opcode != TGSI_OPCODE_TXQ_LZ &&
  87              opcode != TGSI_OPCODE_TXQS;
  88    }
  89
  90    return opcode == TGSI_OPCODE_DDX || opcode == TGSI_OPCODE_DDX_FINE ||
  91           opcode == TGSI_OPCODE_DDY || opcode == TGSI_OPCODE_DDY_FINE ||
  92           opcode == TGSI_OPCODE_SAMPLE ||
  93           opcode == TGSI_OPCODE_SAMPLE_B ||
  94           opcode == TGSI_OPCODE_SAMPLE_C;
  95 }
  96
  97
  98 static void
  99 scan_instruction(struct tgsi_shader_info *info,
 100                  const struct tgsi_full_instruction *fullinst,
 101                  unsigned *current_depth)
 102 {
 103    unsigned i;
 104    bool is_mem_inst = false;
 105    bool is_interp_instruction = false;
 106
 107    assert(fullinst->Instruction.Opcode < TGSI_OPCODE_LAST);
 108    info->opcode_count[fullinst->Instruction.Opcode]++;
 109
 110    switch (fullinst->Instruction.Opcode) {
 111    case TGSI_OPCODE_IF:
 112    case TGSI_OPCODE_UIF:
 113    case TGSI_OPCODE_BGNLOOP:
 114       (*current_depth)++;
 115       info->max_depth = MAX2(info->max_depth, *current_depth);
 116       break;
 117    case TGSI_OPCODE_ENDIF:
 118    case TGSI_OPCODE_ENDLOOP:
 119       (*current_depth)--;
 120       break;
 121    default:
 122       break;
 123    }
 124
 125    if (fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_CENTROID ||
 126        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_OFFSET ||
 127        fullinst->Instruction.Opcode == TGSI_OPCODE_INTERP_SAMPLE) {
 128       const struct tgsi_full_src_register *src0 = &fullinst->Src[0];
 129       unsigned input;
 130
 131       is_interp_instruction = true;
 132
 133       if (src0->Register.Indirect && src0->Indirect.ArrayID)
 134          input = info->input_array_first[src0->Indirect.ArrayID];
 135       else
 136          input = src0->Register.Index;
 137
 138       /* For the INTERP opcodes, the interpolation is always
 139        * PERSPECTIVE unless LINEAR is specified.
 140        */
 141       switch (info->input_interpolate[input]) {
 142       case TGSI_INTERPOLATE_COLOR:
 143       case TGSI_INTERPOLATE_CONSTANT:
 144       case TGSI_INTERPOLATE_PERSPECTIVE:
 145          switch (fullinst->Instruction.Opcode) {
 146          case TGSI_OPCODE_INTERP_CENTROID:
 147             info->uses_persp_opcode_interp_centroid = TRUE;
 148             break;
 149          case TGSI_OPCODE_INTERP_OFFSET:
 150             info->uses_persp_opcode_interp_offset = TRUE;
 151             break;
 152          case TGSI_OPCODE_INTERP_SAMPLE:
 153             info->uses_persp_opcode_interp_sample = TRUE;
 154             break;
 155          }
 156          break;
 157
 158       case TGSI_INTERPOLATE_LINEAR:
 159          switch (fullinst->Instruction.Opcode) {
 160          case TGSI_OPCODE_INTERP_CENTROID:
 161             info->uses_linear_opcode_interp_centroid = TRUE;
 162             break;
 163          case TGSI_OPCODE_INTERP_OFFSET:
 164             info->uses_linear_opcode_interp_offset = TRUE;
 165             break;
 166          case TGSI_OPCODE_INTERP_SAMPLE:
 167             info->uses_linear_opcode_interp_sample = TRUE;
 168             break;
 169          }
 170          break;
 171       }
 172    }
 173
 174    if (fullinst->Instruction.Opcode >= TGSI_OPCODE_F2D &&
 175        fullinst->Instruction.Opcode <= TGSI_OPCODE_DSSG)
 176       info->uses_doubles = TRUE;
 177
 178    for (i = 0; i < fullinst->Instruction.NumSrcRegs; i++) {
 179       const struct tgsi_full_src_register *src = &fullinst->Src[i];
 180       int ind = src->Register.Index;
 181
 182       /* Mark which inputs are effectively used */
 183       if (src->Register.File == TGSI_FILE_INPUT) {
 184          unsigned usage_mask;
 185          usage_mask = tgsi_util_get_inst_usage_mask(fullinst, i);
 186          if (src->Register.Indirect) {
 187             for (ind = 0; ind < info->num_inputs; ++ind) {
 188                info->input_usage_mask[ind] |= usage_mask;
 189             }
 190          } else {
 191             assert(ind >= 0);
 192             assert(ind < PIPE_MAX_SHADER_INPUTS);
 193             info->input_usage_mask[ind] |= usage_mask;
 194          }
 195
 196          if (info->processor == PIPE_SHADER_FRAGMENT) {
 197             unsigned name, index, input;
 198
 199             if (src->Register.Indirect && src->Indirect.ArrayID)
 200                input = info->input_array_first[src->Indirect.ArrayID];
 201             else
 202                input = src->Register.Index;
 203
 204             name = info->input_semantic_name[input];
 205             index = info->input_semantic_index[input];
 206
 207             if (name == TGSI_SEMANTIC_POSITION &&
 208                 (src->Register.SwizzleX == TGSI_SWIZZLE_Z ||
 209                  src->Register.SwizzleY == TGSI_SWIZZLE_Z ||
 210                  src->Register.SwizzleZ == TGSI_SWIZZLE_Z ||
 211                  src->Register.SwizzleW == TGSI_SWIZZLE_Z))
 212                info->reads_z = TRUE;
 213
 214             if (name == TGSI_SEMANTIC_COLOR) {
 215                unsigned mask =
 216                   (1 << src->Register.SwizzleX) |
 217                   (1 << src->Register.SwizzleY) |
 218                   (1 << src->Register.SwizzleZ) |
 219                   (1 << src->Register.SwizzleW);
 220
 221                info->colors_read |= mask << (index * 4);
 222             }
 223
 224             /* Process only interpolated varyings. Don't include POSITION.
 225              * Don't include integer varyings, because they are not
 226              * interpolated. Don't process inputs interpolated by INTERP
 227              * opcodes. Those are tracked separately.
 228              */
 229             if ((!is_interp_instruction || i != 0) &&
 230                 (name == TGSI_SEMANTIC_GENERIC ||
 231                  name == TGSI_SEMANTIC_TEXCOORD ||
 232                  name == TGSI_SEMANTIC_COLOR ||
 233                  name == TGSI_SEMANTIC_BCOLOR ||
 234                  name == TGSI_SEMANTIC_FOG ||
 235                  name == TGSI_SEMANTIC_CLIPDIST)) {
 236                switch (info->input_interpolate[input]) {
 237                case TGSI_INTERPOLATE_COLOR:
 238                case TGSI_INTERPOLATE_PERSPECTIVE:
 239                   switch (info->input_interpolate_loc[input]) {
 240                   case TGSI_INTERPOLATE_LOC_CENTER:
 241                      info->uses_persp_center = TRUE;
 242                      break;
 243                   case TGSI_INTERPOLATE_LOC_CENTROID:
 244                      info->uses_persp_centroid = TRUE;
 245                      break;
 246                   case TGSI_INTERPOLATE_LOC_SAMPLE:
 247                      info->uses_persp_sample = TRUE;
 248                      break;
 249                   }
 250                   break;
 251                case TGSI_INTERPOLATE_LINEAR:
 252                   switch (info->input_interpolate_loc[input]) {
 253                   case TGSI_INTERPOLATE_LOC_CENTER:
 254                      info->uses_linear_center = TRUE;
 255                      break;
 256                   case TGSI_INTERPOLATE_LOC_CENTROID:
 257                      info->uses_linear_centroid = TRUE;
 258                      break;
 259                   case TGSI_INTERPOLATE_LOC_SAMPLE:
 260                      info->uses_linear_sample = TRUE;
 261                      break;
 262                   }
 263                   break;
 264                   /* TGSI_INTERPOLATE_CONSTANT doesn't do any interpolation. */
 265                }
 266             }
 267          }
 268       }
 269
 270       /* check for indirect register reads */
 271       if (src->Register.Indirect) {
 272          info->indirect_files |= (1 << src->Register.File);
 273          info->indirect_files_read |= (1 << src->Register.File);
 274
 275          /* record indirect constant buffer indexing */
 276          if (src->Register.File == TGSI_FILE_CONSTANT) {
 277             if (src->Register.Dimension) {
 278                if (src->Dimension.Indirect)
 279                   info->const_buffers_indirect = info->const_buffers_declared;
 280                else
 281                   info->const_buffers_indirect |= 1u << src->Dimension.Index;
 282             } else {
 283                info->const_buffers_indirect |= 1;
 284             }
 285          }
 286       }
 287
 288       if (src->Register.Dimension && src->Dimension.Indirect)
 289          info->dim_indirect_files |= 1u << src->Register.File;
 290
 291       /* Texture samplers */
 292       if (src->Register.File == TGSI_FILE_SAMPLER) {
 293          const unsigned index = src->Register.Index;
 294
 295          assert(fullinst->Instruction.Texture);
 296          assert(index < ARRAY_SIZE(info->is_msaa_sampler));
 297          assert(index < PIPE_MAX_SAMPLERS);
 298
 299          if (is_texture_inst(fullinst->Instruction.Opcode)) {
 300             const unsigned target = fullinst->Texture.Texture;
 301             assert(target < TGSI_TEXTURE_UNKNOWN);
 302             /* for texture instructions, check that the texture instruction
 303              * target matches the previous sampler view declaration (if there
 304              * was one.)
 305              */
 306             if (info->sampler_targets[index] == TGSI_TEXTURE_UNKNOWN) {
 307                /* probably no sampler view declaration */
 308                info->sampler_targets[index] = target;
 309             } else {
 310                /* Make sure the texture instruction's sampler/target info
 311                 * agrees with the sampler view declaration.
 312                 */
 313                assert(info->sampler_targets[index] == target);
 314             }
 315             /* MSAA samplers */
 316             if (target == TGSI_TEXTURE_2D_MSAA ||
 317                 target == TGSI_TEXTURE_2D_ARRAY_MSAA) {
 318                info->is_msaa_sampler[src->Register.Index] = TRUE;
 319             }
 320          }
 321       }
 322
 323       if (is_memory_file(src->Register.File)) {
 324          is_mem_inst = true;
 325
 326          if (tgsi_get_opcode_info(fullinst->Instruction.Opcode)->is_store) {
 327             info->writes_memory = TRUE;
 328
 329             if (src->Register.File == TGSI_FILE_IMAGE &&
 330                 !src->Register.Indirect)
 331                info->images_writemask |= 1 << src->Register.Index;
 332          }
 333       }
 334    }
 335
 336    /* check for indirect register writes */
 337    for (i = 0; i < fullinst->Instruction.NumDstRegs; i++) {
 338       const struct tgsi_full_dst_register *dst = &fullinst->Dst[i];
 339       if (dst->Register.Indirect) {
 340          info->indirect_files |= (1 << dst->Register.File);
 341          info->indirect_files_written |= (1 << dst->Register.File);
 342       }
 343
 344       if (dst->Register.Dimension && dst->Dimension.Indirect)
 345          info->dim_indirect_files |= 1u << dst->Register.File;
 346
 347       if (is_memory_file(dst->Register.File)) {
 348          assert(fullinst->Instruction.Opcode == TGSI_OPCODE_STORE);
 349
 350          is_mem_inst = true;
 351          info->writes_memory = TRUE;
 352
 353          if (dst->Register.File == TGSI_FILE_IMAGE &&
 354              !dst->Register.Indirect)
 355             info->images_writemask |= 1 << dst->Register.Index;
 356       }
 357    }
 358
 359    if (is_mem_inst)
 360       info->num_memory_instructions++;
 361
 362    if (computes_derivative(fullinst->Instruction.Opcode))
 363       info->uses_derivatives = true;
 364
 365    info->num_instructions++;
 366 }
 367
 368
 369 static void
 370 scan_declaration(struct tgsi_shader_info *info,
 371                  const struct tgsi_full_declaration *fulldecl)
 372 {
 373    const uint file = fulldecl->Declaration.File;
 374    const unsigned procType = info->processor;
 375    uint reg;
 376
 377    if (fulldecl->Declaration.Array) {
 378       unsigned array_id = fulldecl->Array.ArrayID;
 379
 380       switch (file) {
 381       case TGSI_FILE_INPUT:
 382          assert(array_id < ARRAY_SIZE(info->input_array_first));
 383          info->input_array_first[array_id] = fulldecl->Range.First;
 384          info->input_array_last[array_id] = fulldecl->Range.Last;
 385          break;
 386       case TGSI_FILE_OUTPUT:
 387          assert(array_id < ARRAY_SIZE(info->output_array_first));
 388          info->output_array_first[array_id] = fulldecl->Range.First;
 389          info->output_array_last[array_id] = fulldecl->Range.Last;
 390          break;
 391       }
 392       info->array_max[file] = MAX2(info->array_max[file], array_id);
 393    }
 394
 395    for (reg = fulldecl->Range.First; reg <= fulldecl->Range.Last; reg++) {
 396       unsigned semName = fulldecl->Semantic.Name;
 397       unsigned semIndex = fulldecl->Semantic.Index +
 398          (reg - fulldecl->Range.First);
 399
 400       /* only first 32 regs will appear in this bitfield */
 401       info->file_mask[file] |= (1 << reg);
 402       info->file_count[file]++;
 403       info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 404
 405       if (file == TGSI_FILE_CONSTANT) {
 406          int buffer = 0;
 407
 408          if (fulldecl->Declaration.Dimension)
 409             buffer = fulldecl->Dim.Index2D;
 410
 411          info->const_file_max[buffer] =
 412             MAX2(info->const_file_max[buffer], (int)reg);
 413          info->const_buffers_declared |= 1u << buffer;
 414       }
 415       else if (file == TGSI_FILE_INPUT) {
 416          info->input_semantic_name[reg] = (ubyte) semName;
 417          info->input_semantic_index[reg] = (ubyte) semIndex;
 418          info->input_interpolate[reg] = (ubyte)fulldecl->Interp.Interpolate;
 419          info->input_interpolate_loc[reg] = (ubyte)fulldecl->Interp.Location;
 420          info->input_cylindrical_wrap[reg] = (ubyte)fulldecl->Interp.CylindricalWrap;
 421
 422          /* Vertex shaders can have inputs with holes between them. */
 423          info->num_inputs = MAX2(info->num_inputs, reg + 1);
 424
 425          if (semName == TGSI_SEMANTIC_PRIMID)
 426             info->uses_primid = TRUE;
 427          else if (procType == PIPE_SHADER_FRAGMENT) {
 428             if (semName == TGSI_SEMANTIC_POSITION)
 429                info->reads_position = TRUE;
 430             else if (semName == TGSI_SEMANTIC_FACE)
 431                info->uses_frontface = TRUE;
 432          }
 433       }
 434       else if (file == TGSI_FILE_SYSTEM_VALUE) {
 435          unsigned index = fulldecl->Range.First;
 436
 437          info->system_value_semantic_name[index] = semName;
 438          info->num_system_values = MAX2(info->num_system_values, index + 1);
 439
 440          switch (semName) {
 441          case TGSI_SEMANTIC_INSTANCEID:
 442             info->uses_instanceid = TRUE;
 443             break;
 444          case TGSI_SEMANTIC_VERTEXID:
 445             info->uses_vertexid = TRUE;
 446             break;
 447          case TGSI_SEMANTIC_VERTEXID_NOBASE:
 448             info->uses_vertexid_nobase = TRUE;
 449             break;
 450          case TGSI_SEMANTIC_BASEVERTEX:
 451             info->uses_basevertex = TRUE;
 452             break;
 453          case TGSI_SEMANTIC_PRIMID:
 454             info->uses_primid = TRUE;
 455             break;
 456          case TGSI_SEMANTIC_INVOCATIONID:
 457             info->uses_invocationid = TRUE;
 458             break;
 459          case TGSI_SEMANTIC_POSITION:
 460             info->reads_position = TRUE;
 461             break;
 462          case TGSI_SEMANTIC_FACE:
 463             info->uses_frontface = TRUE;
 464             break;
 465          case TGSI_SEMANTIC_SAMPLEMASK:
 466             info->reads_samplemask = TRUE;
 467             break;
 468          }
 469       }
 470       else if (file == TGSI_FILE_OUTPUT) {
 471          info->output_semantic_name[reg] = (ubyte) semName;
 472          info->output_semantic_index[reg] = (ubyte) semIndex;
 473          info->num_outputs = MAX2(info->num_outputs, reg + 1);
 474
 475          if (semName == TGSI_SEMANTIC_COLOR)
 476             info->colors_written |= 1 << semIndex;
 477
 478          if (procType == PIPE_SHADER_VERTEX ||
 479              procType == PIPE_SHADER_GEOMETRY ||
 480              procType == PIPE_SHADER_TESS_CTRL ||
 481              procType == PIPE_SHADER_TESS_EVAL) {
 482             switch (semName) {
 483             case TGSI_SEMANTIC_VIEWPORT_INDEX:
 484                info->writes_viewport_index = TRUE;
 485                break;
 486             case TGSI_SEMANTIC_LAYER:
 487                info->writes_layer = TRUE;
 488                break;
 489             case TGSI_SEMANTIC_PSIZE:
 490                info->writes_psize = TRUE;
 491                break;
 492             case TGSI_SEMANTIC_CLIPVERTEX:
 493                info->writes_clipvertex = TRUE;
 494                break;
 495             }
 496          }
 497
 498          if (procType == PIPE_SHADER_FRAGMENT) {
 499             switch (semName) {
 500             case TGSI_SEMANTIC_POSITION:
 501                info->writes_z = TRUE;
 502                break;
 503             case TGSI_SEMANTIC_STENCIL:
 504                info->writes_stencil = TRUE;
 505                break;
 506             case TGSI_SEMANTIC_SAMPLEMASK:
 507                info->writes_samplemask = TRUE;
 508                break;
 509             }
 510          }
 511
 512          if (procType == PIPE_SHADER_VERTEX) {
 513             if (semName == TGSI_SEMANTIC_EDGEFLAG) {
 514                info->writes_edgeflag = TRUE;
 515             }
 516          }
 517       } else if (file == TGSI_FILE_SAMPLER) {
 518          STATIC_ASSERT(sizeof(info->samplers_declared) * 8 >= PIPE_MAX_SAMPLERS);
 519          info->samplers_declared |= 1u << reg;
 520       } else if (file == TGSI_FILE_SAMPLER_VIEW) {
 521          unsigned target = fulldecl->SamplerView.Resource;
 522          unsigned type = fulldecl->SamplerView.ReturnTypeX;
 523
 524          assert(target < TGSI_TEXTURE_UNKNOWN);
 525          if (info->sampler_targets[reg] == TGSI_TEXTURE_UNKNOWN) {
 526             /* Save sampler target for this sampler index */
 527             info->sampler_targets[reg] = target;
 528             info->sampler_type[reg] = type;
 529          } else {
 530             /* if previously declared, make sure targets agree */
 531             assert(info->sampler_targets[reg] == target);
 532             assert(info->sampler_type[reg] == type);
 533          }
 534       } else if (file == TGSI_FILE_IMAGE) {
 535          if (fulldecl->Image.Resource == TGSI_TEXTURE_BUFFER)
 536             info->images_buffers |= 1 << reg;
 537       }
 538    }
 539 }
 540
 541
 542 static void
 543 scan_immediate(struct tgsi_shader_info *info)
 544 {
 545    uint reg = info->immediate_count++;
 546    uint file = TGSI_FILE_IMMEDIATE;
 547
 548    info->file_mask[file] |= (1 << reg);
 549    info->file_count[file]++;
 550    info->file_max[file] = MAX2(info->file_max[file], (int)reg);
 551 }
 552
 553
 554 static void
 555 scan_property(struct tgsi_shader_info *info,
 556               const struct tgsi_full_property *fullprop)
 557 {
 558    unsigned name = fullprop->Property.PropertyName;
 559    unsigned value = fullprop->u[0].Data;
 560
 561    assert(name < ARRAY_SIZE(info->properties));
 562    info->properties[name] = value;
 563
 564    switch (name) {
 565    case TGSI_PROPERTY_NUM_CLIPDIST_ENABLED:
 566       info->num_written_clipdistance = value;
 567       info->clipdist_writemask |= (1 << value) - 1;
 568       break;
 569    case TGSI_PROPERTY_NUM_CULLDIST_ENABLED:
 570       info->num_written_culldistance = value;
 571       info->culldist_writemask |= (1 << value) - 1;
 572       break;
 573    }
 574 }
 575
 576
 577 /**
 578  * Scan the given TGSI shader to collect information such as number of
 579  * registers used, special instructions used, etc.
 580  * \return info  the result of the scan
 581  */
 582 void
 583 tgsi_scan_shader(const struct tgsi_token *tokens,
 584                  struct tgsi_shader_info *info)
 585 {
 586    uint procType, i;
 587    struct tgsi_parse_context parse;
 588    unsigned current_depth = 0;
 589
 590    memset(info, 0, sizeof(*info));
 591    for (i = 0; i < TGSI_FILE_COUNT; i++)
 592       info->file_max[i] = -1;
 593    for (i = 0; i < ARRAY_SIZE(info->const_file_max); i++)
 594       info->const_file_max[i] = -1;
 595    info->properties[TGSI_PROPERTY_GS_INVOCATIONS] = 1;
 596    for (i = 0; i < ARRAY_SIZE(info->sampler_targets); i++)
 597       info->sampler_targets[i] = TGSI_TEXTURE_UNKNOWN;
 598
 599    /**
 600     ** Setup to begin parsing input shader
 601     **/
 602    if (tgsi_parse_init( &parse, tokens ) != TGSI_PARSE_OK) {
 603       debug_printf("tgsi_parse_init() failed in tgsi_scan_shader()!\n");
 604       return;
 605    }
 606    procType = parse.FullHeader.Processor.Processor;
 607    assert(procType == PIPE_SHADER_FRAGMENT ||
 608           procType == PIPE_SHADER_VERTEX ||
 609           procType == PIPE_SHADER_GEOMETRY ||
 610           procType == PIPE_SHADER_TESS_CTRL ||
 611           procType == PIPE_SHADER_TESS_EVAL ||
 612           procType == PIPE_SHADER_COMPUTE);
 613    info->processor = procType;
 614
 615    /**
 616     ** Loop over incoming program tokens/instructions
 617     */
 618    while (!tgsi_parse_end_of_tokens(&parse)) {
 619       info->num_tokens++;
 620
 621       tgsi_parse_token( &parse );
 622
 623       switch( parse.FullToken.Token.Type ) {
 624       case TGSI_TOKEN_TYPE_INSTRUCTION:
 625          scan_instruction(info, &parse.FullToken.FullInstruction,
 626                           &current_depth);
 627          break;
 628       case TGSI_TOKEN_TYPE_DECLARATION:
 629          scan_declaration(info, &parse.FullToken.FullDeclaration);
 630          break;
 631       case TGSI_TOKEN_TYPE_IMMEDIATE:
 632          scan_immediate(info);
 633          break;
 634       case TGSI_TOKEN_TYPE_PROPERTY:
 635          scan_property(info, &parse.FullToken.FullProperty);
 636          break;
 637       default:
 638          assert(!"Unexpected TGSI token type");
 639       }
 640    }
 641
 642    info->uses_kill = (info->opcode_count[TGSI_OPCODE_KILL_IF] ||
 643                       info->opcode_count[TGSI_OPCODE_KILL]);
 644
 645    /* The dimensions of the IN decleration in geometry shader have
 646     * to be deduced from the type of the input primitive.
 647     */
 648    if (procType == PIPE_SHADER_GEOMETRY) {
 649       unsigned input_primitive =
 650             info->properties[TGSI_PROPERTY_GS_INPUT_PRIM];
 651       int num_verts = u_vertices_per_prim(input_primitive);
 652       int j;
 653       info->file_count[TGSI_FILE_INPUT] = num_verts;
 654       info->file_max[TGSI_FILE_INPUT] =
 655             MAX2(info->file_max[TGSI_FILE_INPUT], num_verts - 1);
 656       for (j = 0; j < num_verts; ++j) {
 657          info->file_mask[TGSI_FILE_INPUT] |= (1 << j);
 658       }
 659    }
 660
 661    tgsi_parse_free(&parse);
 662 }
 663
 664 /**
 665  * Collect information about the arrays of a given register file.
 666  *
 667  * @param tokens TGSI shader
 668  * @param file the register file to scan through
 669  * @param max_array_id number of entries in @p arrays; should be equal to the
 670  *                     highest array id, i.e. tgsi_shader_info::array_max[file].
 671  * @param arrays info for array of each ID will be written to arrays[ID - 1].
 672  */
 673 void
 674 tgsi_scan_arrays(const struct tgsi_token *tokens,
 675                  unsigned file,
 676                  unsigned max_array_id,
 677                  struct tgsi_array_info *arrays)
 678 {
 679    struct tgsi_parse_context parse;
 680
 681    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 682       debug_printf("tgsi_parse_init() failed in tgsi_scan_arrays()!\n");
 683       return;
 684    }
 685
 686    memset(arrays, 0, sizeof(arrays[0]) * max_array_id);
 687
 688    while (!tgsi_parse_end_of_tokens(&parse)) {
 689       struct tgsi_full_instruction *inst;
 690
 691       tgsi_parse_token(&parse);
 692
 693       if (parse.FullToken.Token.Type == TGSI_TOKEN_TYPE_DECLARATION) {
 694          struct tgsi_full_declaration *decl = &parse.FullToken.FullDeclaration;
 695
 696          if (decl->Declaration.Array && decl->Declaration.File == file &&
 697              decl->Array.ArrayID > 0 && decl->Array.ArrayID <= max_array_id) {
 698             struct tgsi_array_info *array = &arrays[decl->Array.ArrayID - 1];
 699             assert(!array->declared);
 700             array->declared = true;
 701             array->range = decl->Range;
 702          }
 703       }
 704
 705       if (parse.FullToken.Token.Type != TGSI_TOKEN_TYPE_INSTRUCTION)
 706          continue;
 707
 708       inst = &parse.FullToken.FullInstruction;
 709       for (unsigned i = 0; i < inst->Instruction.NumDstRegs; i++) {
 710          const struct tgsi_full_dst_register *dst = &inst->Dst[i];
 711          if (dst->Register.File != file)
 712             continue;
 713
 714          if (dst->Register.Indirect) {
 715             if (dst->Indirect.ArrayID > 0 &&
 716                 dst->Indirect.ArrayID <= max_array_id) {
 717                arrays[dst->Indirect.ArrayID - 1].writemask |= dst->Register.WriteMask;
 718             } else {
 719                /* Indirect writes without an ArrayID can write anywhere. */
 720                for (unsigned j = 0; j < max_array_id; ++j)
 721                   arrays[j].writemask |= dst->Register.WriteMask;
 722             }
 723          } else {
 724             /* Check whether the write falls into any of the arrays anyway. */
 725             for (unsigned j = 0; j < max_array_id; ++j) {
 726                struct tgsi_array_info *array = &arrays[j];
 727                if (array->declared &&
 728                    dst->Register.Index >= array->range.First &&
 729                    dst->Register.Index <= array->range.Last)
 730                   array->writemask |= dst->Register.WriteMask;
 731             }
 732          }
 733       }
 734    }
 735
 736    tgsi_parse_free(&parse);
 737
 738    return;
 739 }
 740
 741
 742 /**
 743  * Check if the given shader is a "passthrough" shader consisting of only
 744  * MOV instructions of the form:  MOV OUT[n], IN[n]
 745  *
 746  */
 747 boolean
 748 tgsi_is_passthrough_shader(const struct tgsi_token *tokens)
 749 {
 750    struct tgsi_parse_context parse;
 751
 752    /**
 753     ** Setup to begin parsing input shader
 754     **/
 755    if (tgsi_parse_init(&parse, tokens) != TGSI_PARSE_OK) {
 756       debug_printf("tgsi_parse_init() failed in tgsi_is_passthrough_shader()!\n");
 757       return FALSE;
 758    }
 759
 760    /**
 761     ** Loop over incoming program tokens/instructions
 762     */
 763    while (!tgsi_parse_end_of_tokens(&parse)) {
 764
 765       tgsi_parse_token(&parse);
 766
 767       switch (parse.FullToken.Token.Type) {
 768       case TGSI_TOKEN_TYPE_INSTRUCTION:
 769          {
 770             struct tgsi_full_instruction *fullinst =
 771                &parse.FullToken.FullInstruction;
 772             const struct tgsi_full_src_register *src =
 773                &fullinst->Src[0];
 774             const struct tgsi_full_dst_register *dst =
 775                &fullinst->Dst[0];
 776
 777             /* Do a whole bunch of checks for a simple move */
 778             if (fullinst->Instruction.Opcode != TGSI_OPCODE_MOV ||
 779                 (src->Register.File != TGSI_FILE_INPUT &&
 780                  src->Register.File != TGSI_FILE_SYSTEM_VALUE) ||
 781                 dst->Register.File != TGSI_FILE_OUTPUT ||
 782                 src->Register.Index != dst->Register.Index ||
 783
 784                 src->Register.Negate ||
 785                 src->Register.Absolute ||
 786
 787                 src->Register.SwizzleX != TGSI_SWIZZLE_X ||
 788                 src->Register.SwizzleY != TGSI_SWIZZLE_Y ||
 789                 src->Register.SwizzleZ != TGSI_SWIZZLE_Z ||
 790                 src->Register.SwizzleW != TGSI_SWIZZLE_W ||
 791
 792                 dst->Register.WriteMask != TGSI_WRITEMASK_XYZW)
 793             {
 794                tgsi_parse_free(&parse);
 795                return FALSE;
 796             }
 797          }
 798          break;
 799
 800       case TGSI_TOKEN_TYPE_DECLARATION:
 801          /* fall-through */
 802       case TGSI_TOKEN_TYPE_IMMEDIATE:
 803          /* fall-through */
 804       case TGSI_TOKEN_TYPE_PROPERTY:
 805          /* fall-through */
 806       default:
 807          ; /* no-op */
 808       }
 809    }
 810
 811    tgsi_parse_free(&parse);
 812
 813    /* if we get here, it's a pass-through shader */
 814    return TRUE;
 815 }