gallium: remove aux_vertex_buffer_slot code
[mesa.git] / src / gallium / auxiliary / util / u_blit.c
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
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27
28 /**
29 * @file
30 * Copy/blit pixel rect between surfaces
31 *
32 * @author Brian Paul
33 */
34
35
36 #include "pipe/p_context.h"
37 #include "util/u_debug.h"
38 #include "pipe/p_defines.h"
39 #include "util/u_inlines.h"
40 #include "pipe/p_shader_tokens.h"
41 #include "pipe/p_state.h"
42
43 #include "util/u_blit.h"
44 #include "util/u_draw_quad.h"
45 #include "util/u_format.h"
46 #include "util/u_math.h"
47 #include "util/u_memory.h"
48 #include "util/u_sampler.h"
49 #include "util/u_texture.h"
50 #include "util/u_simple_shaders.h"
51
52 #include "cso_cache/cso_context.h"
53
54
55 struct blit_state
56 {
57 struct pipe_context *pipe;
58 struct cso_context *cso;
59
60 struct pipe_blend_state blend_write_color;
61 struct pipe_depth_stencil_alpha_state dsa_keep_depthstencil;
62 struct pipe_rasterizer_state rasterizer;
63 struct pipe_sampler_state sampler;
64 struct pipe_viewport_state viewport;
65 struct pipe_vertex_element velem[2];
66
67 void *vs;
68 void *fs[PIPE_MAX_TEXTURE_TYPES][4];
69
70 struct pipe_resource *vbuf; /**< quad vertices */
71 unsigned vbuf_slot;
72
73 float vertices[4][2][4]; /**< vertex/texcoords for quad */
74 };
75
76
77 /**
78 * Create state object for blit.
79 * Intended to be created once and re-used for many blit() calls.
80 */
81 struct blit_state *
82 util_create_blit(struct pipe_context *pipe, struct cso_context *cso)
83 {
84 struct blit_state *ctx;
85 uint i;
86
87 ctx = CALLOC_STRUCT(blit_state);
88 if (!ctx)
89 return NULL;
90
91 ctx->pipe = pipe;
92 ctx->cso = cso;
93
94 /* disabled blending/masking */
95 ctx->blend_write_color.rt[0].colormask = PIPE_MASK_RGBA;
96
97 /* rasterizer */
98 ctx->rasterizer.cull_face = PIPE_FACE_NONE;
99 ctx->rasterizer.half_pixel_center = 1;
100 ctx->rasterizer.bottom_edge_rule = 1;
101 ctx->rasterizer.depth_clip = 1;
102
103 /* samplers */
104 ctx->sampler.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
105 ctx->sampler.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
106 ctx->sampler.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
107 ctx->sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
108 ctx->sampler.min_img_filter = 0; /* set later */
109 ctx->sampler.mag_img_filter = 0; /* set later */
110
111 /* vertex elements state */
112 for (i = 0; i < 2; i++) {
113 ctx->velem[i].src_offset = i * 4 * sizeof(float);
114 ctx->velem[i].instance_divisor = 0;
115 ctx->velem[i].vertex_buffer_index = 0;
116 ctx->velem[i].src_format = PIPE_FORMAT_R32G32B32A32_FLOAT;
117 }
118
119 ctx->vbuf = NULL;
120
121 /* init vertex data that doesn't change */
122 for (i = 0; i < 4; i++) {
123 ctx->vertices[i][0][3] = 1.0f; /* w */
124 ctx->vertices[i][1][3] = 1.0f; /* q */
125 }
126
127 return ctx;
128 }
129
130
131 /**
132 * Destroy a blit context
133 */
134 void
135 util_destroy_blit(struct blit_state *ctx)
136 {
137 struct pipe_context *pipe = ctx->pipe;
138 unsigned i, j;
139
140 if (ctx->vs)
141 pipe->delete_vs_state(pipe, ctx->vs);
142
143 for (i = 0; i < ARRAY_SIZE(ctx->fs); i++) {
144 for (j = 0; j < ARRAY_SIZE(ctx->fs[i]); j++) {
145 if (ctx->fs[i][j])
146 pipe->delete_fs_state(pipe, ctx->fs[i][j]);
147 }
148 }
149
150 pipe_resource_reference(&ctx->vbuf, NULL);
151
152 FREE(ctx);
153 }
154
155
156 /**
157 * Helper function to set the fragment shaders.
158 */
159 static inline void
160 set_fragment_shader(struct blit_state *ctx,
161 enum pipe_format format,
162 boolean src_xrbias,
163 enum pipe_texture_target pipe_tex)
164 {
165 enum tgsi_return_type stype;
166 unsigned idx;
167
168 if (util_format_is_pure_uint(format)) {
169 stype = TGSI_RETURN_TYPE_UINT;
170 idx = 0;
171 } else if (util_format_is_pure_sint(format)) {
172 stype = TGSI_RETURN_TYPE_SINT;
173 idx = 1;
174 } else {
175 stype = TGSI_RETURN_TYPE_FLOAT;
176 idx = 2;
177 }
178
179 if (src_xrbias) {
180 assert(stype == TGSI_RETURN_TYPE_FLOAT);
181 idx = 3;
182 if (!ctx->fs[pipe_tex][idx]) {
183 enum tgsi_texture_type tgsi_tex =
184 util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
185 ctx->fs[pipe_tex][idx] =
186 util_make_fragment_tex_shader_xrbias(ctx->pipe, tgsi_tex);
187 }
188 }
189 else if (!ctx->fs[pipe_tex][idx]) {
190 enum tgsi_texture_type tgsi_tex = util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
191
192 /* OpenGL does not allow blits from signed to unsigned integer
193 * or vice versa. */
194 ctx->fs[pipe_tex][idx] =
195 util_make_fragment_tex_shader_writemask(ctx->pipe, tgsi_tex,
196 TGSI_INTERPOLATE_LINEAR,
197 TGSI_WRITEMASK_XYZW,
198 stype, stype, false, false);
199 }
200
201 cso_set_fragment_shader_handle(ctx->cso, ctx->fs[pipe_tex][idx]);
202 }
203
204
205 /**
206 * Helper function to set the vertex shader.
207 */
208 static inline void
209 set_vertex_shader(struct blit_state *ctx)
210 {
211 /* vertex shader - still required to provide the linkage between
212 * fragment shader input semantics and vertex_element/buffers.
213 */
214 if (!ctx->vs) {
215 const uint semantic_names[] = { TGSI_SEMANTIC_POSITION,
216 TGSI_SEMANTIC_GENERIC };
217 const uint semantic_indexes[] = { 0, 0 };
218 ctx->vs = util_make_vertex_passthrough_shader(ctx->pipe, 2,
219 semantic_names,
220 semantic_indexes, FALSE);
221 }
222
223 cso_set_vertex_shader_handle(ctx->cso, ctx->vs);
224 }
225
226
227 /**
228 * Get offset of next free slot in vertex buffer for quad vertices.
229 */
230 static unsigned
231 get_next_slot(struct blit_state *ctx)
232 {
233 const unsigned max_slots = 4096 / sizeof ctx->vertices;
234
235 if (ctx->vbuf_slot >= max_slots) {
236 pipe_resource_reference(&ctx->vbuf, NULL);
237 ctx->vbuf_slot = 0;
238 }
239
240 if (!ctx->vbuf) {
241 ctx->vbuf = pipe_buffer_create(ctx->pipe->screen,
242 PIPE_BIND_VERTEX_BUFFER,
243 PIPE_USAGE_STREAM,
244 max_slots * sizeof ctx->vertices);
245 }
246
247 return ctx->vbuf_slot++ * sizeof ctx->vertices;
248 }
249
250
251
252
253 /**
254 * Setup vertex data for the textured quad we'll draw.
255 * Note: y=0=top
256 *
257 * FIXME: We should call util_map_texcoords2d_onto_cubemap
258 * for cubemaps.
259 */
260 static unsigned
261 setup_vertex_data_tex(struct blit_state *ctx,
262 enum pipe_texture_target src_target,
263 unsigned src_face,
264 float x0, float y0, float x1, float y1,
265 float s0, float t0, float s1, float t1,
266 float z)
267 {
268 unsigned offset;
269
270 ctx->vertices[0][0][0] = x0;
271 ctx->vertices[0][0][1] = y0;
272 ctx->vertices[0][0][2] = z;
273 ctx->vertices[0][1][0] = s0; /*s*/
274 ctx->vertices[0][1][1] = t0; /*t*/
275 ctx->vertices[0][1][2] = 0; /*r*/
276
277 ctx->vertices[1][0][0] = x1;
278 ctx->vertices[1][0][1] = y0;
279 ctx->vertices[1][0][2] = z;
280 ctx->vertices[1][1][0] = s1; /*s*/
281 ctx->vertices[1][1][1] = t0; /*t*/
282 ctx->vertices[1][1][2] = 0; /*r*/
283
284 ctx->vertices[2][0][0] = x1;
285 ctx->vertices[2][0][1] = y1;
286 ctx->vertices[2][0][2] = z;
287 ctx->vertices[2][1][0] = s1;
288 ctx->vertices[2][1][1] = t1;
289 ctx->vertices[3][1][2] = 0;
290
291 ctx->vertices[3][0][0] = x0;
292 ctx->vertices[3][0][1] = y1;
293 ctx->vertices[3][0][2] = z;
294 ctx->vertices[3][1][0] = s0;
295 ctx->vertices[3][1][1] = t1;
296 ctx->vertices[3][1][2] = 0;
297
298 if (src_target == PIPE_TEXTURE_CUBE ||
299 src_target == PIPE_TEXTURE_CUBE_ARRAY) {
300 /* Map cubemap texture coordinates inplace. */
301 const unsigned stride =
302 sizeof ctx->vertices[0] / sizeof ctx->vertices[0][0][0];
303 util_map_texcoords2d_onto_cubemap(src_face,
304 &ctx->vertices[0][1][0], stride,
305 &ctx->vertices[0][1][0], stride,
306 TRUE);
307 }
308
309 offset = get_next_slot(ctx);
310
311 if (ctx->vbuf) {
312 pipe_buffer_write_nooverlap(ctx->pipe, ctx->vbuf,
313 offset, sizeof(ctx->vertices), ctx->vertices);
314 }
315
316 return offset;
317 }
318
319
320 /**
321 * \return TRUE if two regions overlap, FALSE otherwise
322 */
323 static boolean
324 regions_overlap(int srcX0, int srcY0,
325 int srcX1, int srcY1,
326 int dstX0, int dstY0,
327 int dstX1, int dstY1)
328 {
329 if (MAX2(srcX0, srcX1) <= MIN2(dstX0, dstX1))
330 return FALSE; /* src completely left of dst */
331
332 if (MAX2(dstX0, dstX1) <= MIN2(srcX0, srcX1))
333 return FALSE; /* dst completely left of src */
334
335 if (MAX2(srcY0, srcY1) <= MIN2(dstY0, dstY1))
336 return FALSE; /* src completely above dst */
337
338 if (MAX2(dstY0, dstY1) <= MIN2(srcY0, srcY1))
339 return FALSE; /* dst completely above src */
340
341 return TRUE; /* some overlap */
342 }
343
344
345 /**
346 * Can we blit from src format to dest format with a simple copy?
347 */
348 static boolean
349 formats_compatible(enum pipe_format src_format,
350 enum pipe_format dst_format)
351 {
352 if (src_format == dst_format) {
353 return TRUE;
354 }
355 else {
356 const struct util_format_description *src_desc =
357 util_format_description(src_format);
358 const struct util_format_description *dst_desc =
359 util_format_description(dst_format);
360 return util_is_format_compatible(src_desc, dst_desc);
361 }
362 }
363
364
365 /**
366 * Copy pixel block from src surface to dst surface.
367 * Overlapping regions are acceptable.
368 * Flipping and stretching are supported.
369 * \param filter one of PIPE_TEX_FILTER_NEAREST/LINEAR
370 * \param writemask bitmask of PIPE_MASK_[RGBAZS]. Controls which channels
371 * in the dest surface are sourced from the src surface.
372 * Disabled color channels are sourced from (0,0,0,1).
373 */
374 void
375 util_blit_pixels(struct blit_state *ctx,
376 struct pipe_resource *src_tex,
377 unsigned src_level,
378 int srcX0, int srcY0,
379 int srcX1, int srcY1,
380 int srcZ0,
381 struct pipe_surface *dst,
382 int dstX0, int dstY0,
383 int dstX1, int dstY1,
384 MAYBE_UNUSED float z,
385 enum pipe_tex_filter filter,
386 uint writemask)
387 {
388 struct pipe_context *pipe = ctx->pipe;
389 enum pipe_format src_format, dst_format;
390 const int srcW = abs(srcX1 - srcX0);
391 const int srcH = abs(srcY1 - srcY0);
392 boolean overlap;
393 boolean is_stencil, is_depth, blit_depth, blit_stencil;
394 const struct util_format_description *src_desc =
395 util_format_description(src_tex->format);
396 struct pipe_blit_info info;
397
398 assert(filter == PIPE_TEX_FILTER_NEAREST ||
399 filter == PIPE_TEX_FILTER_LINEAR);
400
401 assert(src_level <= src_tex->last_level);
402
403 /* do the regions overlap? */
404 overlap = src_tex == dst->texture &&
405 dst->u.tex.level == src_level &&
406 dst->u.tex.first_layer == srcZ0 &&
407 regions_overlap(srcX0, srcY0, srcX1, srcY1,
408 dstX0, dstY0, dstX1, dstY1);
409
410 src_format = util_format_linear(src_tex->format);
411 dst_format = util_format_linear(dst->texture->format);
412
413 /* See whether we will blit depth or stencil. */
414 is_depth = util_format_has_depth(src_desc);
415 is_stencil = util_format_has_stencil(src_desc);
416
417 blit_depth = is_depth && (writemask & PIPE_MASK_Z);
418 blit_stencil = is_stencil && (writemask & PIPE_MASK_S);
419
420 if (is_depth || is_stencil) {
421 assert((writemask & PIPE_MASK_RGBA) == 0);
422 assert(blit_depth || blit_stencil);
423 }
424 else {
425 assert((writemask & PIPE_MASK_ZS) == 0);
426 assert(!blit_depth);
427 assert(!blit_stencil);
428 }
429
430 /*
431 * XXX: z parameter is deprecated. dst->u.tex.first_layer
432 * specificies the destination layer.
433 */
434 assert(z == 0.0f);
435
436 /*
437 * Check for simple case: no format conversion, no flipping, no stretching,
438 * no overlapping, same number of samples.
439 * Filter mode should not matter since there's no stretching.
440 */
441 if (formats_compatible(src_format, dst_format) &&
442 src_tex->nr_samples == dst->texture->nr_samples &&
443 is_stencil == blit_stencil &&
444 is_depth == blit_depth &&
445 srcX0 < srcX1 &&
446 dstX0 < dstX1 &&
447 srcY0 < srcY1 &&
448 dstY0 < dstY1 &&
449 (dstX1 - dstX0) == (srcX1 - srcX0) &&
450 (dstY1 - dstY0) == (srcY1 - srcY0) &&
451 !overlap) {
452 struct pipe_box src_box;
453 src_box.x = srcX0;
454 src_box.y = srcY0;
455 src_box.z = srcZ0;
456 src_box.width = srcW;
457 src_box.height = srcH;
458 src_box.depth = 1;
459 pipe->resource_copy_region(pipe,
460 dst->texture, dst->u.tex.level,
461 dstX0, dstY0, dst->u.tex.first_layer,/* dest */
462 src_tex, src_level,
463 &src_box);
464 return;
465 }
466
467 memset(&info, 0, sizeof info);
468 info.dst.resource = dst->texture;
469 info.dst.level = dst->u.tex.level;
470 info.dst.box.x = dstX0;
471 info.dst.box.y = dstY0;
472 info.dst.box.z = dst->u.tex.first_layer;
473 info.dst.box.width = dstX1 - dstX0;
474 info.dst.box.height = dstY1 - dstY0;
475 assert(info.dst.box.width >= 0);
476 assert(info.dst.box.height >= 0);
477 info.dst.box.depth = 1;
478 info.dst.format = dst_format;
479 info.src.resource = src_tex;
480 info.src.level = src_level;
481 info.src.box.x = srcX0;
482 info.src.box.y = srcY0;
483 info.src.box.z = srcZ0;
484 info.src.box.width = srcX1 - srcX0;
485 info.src.box.height = srcY1 - srcY0;
486 info.src.box.depth = 1;
487 info.src.format = src_format;
488 info.mask = writemask;
489 info.filter = filter;
490 info.scissor_enable = 0;
491
492 pipe->blit(pipe, &info);
493 }
494
495
496 /**
497 * Copy pixel block from src sampler view to dst surface.
498 *
499 * The sampler view's first_level field indicates the source
500 * mipmap level to use.
501 *
502 * The sampler view's first_layer indicate the layer to use, but for
503 * cube maps it must point to the first face. Face is passed in src_face.
504 *
505 * The main advantage over util_blit_pixels is that it allows to specify
506 * swizzles in pipe_sampler_view::swizzle_?.
507 *
508 * But there is no control over blitting Z and/or stencil.
509 */
510 void
511 util_blit_pixels_tex(struct blit_state *ctx,
512 struct pipe_sampler_view *src_sampler_view,
513 int srcX0, int srcY0,
514 int srcX1, int srcY1,
515 unsigned src_face,
516 struct pipe_surface *dst,
517 int dstX0, int dstY0,
518 int dstX1, int dstY1,
519 float z, enum pipe_tex_filter filter,
520 boolean src_xrbias)
521 {
522 boolean normalized = src_sampler_view->texture->target != PIPE_TEXTURE_RECT;
523 struct pipe_framebuffer_state fb;
524 float s0, t0, s1, t1;
525 unsigned offset;
526 struct pipe_resource *tex = src_sampler_view->texture;
527
528 assert(filter == PIPE_TEX_FILTER_NEAREST ||
529 filter == PIPE_TEX_FILTER_LINEAR);
530
531 assert(tex);
532 assert(tex->width0 != 0);
533 assert(tex->height0 != 0);
534
535 s0 = (float) srcX0;
536 s1 = (float) srcX1;
537 t0 = (float) srcY0;
538 t1 = (float) srcY1;
539
540 if (normalized) {
541 /* normalize according to the mipmap level's size */
542 int level = src_sampler_view->u.tex.first_level;
543 float w = (float) u_minify(tex->width0, level);
544 float h = (float) u_minify(tex->height0, level);
545 s0 /= w;
546 s1 /= w;
547 t0 /= h;
548 t1 /= h;
549 }
550
551 assert(ctx->pipe->screen->is_format_supported(ctx->pipe->screen, dst->format,
552 PIPE_TEXTURE_2D,
553 dst->texture->nr_samples,
554 PIPE_BIND_RENDER_TARGET));
555
556 /* save state (restored below) */
557 cso_save_state(ctx->cso, (CSO_BIT_BLEND |
558 CSO_BIT_DEPTH_STENCIL_ALPHA |
559 CSO_BIT_RASTERIZER |
560 CSO_BIT_SAMPLE_MASK |
561 CSO_BIT_MIN_SAMPLES |
562 CSO_BIT_FRAGMENT_SAMPLERS |
563 CSO_BIT_FRAGMENT_SAMPLER_VIEWS |
564 CSO_BIT_STREAM_OUTPUTS |
565 CSO_BIT_VIEWPORT |
566 CSO_BIT_FRAMEBUFFER |
567 CSO_BIT_PAUSE_QUERIES |
568 CSO_BIT_FRAGMENT_SHADER |
569 CSO_BIT_VERTEX_SHADER |
570 CSO_BIT_TESSCTRL_SHADER |
571 CSO_BIT_TESSEVAL_SHADER |
572 CSO_BIT_GEOMETRY_SHADER |
573 CSO_BIT_VERTEX_ELEMENTS |
574 CSO_BIT_AUX_VERTEX_BUFFER_SLOT));
575
576 /* set misc state we care about */
577 cso_set_blend(ctx->cso, &ctx->blend_write_color);
578 cso_set_depth_stencil_alpha(ctx->cso, &ctx->dsa_keep_depthstencil);
579 cso_set_sample_mask(ctx->cso, ~0);
580 cso_set_min_samples(ctx->cso, 1);
581 cso_set_rasterizer(ctx->cso, &ctx->rasterizer);
582 cso_set_vertex_elements(ctx->cso, 2, ctx->velem);
583 cso_set_stream_outputs(ctx->cso, 0, NULL, NULL);
584
585 /* sampler */
586 ctx->sampler.normalized_coords = normalized;
587 ctx->sampler.min_img_filter = filter;
588 ctx->sampler.mag_img_filter = filter;
589 {
590 const struct pipe_sampler_state *samplers[] = {&ctx->sampler};
591 cso_set_samplers(ctx->cso, PIPE_SHADER_FRAGMENT, 1, samplers);
592 }
593
594 /* viewport */
595 ctx->viewport.scale[0] = 0.5f * dst->width;
596 ctx->viewport.scale[1] = 0.5f * dst->height;
597 ctx->viewport.scale[2] = 0.5f;
598 ctx->viewport.translate[0] = 0.5f * dst->width;
599 ctx->viewport.translate[1] = 0.5f * dst->height;
600 ctx->viewport.translate[2] = 0.5f;
601 cso_set_viewport(ctx->cso, &ctx->viewport);
602
603 /* texture */
604 cso_set_sampler_views(ctx->cso, PIPE_SHADER_FRAGMENT, 1, &src_sampler_view);
605
606 /* shaders */
607 set_fragment_shader(ctx, src_sampler_view->format,
608 src_xrbias,
609 src_sampler_view->texture->target);
610 set_vertex_shader(ctx);
611 cso_set_tessctrl_shader_handle(ctx->cso, NULL);
612 cso_set_tesseval_shader_handle(ctx->cso, NULL);
613 cso_set_geometry_shader_handle(ctx->cso, NULL);
614
615 /* drawing dest */
616 memset(&fb, 0, sizeof(fb));
617 fb.width = dst->width;
618 fb.height = dst->height;
619 fb.nr_cbufs = 1;
620 fb.cbufs[0] = dst;
621 cso_set_framebuffer(ctx->cso, &fb);
622
623 /* draw quad */
624 offset = setup_vertex_data_tex(ctx,
625 src_sampler_view->texture->target,
626 src_face,
627 (float) dstX0 / dst->width * 2.0f - 1.0f,
628 (float) dstY0 / dst->height * 2.0f - 1.0f,
629 (float) dstX1 / dst->width * 2.0f - 1.0f,
630 (float) dstY1 / dst->height * 2.0f - 1.0f,
631 s0, t0, s1, t1,
632 z);
633
634 util_draw_vertex_buffer(ctx->pipe, ctx->cso, ctx->vbuf, 0,
635 offset,
636 PIPE_PRIM_TRIANGLE_FAN,
637 4, /* verts */
638 2); /* attribs/vert */
639
640 /* restore state we changed */
641 cso_restore_state(ctx->cso);
642 }