Added few more stubs so that control reaches to DestroyDevice().
[mesa.git] / src / gallium / auxiliary / util / u_blit.c
1 /**************************************************************************
2 *
3 * Copyright 2008 VMware, Inc.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
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11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR
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23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * @file
30 * Copy/blit pixel rect between surfaces
31 *
32 * @author Brian Paul
33 */
34
35
36 #include "pipe/p_context.h"
37 #include "util/u_debug.h"
38 #include "pipe/p_defines.h"
39 #include "util/u_inlines.h"
40 #include "pipe/p_shader_tokens.h"
41 #include "pipe/p_state.h"
42
43 #include "util/u_blit.h"
44 #include "util/u_draw_quad.h"
45 #include "util/format/u_format.h"
46 #include "util/u_math.h"
47 #include "util/u_memory.h"
48 #include "util/u_sampler.h"
49 #include "util/u_texture.h"
50 #include "util/u_simple_shaders.h"
51
52 #include "cso_cache/cso_context.h"
53
54
55 struct blit_state
56 {
57 struct pipe_context *pipe;
58 struct cso_context *cso;
59
60 struct pipe_blend_state blend_write_color;
61 struct pipe_depth_stencil_alpha_state dsa_keep_depthstencil;
62 struct pipe_rasterizer_state rasterizer;
63 struct pipe_sampler_state sampler;
64 struct pipe_viewport_state viewport;
65 struct cso_velems_state velem;
66
67 void *vs;
68 void *fs[PIPE_MAX_TEXTURE_TYPES][4];
69
70 struct pipe_resource *vbuf; /**< quad vertices */
71 unsigned vbuf_slot;
72
73 float vertices[4][2][4]; /**< vertex/texcoords for quad */
74 };
75
76
77 /**
78 * Create state object for blit.
79 * Intended to be created once and re-used for many blit() calls.
80 */
81 struct blit_state *
82 util_create_blit(struct pipe_context *pipe, struct cso_context *cso)
83 {
84 struct blit_state *ctx;
85 uint i;
86
87 ctx = CALLOC_STRUCT(blit_state);
88 if (!ctx)
89 return NULL;
90
91 ctx->pipe = pipe;
92 ctx->cso = cso;
93
94 /* disabled blending/masking */
95 ctx->blend_write_color.rt[0].colormask = PIPE_MASK_RGBA;
96
97 /* rasterizer */
98 ctx->rasterizer.cull_face = PIPE_FACE_NONE;
99 ctx->rasterizer.half_pixel_center = 1;
100 ctx->rasterizer.bottom_edge_rule = 1;
101 ctx->rasterizer.depth_clip_near = 1;
102 ctx->rasterizer.depth_clip_far = 1;
103
104 /* samplers */
105 ctx->sampler.wrap_s = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
106 ctx->sampler.wrap_t = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
107 ctx->sampler.wrap_r = PIPE_TEX_WRAP_CLAMP_TO_EDGE;
108 ctx->sampler.min_mip_filter = PIPE_TEX_MIPFILTER_NONE;
109 ctx->sampler.min_img_filter = 0; /* set later */
110 ctx->sampler.mag_img_filter = 0; /* set later */
111
112 /* vertex elements state */
113 ctx->velem.count = 2;
114 for (i = 0; i < 2; i++) {
115 ctx->velem.velems[i].src_offset = i * 4 * sizeof(float);
116 ctx->velem.velems[i].instance_divisor = 0;
117 ctx->velem.velems[i].vertex_buffer_index = 0;
118 ctx->velem.velems[i].src_format = PIPE_FORMAT_R32G32B32A32_FLOAT;
119 }
120
121 ctx->vbuf = NULL;
122
123 /* init vertex data that doesn't change */
124 for (i = 0; i < 4; i++) {
125 ctx->vertices[i][0][3] = 1.0f; /* w */
126 ctx->vertices[i][1][3] = 1.0f; /* q */
127 }
128
129 return ctx;
130 }
131
132
133 /**
134 * Destroy a blit context
135 */
136 void
137 util_destroy_blit(struct blit_state *ctx)
138 {
139 struct pipe_context *pipe = ctx->pipe;
140 unsigned i, j;
141
142 if (ctx->vs)
143 pipe->delete_vs_state(pipe, ctx->vs);
144
145 for (i = 0; i < ARRAY_SIZE(ctx->fs); i++) {
146 for (j = 0; j < ARRAY_SIZE(ctx->fs[i]); j++) {
147 if (ctx->fs[i][j])
148 pipe->delete_fs_state(pipe, ctx->fs[i][j]);
149 }
150 }
151
152 pipe_resource_reference(&ctx->vbuf, NULL);
153
154 FREE(ctx);
155 }
156
157
158 /**
159 * Helper function to set the fragment shaders.
160 */
161 static inline void
162 set_fragment_shader(struct blit_state *ctx,
163 enum pipe_format format,
164 boolean src_xrbias,
165 enum pipe_texture_target pipe_tex)
166 {
167 enum tgsi_return_type stype;
168 unsigned idx;
169
170 if (util_format_is_pure_uint(format)) {
171 stype = TGSI_RETURN_TYPE_UINT;
172 idx = 0;
173 } else if (util_format_is_pure_sint(format)) {
174 stype = TGSI_RETURN_TYPE_SINT;
175 idx = 1;
176 } else {
177 stype = TGSI_RETURN_TYPE_FLOAT;
178 idx = 2;
179 }
180
181 if (src_xrbias) {
182 assert(stype == TGSI_RETURN_TYPE_FLOAT);
183 idx = 3;
184 if (!ctx->fs[pipe_tex][idx]) {
185 enum tgsi_texture_type tgsi_tex =
186 util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
187 ctx->fs[pipe_tex][idx] =
188 util_make_fragment_tex_shader_xrbias(ctx->pipe, tgsi_tex);
189 }
190 }
191 else if (!ctx->fs[pipe_tex][idx]) {
192 enum tgsi_texture_type tgsi_tex = util_pipe_tex_to_tgsi_tex(pipe_tex, 0);
193
194 /* OpenGL does not allow blits from signed to unsigned integer
195 * or vice versa. */
196 ctx->fs[pipe_tex][idx] =
197 util_make_fragment_tex_shader_writemask(ctx->pipe, tgsi_tex,
198 TGSI_INTERPOLATE_LINEAR,
199 TGSI_WRITEMASK_XYZW,
200 stype, stype, false, false);
201 }
202
203 cso_set_fragment_shader_handle(ctx->cso, ctx->fs[pipe_tex][idx]);
204 }
205
206
207 /**
208 * Helper function to set the vertex shader.
209 */
210 static inline void
211 set_vertex_shader(struct blit_state *ctx)
212 {
213 /* vertex shader - still required to provide the linkage between
214 * fragment shader input semantics and vertex_element/buffers.
215 */
216 if (!ctx->vs) {
217 const enum tgsi_semantic semantic_names[] = {
218 TGSI_SEMANTIC_POSITION,
219 TGSI_SEMANTIC_GENERIC
220 };
221 const uint semantic_indexes[] = { 0, 0 };
222 ctx->vs = util_make_vertex_passthrough_shader(ctx->pipe, 2,
223 semantic_names,
224 semantic_indexes, FALSE);
225 }
226
227 cso_set_vertex_shader_handle(ctx->cso, ctx->vs);
228 }
229
230
231 /**
232 * Get offset of next free slot in vertex buffer for quad vertices.
233 */
234 static unsigned
235 get_next_slot(struct blit_state *ctx)
236 {
237 const unsigned max_slots = 4096 / sizeof ctx->vertices;
238
239 if (ctx->vbuf_slot >= max_slots) {
240 pipe_resource_reference(&ctx->vbuf, NULL);
241 ctx->vbuf_slot = 0;
242 }
243
244 if (!ctx->vbuf) {
245 ctx->vbuf = pipe_buffer_create(ctx->pipe->screen,
246 PIPE_BIND_VERTEX_BUFFER,
247 PIPE_USAGE_STREAM,
248 max_slots * sizeof ctx->vertices);
249 }
250
251 return ctx->vbuf_slot++ * sizeof ctx->vertices;
252 }
253
254
255
256
257 /**
258 * Setup vertex data for the textured quad we'll draw.
259 * Note: y=0=top
260 *
261 * FIXME: We should call util_map_texcoords2d_onto_cubemap
262 * for cubemaps.
263 */
264 static unsigned
265 setup_vertex_data_tex(struct blit_state *ctx,
266 enum pipe_texture_target src_target,
267 unsigned src_face,
268 float x0, float y0, float x1, float y1,
269 float s0, float t0, float s1, float t1,
270 float z)
271 {
272 unsigned offset;
273
274 ctx->vertices[0][0][0] = x0;
275 ctx->vertices[0][0][1] = y0;
276 ctx->vertices[0][0][2] = z;
277 ctx->vertices[0][1][0] = s0; /*s*/
278 ctx->vertices[0][1][1] = t0; /*t*/
279 ctx->vertices[0][1][2] = 0; /*r*/
280
281 ctx->vertices[1][0][0] = x1;
282 ctx->vertices[1][0][1] = y0;
283 ctx->vertices[1][0][2] = z;
284 ctx->vertices[1][1][0] = s1; /*s*/
285 ctx->vertices[1][1][1] = t0; /*t*/
286 ctx->vertices[1][1][2] = 0; /*r*/
287
288 ctx->vertices[2][0][0] = x1;
289 ctx->vertices[2][0][1] = y1;
290 ctx->vertices[2][0][2] = z;
291 ctx->vertices[2][1][0] = s1;
292 ctx->vertices[2][1][1] = t1;
293 ctx->vertices[3][1][2] = 0;
294
295 ctx->vertices[3][0][0] = x0;
296 ctx->vertices[3][0][1] = y1;
297 ctx->vertices[3][0][2] = z;
298 ctx->vertices[3][1][0] = s0;
299 ctx->vertices[3][1][1] = t1;
300 ctx->vertices[3][1][2] = 0;
301
302 if (src_target == PIPE_TEXTURE_CUBE ||
303 src_target == PIPE_TEXTURE_CUBE_ARRAY) {
304 /* Map cubemap texture coordinates inplace. */
305 const unsigned stride =
306 sizeof ctx->vertices[0] / sizeof ctx->vertices[0][0][0];
307 util_map_texcoords2d_onto_cubemap(src_face,
308 &ctx->vertices[0][1][0], stride,
309 &ctx->vertices[0][1][0], stride,
310 TRUE);
311 }
312
313 offset = get_next_slot(ctx);
314
315 if (ctx->vbuf) {
316 pipe_buffer_write_nooverlap(ctx->pipe, ctx->vbuf,
317 offset, sizeof(ctx->vertices), ctx->vertices);
318 }
319
320 return offset;
321 }
322
323
324 /**
325 * \return TRUE if two regions overlap, FALSE otherwise
326 */
327 static boolean
328 regions_overlap(int srcX0, int srcY0,
329 int srcX1, int srcY1,
330 int dstX0, int dstY0,
331 int dstX1, int dstY1)
332 {
333 if (MAX2(srcX0, srcX1) <= MIN2(dstX0, dstX1))
334 return FALSE; /* src completely left of dst */
335
336 if (MAX2(dstX0, dstX1) <= MIN2(srcX0, srcX1))
337 return FALSE; /* dst completely left of src */
338
339 if (MAX2(srcY0, srcY1) <= MIN2(dstY0, dstY1))
340 return FALSE; /* src completely above dst */
341
342 if (MAX2(dstY0, dstY1) <= MIN2(srcY0, srcY1))
343 return FALSE; /* dst completely above src */
344
345 return TRUE; /* some overlap */
346 }
347
348
349 /**
350 * Can we blit from src format to dest format with a simple copy?
351 */
352 static boolean
353 formats_compatible(enum pipe_format src_format,
354 enum pipe_format dst_format)
355 {
356 if (src_format == dst_format) {
357 return TRUE;
358 }
359 else {
360 const struct util_format_description *src_desc =
361 util_format_description(src_format);
362 const struct util_format_description *dst_desc =
363 util_format_description(dst_format);
364 return util_is_format_compatible(src_desc, dst_desc);
365 }
366 }
367
368
369 /**
370 * Copy pixel block from src surface to dst surface.
371 * Overlapping regions are acceptable.
372 * Flipping and stretching are supported.
373 * \param filter one of PIPE_TEX_FILTER_NEAREST/LINEAR
374 * \param writemask bitmask of PIPE_MASK_[RGBAZS]. Controls which channels
375 * in the dest surface are sourced from the src surface.
376 * Disabled color channels are sourced from (0,0,0,1).
377 */
378 void
379 util_blit_pixels(struct blit_state *ctx,
380 struct pipe_resource *src_tex,
381 unsigned src_level,
382 int srcX0, int srcY0,
383 int srcX1, int srcY1,
384 int srcZ0,
385 struct pipe_surface *dst,
386 int dstX0, int dstY0,
387 int dstX1, int dstY1,
388 ASSERTED float z,
389 enum pipe_tex_filter filter,
390 uint writemask)
391 {
392 struct pipe_context *pipe = ctx->pipe;
393 enum pipe_format src_format, dst_format;
394 const int srcW = abs(srcX1 - srcX0);
395 const int srcH = abs(srcY1 - srcY0);
396 boolean overlap;
397 boolean is_stencil, is_depth, blit_depth, blit_stencil;
398 const struct util_format_description *src_desc =
399 util_format_description(src_tex->format);
400 struct pipe_blit_info info;
401
402 assert(filter == PIPE_TEX_FILTER_NEAREST ||
403 filter == PIPE_TEX_FILTER_LINEAR);
404
405 assert(src_level <= src_tex->last_level);
406
407 /* do the regions overlap? */
408 overlap = src_tex == dst->texture &&
409 dst->u.tex.level == src_level &&
410 dst->u.tex.first_layer == srcZ0 &&
411 regions_overlap(srcX0, srcY0, srcX1, srcY1,
412 dstX0, dstY0, dstX1, dstY1);
413
414 src_format = util_format_linear(src_tex->format);
415 dst_format = util_format_linear(dst->texture->format);
416
417 /* See whether we will blit depth or stencil. */
418 is_depth = util_format_has_depth(src_desc);
419 is_stencil = util_format_has_stencil(src_desc);
420
421 blit_depth = is_depth && (writemask & PIPE_MASK_Z);
422 blit_stencil = is_stencil && (writemask & PIPE_MASK_S);
423
424 if (is_depth || is_stencil) {
425 assert((writemask & PIPE_MASK_RGBA) == 0);
426 assert(blit_depth || blit_stencil);
427 }
428 else {
429 assert((writemask & PIPE_MASK_ZS) == 0);
430 assert(!blit_depth);
431 assert(!blit_stencil);
432 }
433
434 /*
435 * XXX: z parameter is deprecated. dst->u.tex.first_layer
436 * specificies the destination layer.
437 */
438 assert(z == 0.0f);
439
440 /*
441 * Check for simple case: no format conversion, no flipping, no stretching,
442 * no overlapping, same number of samples.
443 * Filter mode should not matter since there's no stretching.
444 */
445 if (formats_compatible(src_format, dst_format) &&
446 src_tex->nr_samples == dst->texture->nr_samples &&
447 is_stencil == blit_stencil &&
448 is_depth == blit_depth &&
449 srcX0 < srcX1 &&
450 dstX0 < dstX1 &&
451 srcY0 < srcY1 &&
452 dstY0 < dstY1 &&
453 (dstX1 - dstX0) == (srcX1 - srcX0) &&
454 (dstY1 - dstY0) == (srcY1 - srcY0) &&
455 !overlap) {
456 struct pipe_box src_box;
457 src_box.x = srcX0;
458 src_box.y = srcY0;
459 src_box.z = srcZ0;
460 src_box.width = srcW;
461 src_box.height = srcH;
462 src_box.depth = 1;
463 pipe->resource_copy_region(pipe,
464 dst->texture, dst->u.tex.level,
465 dstX0, dstY0, dst->u.tex.first_layer,/* dest */
466 src_tex, src_level,
467 &src_box);
468 return;
469 }
470
471 memset(&info, 0, sizeof info);
472 info.dst.resource = dst->texture;
473 info.dst.level = dst->u.tex.level;
474 info.dst.box.x = dstX0;
475 info.dst.box.y = dstY0;
476 info.dst.box.z = dst->u.tex.first_layer;
477 info.dst.box.width = dstX1 - dstX0;
478 info.dst.box.height = dstY1 - dstY0;
479 assert(info.dst.box.width >= 0);
480 assert(info.dst.box.height >= 0);
481 info.dst.box.depth = 1;
482 info.dst.format = dst_format;
483 info.src.resource = src_tex;
484 info.src.level = src_level;
485 info.src.box.x = srcX0;
486 info.src.box.y = srcY0;
487 info.src.box.z = srcZ0;
488 info.src.box.width = srcX1 - srcX0;
489 info.src.box.height = srcY1 - srcY0;
490 info.src.box.depth = 1;
491 info.src.format = src_format;
492 info.mask = writemask;
493 info.filter = filter;
494 info.scissor_enable = 0;
495
496 pipe->blit(pipe, &info);
497 }
498
499
500 /**
501 * Copy pixel block from src sampler view to dst surface.
502 *
503 * The sampler view's first_level field indicates the source
504 * mipmap level to use.
505 *
506 * The sampler view's first_layer indicate the layer to use, but for
507 * cube maps it must point to the first face. Face is passed in src_face.
508 *
509 * The main advantage over util_blit_pixels is that it allows to specify
510 * swizzles in pipe_sampler_view::swizzle_?.
511 *
512 * But there is no control over blitting Z and/or stencil.
513 */
514 void
515 util_blit_pixels_tex(struct blit_state *ctx,
516 struct pipe_sampler_view *src_sampler_view,
517 int srcX0, int srcY0,
518 int srcX1, int srcY1,
519 unsigned src_face,
520 struct pipe_surface *dst,
521 int dstX0, int dstY0,
522 int dstX1, int dstY1,
523 float z, enum pipe_tex_filter filter,
524 boolean src_xrbias)
525 {
526 boolean normalized = src_sampler_view->texture->target != PIPE_TEXTURE_RECT;
527 struct pipe_framebuffer_state fb;
528 float s0, t0, s1, t1;
529 unsigned offset;
530 struct pipe_resource *tex = src_sampler_view->texture;
531
532 assert(filter == PIPE_TEX_FILTER_NEAREST ||
533 filter == PIPE_TEX_FILTER_LINEAR);
534
535 assert(tex);
536 assert(tex->width0 != 0);
537 assert(tex->height0 != 0);
538
539 s0 = (float) srcX0;
540 s1 = (float) srcX1;
541 t0 = (float) srcY0;
542 t1 = (float) srcY1;
543
544 if (normalized) {
545 /* normalize according to the mipmap level's size */
546 int level = src_sampler_view->u.tex.first_level;
547 float w = (float) u_minify(tex->width0, level);
548 float h = (float) u_minify(tex->height0, level);
549 s0 /= w;
550 s1 /= w;
551 t0 /= h;
552 t1 /= h;
553 }
554
555 assert(ctx->pipe->screen->is_format_supported(ctx->pipe->screen, dst->format,
556 PIPE_TEXTURE_2D,
557 dst->texture->nr_samples,
558 dst->texture->nr_storage_samples,
559 PIPE_BIND_RENDER_TARGET));
560
561 /* save state (restored below) */
562 cso_save_state(ctx->cso, (CSO_BIT_BLEND |
563 CSO_BIT_DEPTH_STENCIL_ALPHA |
564 CSO_BIT_RASTERIZER |
565 CSO_BIT_SAMPLE_MASK |
566 CSO_BIT_MIN_SAMPLES |
567 CSO_BIT_FRAGMENT_SAMPLERS |
568 CSO_BIT_FRAGMENT_SAMPLER_VIEWS |
569 CSO_BIT_STREAM_OUTPUTS |
570 CSO_BIT_VIEWPORT |
571 CSO_BIT_FRAMEBUFFER |
572 CSO_BIT_PAUSE_QUERIES |
573 CSO_BIT_FRAGMENT_SHADER |
574 CSO_BIT_VERTEX_SHADER |
575 CSO_BIT_TESSCTRL_SHADER |
576 CSO_BIT_TESSEVAL_SHADER |
577 CSO_BIT_GEOMETRY_SHADER |
578 CSO_BIT_VERTEX_ELEMENTS |
579 CSO_BIT_AUX_VERTEX_BUFFER_SLOT));
580
581 /* set misc state we care about */
582 cso_set_blend(ctx->cso, &ctx->blend_write_color);
583 cso_set_depth_stencil_alpha(ctx->cso, &ctx->dsa_keep_depthstencil);
584 cso_set_sample_mask(ctx->cso, ~0);
585 cso_set_min_samples(ctx->cso, 1);
586 cso_set_rasterizer(ctx->cso, &ctx->rasterizer);
587 cso_set_vertex_elements(ctx->cso, &ctx->velem);
588 cso_set_stream_outputs(ctx->cso, 0, NULL, NULL);
589
590 /* sampler */
591 ctx->sampler.normalized_coords = normalized;
592 ctx->sampler.min_img_filter = filter;
593 ctx->sampler.mag_img_filter = filter;
594 {
595 const struct pipe_sampler_state *samplers[] = {&ctx->sampler};
596 cso_set_samplers(ctx->cso, PIPE_SHADER_FRAGMENT, 1, samplers);
597 }
598
599 /* viewport */
600 ctx->viewport.scale[0] = 0.5f * dst->width;
601 ctx->viewport.scale[1] = 0.5f * dst->height;
602 ctx->viewport.scale[2] = 0.5f;
603 ctx->viewport.translate[0] = 0.5f * dst->width;
604 ctx->viewport.translate[1] = 0.5f * dst->height;
605 ctx->viewport.translate[2] = 0.5f;
606 cso_set_viewport(ctx->cso, &ctx->viewport);
607
608 /* texture */
609 cso_set_sampler_views(ctx->cso, PIPE_SHADER_FRAGMENT, 1, &src_sampler_view);
610
611 /* shaders */
612 set_fragment_shader(ctx, src_sampler_view->format,
613 src_xrbias,
614 src_sampler_view->texture->target);
615 set_vertex_shader(ctx);
616 cso_set_tessctrl_shader_handle(ctx->cso, NULL);
617 cso_set_tesseval_shader_handle(ctx->cso, NULL);
618 cso_set_geometry_shader_handle(ctx->cso, NULL);
619
620 /* drawing dest */
621 memset(&fb, 0, sizeof(fb));
622 fb.width = dst->width;
623 fb.height = dst->height;
624 fb.nr_cbufs = 1;
625 fb.cbufs[0] = dst;
626 cso_set_framebuffer(ctx->cso, &fb);
627
628 /* draw quad */
629 offset = setup_vertex_data_tex(ctx,
630 src_sampler_view->texture->target,
631 src_face,
632 (float) dstX0 / dst->width * 2.0f - 1.0f,
633 (float) dstY0 / dst->height * 2.0f - 1.0f,
634 (float) dstX1 / dst->width * 2.0f - 1.0f,
635 (float) dstY1 / dst->height * 2.0f - 1.0f,
636 s0, t0, s1, t1,
637 z);
638
639 util_draw_vertex_buffer(ctx->pipe, ctx->cso, ctx->vbuf, 0,
640 offset,
641 PIPE_PRIM_TRIANGLE_FAN,
642 4, /* verts */
643 2); /* attribs/vert */
644
645 /* restore state we changed */
646 cso_restore_state(ctx->cso);
647 }