1 /**************************************************************************
3 * Copyright 2008 Dennis Smit
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 **************************************************************************/
29 * CPU feature detection.
32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
35 #include "pipe/p_config.h"
38 #include "u_cpu_detect.h"
40 #if defined(PIPE_ARCH_PPC)
41 #if defined(PIPE_OS_DARWIN)
42 #include <sys/sysctl.h>
49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
50 #include <sys/param.h>
51 #include <sys/sysctl.h>
52 #include <machine/cpu.h>
55 #if defined(PIPE_OS_FREEBSD)
56 #include <sys/types.h>
57 #include <sys/sysctl.h>
60 #if defined(PIPE_OS_LINUX)
68 #if defined(PIPE_OS_WINDOWS)
73 struct util_cpu_caps util_cpu_caps
;
75 static int has_cpuid(void);
76 static int cpuid(unsigned int ax
, unsigned int *p
);
78 #if defined(PIPE_ARCH_X86)
80 /* The sigill handlers */
81 #if defined(PIPE_OS_LINUX) //&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
83 sigill_handler_sse(int signal
, struct sigcontext sc
)
85 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
86 * instructions are 3 bytes long. We must increment the instruction
87 * pointer manually to avoid repeated execution of the offending
90 * If the SIGILL is caused by a divide-by-zero when unmasked
91 * exceptions aren't supported, the SIMD FPU status and control
92 * word will be restored at the end of the test, so we don't need
93 * to worry about doing it here. Besides, we may not be able to...
97 util_cpu_caps
.has_sse
=0;
101 sigfpe_handler_sse(int signal
, struct sigcontext sc
)
103 if (sc
.fpstate
->magic
!= 0xffff) {
104 /* Our signal context has the extended FPU state, so reset the
105 * divide-by-zero exception mask and clear the divide-by-zero
108 sc
.fpstate
->mxcsr
|= 0x00000200;
109 sc
.fpstate
->mxcsr
&= 0xfffffffb;
111 /* If we ever get here, we're completely hosed.
115 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
117 #if defined(PIPE_OS_WINDOWS)
119 win32_sig_handler_sse(EXCEPTION_POINTERS
* ep
)
121 if(ep
->ExceptionRecord
->ExceptionCode
==EXCEPTION_ILLEGAL_INSTRUCTION
){
122 ep
->ContextRecord
->Eip
+=3;
123 util_cpu_caps
.has_sse
=0;
124 return EXCEPTION_CONTINUE_EXECUTION
;
126 return EXCEPTION_CONTINUE_SEARCH
;
128 #endif /* PIPE_OS_WINDOWS */
130 #endif /* PIPE_ARCH_X86 */
133 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_DARWIN)
134 static sigjmp_buf __lv_powerpc_jmpbuf
;
135 static volatile sig_atomic_t __lv_powerpc_canjump
= 0;
138 sigill_handler(int sig
)
140 if (!__lv_powerpc_canjump
) {
141 signal (sig
, SIG_DFL
);
145 __lv_powerpc_canjump
= 0;
146 siglongjmp(__lv_powerpc_jmpbuf
, 1);
150 check_os_altivec_support(void)
152 #if defined(PIPE_OS_DARWIN)
153 int sels
[2] = {CTL_HW
, HW_VECTORUNIT
};
155 int len
= sizeof (has_vu
);
158 err
= sysctl(sels
, 2, &has_vu
, &len
, NULL
, 0);
162 util_cpu_caps
.has_altivec
= 1;
165 #else /* !PIPE_OS_DARWIN */
166 /* no Darwin, do it the brute-force way */
167 /* this is borrowed from the libmpeg2 library */
168 signal(SIGILL
, sigill_handler
);
169 if (sigsetjmp(__lv_powerpc_jmpbuf
, 1)) {
170 signal(SIGILL
, SIG_DFL
);
172 __lv_powerpc_canjump
= 1;
176 "vand %%v0, %%v0, %%v0"
180 signal(SIGILL
, SIG_DFL
);
181 util_cpu_caps
.has_altivec
= 1;
187 /* If we're running on a processor that can do SSE, let's see if we
188 * are allowed to or not. This will catch 2.4.0 or later kernels that
189 * haven't been configured for a Pentium III but are running on one,
190 * and RedHat patched 2.2 kernels that have broken exception handling
191 * support for user space apps that do SSE.
194 check_os_katmai_support(void)
196 #if defined(PIPE_ARCH_X86)
197 #if defined(PIPE_OS_FREEBSD)
199 int len
= sizeof (has_sse
);
201 ret
= sysctlbyname("hw.instruction_sse", &has_sse
, &len
, NULL
, 0);
203 util_cpu_caps
.has_sse
=0;
205 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
206 int has_sse
, has_sse2
, ret
, mib
[2];
209 mib
[0] = CTL_MACHDEP
;
211 varlen
= sizeof (has_sse
);
213 ret
= sysctl(mib
, 2, &has_sse
, &varlen
, NULL
, 0);
214 if (ret
< 0 || !has_sse
) {
215 util_cpu_caps
.has_sse
= 0;
217 util_cpu_caps
.has_sse
= 1;
221 varlen
= sizeof (has_sse2
);
222 ret
= sysctl(mib
, 2, &has_sse2
, &varlen
, NULL
, 0);
223 if (ret
< 0 || !has_sse2
) {
224 util_cpu_caps
.has_sse2
= 0;
226 util_cpu_caps
.has_sse2
= 1;
228 util_cpu_caps
.has_sse
= 0; /* FIXME ?!?!? */
230 #elif defined(PIPE_OS_WINDOWS)
231 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil
;
232 if (util_cpu_caps
.has_sse
) {
233 exc_fil
= SetUnhandledExceptionFilter(win32_sig_handler_sse
);
234 #if defined(PIPE_CC_GCC)
235 __asm
__volatile ("xorps %xmm0, %xmm0");
236 #elif defined(PIPE_CC_MSVC)
238 xorps xmm0
, xmm0
// executing SSE instruction
241 #error Unsupported compiler
243 SetUnhandledExceptionFilter(exc_fil
);
245 #elif defined(PIPE_OS_LINUX)
246 struct sigaction saved_sigill
;
247 struct sigaction saved_sigfpe
;
249 /* Save the original signal handlers.
251 sigaction(SIGILL
, NULL
, &saved_sigill
);
252 sigaction(SIGFPE
, NULL
, &saved_sigfpe
);
254 signal(SIGILL
, (void (*)(int))sigill_handler_sse
);
255 signal(SIGFPE
, (void (*)(int))sigfpe_handler_sse
);
257 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
258 * supports the extended FPU save and restore required for SSE. If
259 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
260 * doesn't support Streaming SIMD Exceptions, even if the processor
263 if (util_cpu_caps
.has_sse
) {
264 __asm
__volatile ("xorps %xmm1, %xmm0");
267 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
268 * it supports unmasked SIMD FPU exceptions. If we unmask the
269 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
270 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
271 * as expected, we're okay but we need to clean up after it.
273 * Are we being too stringent in our requirement that the OS support
274 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
275 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
276 * doesn't even support them. We at least know the user-space SSE
277 * support is good in kernels that do support unmasked exceptions,
278 * and therefore to be safe I'm going to leave this test in here.
280 if (util_cpu_caps
.has_sse
) {
281 // test_os_katmai_exception_support();
284 /* Restore the original signal handlers.
286 sigaction(SIGILL
, &saved_sigill
, NULL
);
287 sigaction(SIGFPE
, &saved_sigfpe
, NULL
);
290 /* We can't use POSIX signal handling to test the availability of
291 * SSE, so we disable it by default.
293 util_cpu_caps
.has_sse
= 0;
294 #endif /* __linux__ */
297 #if defined(PIPE_ARCH_X86_64)
298 util_cpu_caps
.has_sse
= 1;
303 static int has_cpuid(void)
305 #if defined(PIPE_ARCH_X86)
306 #if defined(PIPE_OS_GCC)
313 "xorl $0x200000, %0\n"
327 #elif defined(PIPE_ARCH_X86_64)
335 cpuid(unsigned int ax
, unsigned int *p
)
339 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
341 "movl %%ebx, %%esi\n\t"
351 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
353 "movq %%rbx, %%rsi\n\t"
363 #elif defined(PIPE_CC_MSVC)
373 util_cpu_detect(void)
375 static boolean util_cpu_detect_initialized
= FALSE
;
377 if(util_cpu_detect_initialized
)
380 memset(&util_cpu_caps
, 0, sizeof util_cpu_caps
);
382 /* Check for arch type */
383 #if defined(PIPE_ARCH_MIPS)
384 util_cpu_caps
.arch
= UTIL_CPU_ARCH_MIPS
;
385 #elif defined(PIPE_ARCH_ALPHA)
386 util_cpu_caps
.arch
= UTIL_CPU_ARCH_ALPHA
;
387 #elif defined(PIPE_ARCH_SPARC)
388 util_cpu_caps
.arch
= UTIL_CPU_ARCH_SPARC
;
389 #elif defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
390 util_cpu_caps
.arch
= UTIL_CPU_ARCH_X86
;
391 #elif defined(PIPE_ARCH_PPC)
392 util_cpu_caps
.arch
= UTIL_CPU_ARCH_POWERPC
;
394 util_cpu_caps
.arch
= UTIL_CPU_ARCH_UNKNOWN
;
397 /* Count the number of CPUs in system */
398 #if !defined(PIPE_OS_WINDOWS) && !defined(PIPE_OS_UNKNOWN) && defined(_SC_NPROCESSORS_ONLN)
399 util_cpu_caps
.nr_cpus
= sysconf(_SC_NPROCESSORS_ONLN
);
400 if (util_cpu_caps
.nr_cpus
== -1)
401 util_cpu_caps
.nr_cpus
= 1;
403 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_FREEBSD) || defined(PIPE_OS_OPENBSD)
412 sysctl(mib
, 2, &ncpu
, &len
, NULL
, 0);
413 util_cpu_caps
.nr_cpus
= ncpu
;
416 util_cpu_caps
.nr_cpus
= 1;
419 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
421 unsigned int regs
[4];
422 unsigned int regs2
[4];
424 util_cpu_caps
.cacheline
= 32;
426 /* Get max cpuid level */
427 cpuid(0x00000000, regs
);
429 if (regs
[0] >= 0x00000001) {
430 unsigned int cacheline
;
432 cpuid (0x00000001, regs2
);
434 util_cpu_caps
.x86_cpu_type
= (regs2
[0] >> 8) & 0xf;
435 if (util_cpu_caps
.x86_cpu_type
== 0xf)
436 util_cpu_caps
.x86_cpu_type
= 8 + ((regs2
[0] >> 20) & 255); /* use extended family (P4, IA64) */
438 /* general feature flags */
439 util_cpu_caps
.has_tsc
= (regs2
[3] & (1 << 8 )) >> 8; /* 0x0000010 */
440 util_cpu_caps
.has_mmx
= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
441 util_cpu_caps
.has_sse
= (regs2
[3] & (1 << 25 )) >> 25; /* 0x2000000 */
442 util_cpu_caps
.has_sse2
= (regs2
[3] & (1 << 26 )) >> 26; /* 0x4000000 */
443 util_cpu_caps
.has_sse3
= (regs2
[2] & (1)); /* 0x0000001 */
444 util_cpu_caps
.has_ssse3
= (regs2
[2] & (1 << 9 )) >> 9; /* 0x0000020 */
445 util_cpu_caps
.has_sse4_1
= (regs2
[2] & (1 << 19)) >> 19;
446 util_cpu_caps
.has_mmx2
= util_cpu_caps
.has_sse
; /* SSE cpus supports mmxext too */
448 cacheline
= ((regs2
[1] >> 8) & 0xFF) * 8;
450 util_cpu_caps
.cacheline
= cacheline
;
453 cpuid(0x80000000, regs
);
455 if (regs
[0] >= 0x80000001) {
457 cpuid(0x80000001, regs2
);
459 util_cpu_caps
.has_mmx
|= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
460 util_cpu_caps
.has_mmx2
|= (regs2
[3] & (1 << 22 )) >> 22; /* 0x400000 */
461 util_cpu_caps
.has_3dnow
= (regs2
[3] & (1 << 31 )) >> 31; /* 0x80000000 */
462 util_cpu_caps
.has_3dnow_ext
= (regs2
[3] & (1 << 30 )) >> 30;
465 if (regs
[0] >= 0x80000006) {
466 cpuid(0x80000006, regs2
);
467 util_cpu_caps
.cacheline
= regs2
[2] & 0xFF;
470 #if defined(PIPE_OS_LINUX) || defined(PIPE_OS_FREEBSD) || defined(PIPE_OS_NETBSD) || defined(PIPE_OS_CYGWIN) || defined(PIPE_OS_OPENBSD)
471 if (util_cpu_caps
.has_sse
)
472 check_os_katmai_support();
474 if (!util_cpu_caps
.has_sse
) {
475 util_cpu_caps
.has_sse2
= 0;
476 util_cpu_caps
.has_sse3
= 0;
477 util_cpu_caps
.has_ssse3
= 0;
480 util_cpu_caps
.has_sse
= 0;
481 util_cpu_caps
.has_sse2
= 0;
482 util_cpu_caps
.has_sse3
= 0;
483 util_cpu_caps
.has_ssse3
= 0;
486 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
488 #if defined(PIPE_ARCH_PPC)
489 check_os_altivec_support();
490 #endif /* PIPE_ARCH_PPC */
493 debug_printf("util_cpu_caps.arch = %i\n", util_cpu_caps
.arch
);
494 debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps
.nr_cpus
);
496 debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps
.x86_cpu_type
);
497 debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps
.cacheline
);
499 debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps
.has_tsc
);
500 debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps
.has_mmx
);
501 debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps
.has_mmx2
);
502 debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps
.has_sse
);
503 debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps
.has_sse2
);
504 debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps
.has_sse3
);
505 debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps
.has_ssse3
);
506 debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps
.has_sse4_1
);
507 debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps
.has_3dnow
);
508 debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps
.has_3dnow_ext
);
509 debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps
.has_altivec
);
512 util_cpu_detect_initialized
= TRUE
;