1 /**************************************************************************
3 * Copyright 2008 Dennis Smit
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 **************************************************************************/
29 * CPU feature detection.
32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
35 #include "pipe/p_config.h"
38 #include "u_cpu_detect.h"
40 #if defined(PIPE_ARCH_PPC)
41 #if defined(PIPE_OS_DARWIN)
42 #include <sys/sysctl.h>
49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
50 #include <sys/param.h>
51 #include <sys/sysctl.h>
52 #include <machine/cpu.h>
55 #if defined(PIPE_OS_FREEBSD)
56 #include <sys/types.h>
57 #include <sys/sysctl.h>
60 #if defined(PIPE_OS_LINUX)
68 #if defined(PIPE_OS_WINDOWS)
76 struct util_cpu_caps util_cpu_caps
;
78 static int has_cpuid(void);
79 static int cpuid(uint32_t ax
, uint32_t *p
);
81 #if defined(PIPE_ARCH_X86)
83 /* The sigill handlers */
84 #if defined(PIPE_OS_LINUX) //&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)
86 sigill_handler_sse(int signal
, struct sigcontext sc
)
88 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
89 * instructions are 3 bytes long. We must increment the instruction
90 * pointer manually to avoid repeated execution of the offending
93 * If the SIGILL is caused by a divide-by-zero when unmasked
94 * exceptions aren't supported, the SIMD FPU status and control
95 * word will be restored at the end of the test, so we don't need
96 * to worry about doing it here. Besides, we may not be able to...
100 util_cpu_caps
.has_sse
=0;
104 sigfpe_handler_sse(int signal
, struct sigcontext sc
)
106 if (sc
.fpstate
->magic
!= 0xffff) {
107 /* Our signal context has the extended FPU state, so reset the
108 * divide-by-zero exception mask and clear the divide-by-zero
111 sc
.fpstate
->mxcsr
|= 0x00000200;
112 sc
.fpstate
->mxcsr
&= 0xfffffffb;
114 /* If we ever get here, we're completely hosed.
118 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
120 #if defined(PIPE_OS_WINDOWS)
122 win32_sig_handler_sse(EXCEPTION_POINTERS
* ep
)
124 if(ep
->ExceptionRecord
->ExceptionCode
==EXCEPTION_ILLEGAL_INSTRUCTION
){
125 ep
->ContextRecord
->Eip
+=3;
126 util_cpu_caps
.has_sse
=0;
127 return EXCEPTION_CONTINUE_EXECUTION
;
129 return EXCEPTION_CONTINUE_SEARCH
;
131 #endif /* PIPE_OS_WINDOWS */
133 #endif /* PIPE_ARCH_X86 */
136 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_DARWIN)
137 static jmp_buf __lv_powerpc_jmpbuf
;
138 static volatile sig_atomic_t __lv_powerpc_canjump
= 0;
141 sigill_handler(int sig
)
143 if (!__lv_powerpc_canjump
) {
144 signal (sig
, SIG_DFL
);
148 __lv_powerpc_canjump
= 0;
149 longjmp(__lv_powerpc_jmpbuf
, 1);
153 #if defined(PIPE_ARCH_PPC)
155 check_os_altivec_support(void)
157 #if defined(PIPE_OS_DARWIN)
158 int sels
[2] = {CTL_HW
, HW_VECTORUNIT
};
160 int len
= sizeof (has_vu
);
163 err
= sysctl(sels
, 2, &has_vu
, &len
, NULL
, 0);
167 util_cpu_caps
.has_altivec
= 1;
170 #else /* !PIPE_OS_DARWIN */
171 /* no Darwin, do it the brute-force way */
172 /* this is borrowed from the libmpeg2 library */
173 signal(SIGILL
, sigill_handler
);
174 if (setjmp(__lv_powerpc_jmpbuf
)) {
175 signal(SIGILL
, SIG_DFL
);
177 __lv_powerpc_canjump
= 1;
181 "vand %%v0, %%v0, %%v0"
185 signal(SIGILL
, SIG_DFL
);
186 util_cpu_caps
.has_altivec
= 1;
188 #endif /* PIPE_OS_DARWIN */
190 #endif /* PIPE_ARCH_PPC */
192 /* If we're running on a processor that can do SSE, let's see if we
193 * are allowed to or not. This will catch 2.4.0 or later kernels that
194 * haven't been configured for a Pentium III but are running on one,
195 * and RedHat patched 2.2 kernels that have broken exception handling
196 * support for user space apps that do SSE.
198 #if defined(PIPE_ARCH_X86) || defined (PIPE_ARCH_X86_64)
200 check_os_katmai_support(void)
202 #if defined(PIPE_ARCH_X86)
203 #if defined(PIPE_OS_FREEBSD)
205 int len
= sizeof (has_sse
);
207 ret
= sysctlbyname("hw.instruction_sse", &has_sse
, &len
, NULL
, 0);
209 util_cpu_caps
.has_sse
=0;
211 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
212 int has_sse
, has_sse2
, ret
, mib
[2];
215 mib
[0] = CTL_MACHDEP
;
217 varlen
= sizeof (has_sse
);
219 ret
= sysctl(mib
, 2, &has_sse
, &varlen
, NULL
, 0);
220 if (ret
< 0 || !has_sse
) {
221 util_cpu_caps
.has_sse
= 0;
223 util_cpu_caps
.has_sse
= 1;
227 varlen
= sizeof (has_sse2
);
228 ret
= sysctl(mib
, 2, &has_sse2
, &varlen
, NULL
, 0);
229 if (ret
< 0 || !has_sse2
) {
230 util_cpu_caps
.has_sse2
= 0;
232 util_cpu_caps
.has_sse2
= 1;
234 util_cpu_caps
.has_sse
= 0; /* FIXME ?!?!? */
236 #elif defined(PIPE_OS_WINDOWS)
237 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil
;
238 if (util_cpu_caps
.has_sse
) {
239 exc_fil
= SetUnhandledExceptionFilter(win32_sig_handler_sse
);
240 #if defined(PIPE_CC_GCC)
241 __asm
__volatile ("xorps %xmm0, %xmm0");
242 #elif defined(PIPE_CC_MSVC)
244 xorps xmm0
, xmm0
// executing SSE instruction
247 #error Unsupported compiler
249 SetUnhandledExceptionFilter(exc_fil
);
251 #elif defined(PIPE_OS_LINUX)
252 struct sigaction saved_sigill
;
253 struct sigaction saved_sigfpe
;
255 /* Save the original signal handlers.
257 sigaction(SIGILL
, NULL
, &saved_sigill
);
258 sigaction(SIGFPE
, NULL
, &saved_sigfpe
);
260 signal(SIGILL
, (void (*)(int))sigill_handler_sse
);
261 signal(SIGFPE
, (void (*)(int))sigfpe_handler_sse
);
263 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
264 * supports the extended FPU save and restore required for SSE. If
265 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
266 * doesn't support Streaming SIMD Exceptions, even if the processor
269 if (util_cpu_caps
.has_sse
) {
270 __asm
__volatile ("xorps %xmm1, %xmm0");
273 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
274 * it supports unmasked SIMD FPU exceptions. If we unmask the
275 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
276 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
277 * as expected, we're okay but we need to clean up after it.
279 * Are we being too stringent in our requirement that the OS support
280 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
281 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
282 * doesn't even support them. We at least know the user-space SSE
283 * support is good in kernels that do support unmasked exceptions,
284 * and therefore to be safe I'm going to leave this test in here.
286 if (util_cpu_caps
.has_sse
) {
287 // test_os_katmai_exception_support();
290 /* Restore the original signal handlers.
292 sigaction(SIGILL
, &saved_sigill
, NULL
);
293 sigaction(SIGFPE
, &saved_sigfpe
, NULL
);
296 /* We can't use POSIX signal handling to test the availability of
297 * SSE, so we disable it by default.
299 util_cpu_caps
.has_sse
= 0;
300 #endif /* __linux__ */
303 #if defined(PIPE_ARCH_X86_64)
304 util_cpu_caps
.has_sse
= 1;
309 static int has_cpuid(void)
311 #if defined(PIPE_ARCH_X86)
312 #if defined(PIPE_OS_GCC)
319 "xorl $0x200000, %0\n"
333 #elif defined(PIPE_ARCH_X86_64)
342 * @sa cpuid.h included in gcc-4.3 onwards.
343 * @sa http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
346 cpuid(uint32_t ax
, uint32_t *p
)
350 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
352 "xchgl %%ebx, %1\n\t"
362 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
372 #elif defined(PIPE_CC_MSVC)
380 #endif /* X86 or X86_64 */
383 util_cpu_detect(void)
385 static boolean util_cpu_detect_initialized
= FALSE
;
387 if(util_cpu_detect_initialized
)
390 memset(&util_cpu_caps
, 0, sizeof util_cpu_caps
);
392 /* Check for arch type */
393 #if defined(PIPE_ARCH_MIPS)
394 util_cpu_caps
.arch
= UTIL_CPU_ARCH_MIPS
;
395 #elif defined(PIPE_ARCH_ALPHA)
396 util_cpu_caps
.arch
= UTIL_CPU_ARCH_ALPHA
;
397 #elif defined(PIPE_ARCH_SPARC)
398 util_cpu_caps
.arch
= UTIL_CPU_ARCH_SPARC
;
399 #elif defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
400 util_cpu_caps
.arch
= UTIL_CPU_ARCH_X86
;
401 util_cpu_caps
.little_endian
= 1;
402 #elif defined(PIPE_ARCH_PPC)
403 util_cpu_caps
.arch
= UTIL_CPU_ARCH_POWERPC
;
404 util_cpu_caps
.little_endian
= 0;
406 util_cpu_caps
.arch
= UTIL_CPU_ARCH_UNKNOWN
;
409 /* Count the number of CPUs in system */
410 #if defined(PIPE_OS_WINDOWS)
412 SYSTEM_INFO system_info
;
413 GetSystemInfo(&system_info
);
414 util_cpu_caps
.nr_cpus
= system_info
.dwNumberOfProcessors
;
416 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
417 util_cpu_caps
.nr_cpus
= sysconf(_SC_NPROCESSORS_ONLN
);
418 if (util_cpu_caps
.nr_cpus
== -1)
419 util_cpu_caps
.nr_cpus
= 1;
420 #elif defined(PIPE_OS_BSD)
429 sysctl(mib
, 2, &ncpu
, &len
, NULL
, 0);
430 util_cpu_caps
.nr_cpus
= ncpu
;
433 util_cpu_caps
.nr_cpus
= 1;
436 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
441 util_cpu_caps
.cacheline
= 32;
443 /* Get max cpuid level */
444 cpuid(0x00000000, regs
);
446 if (regs
[0] >= 0x00000001) {
447 unsigned int cacheline
;
449 cpuid (0x00000001, regs2
);
451 util_cpu_caps
.x86_cpu_type
= (regs2
[0] >> 8) & 0xf;
452 if (util_cpu_caps
.x86_cpu_type
== 0xf)
453 util_cpu_caps
.x86_cpu_type
= 8 + ((regs2
[0] >> 20) & 255); /* use extended family (P4, IA64) */
455 /* general feature flags */
456 util_cpu_caps
.has_tsc
= (regs2
[3] & (1 << 8 )) >> 8; /* 0x0000010 */
457 util_cpu_caps
.has_mmx
= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
458 util_cpu_caps
.has_sse
= (regs2
[3] & (1 << 25 )) >> 25; /* 0x2000000 */
459 util_cpu_caps
.has_sse2
= (regs2
[3] & (1 << 26 )) >> 26; /* 0x4000000 */
460 util_cpu_caps
.has_sse3
= (regs2
[2] & (1)); /* 0x0000001 */
461 util_cpu_caps
.has_ssse3
= (regs2
[2] & (1 << 9 )) >> 9; /* 0x0000020 */
462 util_cpu_caps
.has_sse4_1
= (regs2
[2] & (1 << 19)) >> 19;
463 util_cpu_caps
.has_mmx2
= util_cpu_caps
.has_sse
; /* SSE cpus supports mmxext too */
465 cacheline
= ((regs2
[1] >> 8) & 0xFF) * 8;
467 util_cpu_caps
.cacheline
= cacheline
;
470 cpuid(0x80000000, regs
);
472 if (regs
[0] >= 0x80000001) {
474 cpuid(0x80000001, regs2
);
476 util_cpu_caps
.has_mmx
|= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
477 util_cpu_caps
.has_mmx2
|= (regs2
[3] & (1 << 22 )) >> 22; /* 0x400000 */
478 util_cpu_caps
.has_3dnow
= (regs2
[3] & (1 << 31 )) >> 31; /* 0x80000000 */
479 util_cpu_caps
.has_3dnow_ext
= (regs2
[3] & (1 << 30 )) >> 30;
482 if (regs
[0] >= 0x80000006) {
483 cpuid(0x80000006, regs2
);
484 util_cpu_caps
.cacheline
= regs2
[2] & 0xFF;
487 if (util_cpu_caps
.has_sse
)
488 check_os_katmai_support();
490 if (!util_cpu_caps
.has_sse
) {
491 util_cpu_caps
.has_sse2
= 0;
492 util_cpu_caps
.has_sse3
= 0;
493 util_cpu_caps
.has_ssse3
= 0;
494 util_cpu_caps
.has_sse4_1
= 0;
497 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
499 #if defined(PIPE_ARCH_PPC)
500 check_os_altivec_support();
501 #endif /* PIPE_ARCH_PPC */
504 debug_printf("util_cpu_caps.arch = %i\n", util_cpu_caps
.arch
);
505 debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps
.nr_cpus
);
507 debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps
.x86_cpu_type
);
508 debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps
.cacheline
);
510 debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps
.has_tsc
);
511 debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps
.has_mmx
);
512 debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps
.has_mmx2
);
513 debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps
.has_sse
);
514 debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps
.has_sse2
);
515 debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps
.has_sse3
);
516 debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps
.has_ssse3
);
517 debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps
.has_sse4_1
);
518 debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps
.has_3dnow
);
519 debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps
.has_3dnow_ext
);
520 debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps
.has_altivec
);
523 util_cpu_detect_initialized
= TRUE
;