1 /**************************************************************************
3 * Copyright 2008 Dennis Smit
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 **************************************************************************/
29 * CPU feature detection.
32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
35 #include "pipe/p_config.h"
38 #include "u_cpu_detect.h"
40 #if defined(PIPE_ARCH_PPC)
41 #if defined(PIPE_OS_APPLE)
42 #include <sys/sysctl.h>
49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
50 #include <sys/param.h>
51 #include <sys/sysctl.h>
52 #include <machine/cpu.h>
55 #if defined(PIPE_OS_FREEBSD)
56 #include <sys/types.h>
57 #include <sys/sysctl.h>
60 #if defined(PIPE_OS_LINUX)
68 #if defined(PIPE_OS_WINDOWS)
76 DEBUG_GET_ONCE_BOOL_OPTION(dump_cpu
, "GALLIUM_DUMP_CPU", TRUE
)
79 struct util_cpu_caps util_cpu_caps
;
81 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
82 static int has_cpuid(void);
86 #if defined(PIPE_ARCH_X86)
88 /* The sigill handlers */
89 #if defined(PIPE_OS_LINUX) /*&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)*/
91 sigill_handler_sse(int signal
, struct sigcontext sc
)
93 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
94 * instructions are 3 bytes long. We must increment the instruction
95 * pointer manually to avoid repeated execution of the offending
98 * If the SIGILL is caused by a divide-by-zero when unmasked
99 * exceptions aren't supported, the SIMD FPU status and control
100 * word will be restored at the end of the test, so we don't need
101 * to worry about doing it here. Besides, we may not be able to...
105 util_cpu_caps
.has_sse
=0;
109 sigfpe_handler_sse(int signal
, struct sigcontext sc
)
111 if (sc
.fpstate
->magic
!= 0xffff) {
112 /* Our signal context has the extended FPU state, so reset the
113 * divide-by-zero exception mask and clear the divide-by-zero
116 sc
.fpstate
->mxcsr
|= 0x00000200;
117 sc
.fpstate
->mxcsr
&= 0xfffffffb;
119 /* If we ever get here, we're completely hosed.
123 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
125 #if defined(PIPE_OS_WINDOWS)
127 win32_sig_handler_sse(EXCEPTION_POINTERS
* ep
)
129 if(ep
->ExceptionRecord
->ExceptionCode
==EXCEPTION_ILLEGAL_INSTRUCTION
){
130 ep
->ContextRecord
->Eip
+=3;
131 util_cpu_caps
.has_sse
=0;
132 return EXCEPTION_CONTINUE_EXECUTION
;
134 return EXCEPTION_CONTINUE_SEARCH
;
136 #endif /* PIPE_OS_WINDOWS */
138 #endif /* PIPE_ARCH_X86 */
141 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_APPLE)
142 static jmp_buf __lv_powerpc_jmpbuf
;
143 static volatile sig_atomic_t __lv_powerpc_canjump
= 0;
146 sigill_handler(int sig
)
148 if (!__lv_powerpc_canjump
) {
149 signal (sig
, SIG_DFL
);
153 __lv_powerpc_canjump
= 0;
154 longjmp(__lv_powerpc_jmpbuf
, 1);
158 #if defined(PIPE_ARCH_PPC)
160 check_os_altivec_support(void)
162 #if defined(PIPE_OS_APPLE)
163 int sels
[2] = {CTL_HW
, HW_VECTORUNIT
};
165 int len
= sizeof (has_vu
);
168 err
= sysctl(sels
, 2, &has_vu
, &len
, NULL
, 0);
172 util_cpu_caps
.has_altivec
= 1;
175 #else /* !PIPE_OS_APPLE */
176 /* not on Apple/Darwin, do it the brute-force way */
177 /* this is borrowed from the libmpeg2 library */
178 signal(SIGILL
, sigill_handler
);
179 if (setjmp(__lv_powerpc_jmpbuf
)) {
180 signal(SIGILL
, SIG_DFL
);
182 __lv_powerpc_canjump
= 1;
186 "vand %%v0, %%v0, %%v0"
190 signal(SIGILL
, SIG_DFL
);
191 util_cpu_caps
.has_altivec
= 1;
193 #endif /* !PIPE_OS_APPLE */
195 #endif /* PIPE_ARCH_PPC */
197 /* If we're running on a processor that can do SSE, let's see if we
198 * are allowed to or not. This will catch 2.4.0 or later kernels that
199 * haven't been configured for a Pentium III but are running on one,
200 * and RedHat patched 2.2 kernels that have broken exception handling
201 * support for user space apps that do SSE.
203 #if defined(PIPE_ARCH_X86) || defined (PIPE_ARCH_X86_64)
205 check_os_katmai_support(void)
207 #if defined(PIPE_ARCH_X86)
208 #if defined(PIPE_OS_FREEBSD)
210 int len
= sizeof (has_sse
);
212 ret
= sysctlbyname("hw.instruction_sse", &has_sse
, &len
, NULL
, 0);
214 util_cpu_caps
.has_sse
=0;
216 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
217 int has_sse
, has_sse2
, ret
, mib
[2];
220 mib
[0] = CTL_MACHDEP
;
222 varlen
= sizeof (has_sse
);
224 ret
= sysctl(mib
, 2, &has_sse
, &varlen
, NULL
, 0);
225 if (ret
< 0 || !has_sse
) {
226 util_cpu_caps
.has_sse
= 0;
228 util_cpu_caps
.has_sse
= 1;
232 varlen
= sizeof (has_sse2
);
233 ret
= sysctl(mib
, 2, &has_sse2
, &varlen
, NULL
, 0);
234 if (ret
< 0 || !has_sse2
) {
235 util_cpu_caps
.has_sse2
= 0;
237 util_cpu_caps
.has_sse2
= 1;
239 util_cpu_caps
.has_sse
= 0; /* FIXME ?!?!? */
241 #elif defined(PIPE_OS_WINDOWS)
242 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil
;
243 if (util_cpu_caps
.has_sse
) {
244 exc_fil
= SetUnhandledExceptionFilter(win32_sig_handler_sse
);
245 #if defined(PIPE_CC_GCC)
246 __asm
__volatile ("xorps %xmm0, %xmm0");
247 #elif defined(PIPE_CC_MSVC)
249 xorps xmm0
, xmm0
/* executing SSE instruction */
252 #error Unsupported compiler
254 SetUnhandledExceptionFilter(exc_fil
);
256 #elif defined(PIPE_OS_LINUX)
257 struct sigaction saved_sigill
;
258 struct sigaction saved_sigfpe
;
260 /* Save the original signal handlers.
262 sigaction(SIGILL
, NULL
, &saved_sigill
);
263 sigaction(SIGFPE
, NULL
, &saved_sigfpe
);
265 signal(SIGILL
, (void (*)(int))sigill_handler_sse
);
266 signal(SIGFPE
, (void (*)(int))sigfpe_handler_sse
);
268 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
269 * supports the extended FPU save and restore required for SSE. If
270 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
271 * doesn't support Streaming SIMD Exceptions, even if the processor
274 if (util_cpu_caps
.has_sse
) {
275 __asm
__volatile ("xorps %xmm1, %xmm0");
278 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
279 * it supports unmasked SIMD FPU exceptions. If we unmask the
280 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
281 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
282 * as expected, we're okay but we need to clean up after it.
284 * Are we being too stringent in our requirement that the OS support
285 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
286 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
287 * doesn't even support them. We at least know the user-space SSE
288 * support is good in kernels that do support unmasked exceptions,
289 * and therefore to be safe I'm going to leave this test in here.
291 if (util_cpu_caps
.has_sse
) {
292 /* test_os_katmai_exception_support(); */
295 /* Restore the original signal handlers.
297 sigaction(SIGILL
, &saved_sigill
, NULL
);
298 sigaction(SIGFPE
, &saved_sigfpe
, NULL
);
301 /* We can't use POSIX signal handling to test the availability of
302 * SSE, so we disable it by default.
304 util_cpu_caps
.has_sse
= 0;
305 #endif /* __linux__ */
308 #if defined(PIPE_ARCH_X86_64)
309 util_cpu_caps
.has_sse
= 1;
314 static int has_cpuid(void)
316 #if defined(PIPE_ARCH_X86)
317 #if defined(PIPE_OS_GCC)
324 "xorl $0x200000, %0\n"
338 #elif defined(PIPE_ARCH_X86_64)
347 * @sa cpuid.h included in gcc-4.3 onwards.
348 * @sa http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
351 cpuid(uint32_t ax
, uint32_t *p
)
353 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
355 "xchgl %%ebx, %1\n\t"
364 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
373 #elif defined(PIPE_CC_MSVC)
382 #endif /* X86 or X86_64 */
385 util_cpu_detect(void)
387 static boolean util_cpu_detect_initialized
= FALSE
;
389 if(util_cpu_detect_initialized
)
392 memset(&util_cpu_caps
, 0, sizeof util_cpu_caps
);
394 /* Check for arch type */
395 #if defined(PIPE_ARCH_MIPS)
396 util_cpu_caps
.arch
= UTIL_CPU_ARCH_MIPS
;
397 #elif defined(PIPE_ARCH_ALPHA)
398 util_cpu_caps
.arch
= UTIL_CPU_ARCH_ALPHA
;
399 #elif defined(PIPE_ARCH_SPARC)
400 util_cpu_caps
.arch
= UTIL_CPU_ARCH_SPARC
;
401 #elif defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
402 util_cpu_caps
.arch
= UTIL_CPU_ARCH_X86
;
403 util_cpu_caps
.little_endian
= 1;
404 #elif defined(PIPE_ARCH_PPC)
405 util_cpu_caps
.arch
= UTIL_CPU_ARCH_POWERPC
;
406 util_cpu_caps
.little_endian
= 0;
408 util_cpu_caps
.arch
= UTIL_CPU_ARCH_UNKNOWN
;
411 /* Count the number of CPUs in system */
412 #if defined(PIPE_OS_WINDOWS)
414 SYSTEM_INFO system_info
;
415 GetSystemInfo(&system_info
);
416 util_cpu_caps
.nr_cpus
= system_info
.dwNumberOfProcessors
;
418 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
419 util_cpu_caps
.nr_cpus
= sysconf(_SC_NPROCESSORS_ONLN
);
420 if (util_cpu_caps
.nr_cpus
== -1)
421 util_cpu_caps
.nr_cpus
= 1;
422 #elif defined(PIPE_OS_BSD)
431 sysctl(mib
, 2, &ncpu
, &len
, NULL
, 0);
432 util_cpu_caps
.nr_cpus
= ncpu
;
435 util_cpu_caps
.nr_cpus
= 1;
438 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
443 util_cpu_caps
.cacheline
= 32;
445 /* Get max cpuid level */
446 cpuid(0x00000000, regs
);
448 if (regs
[0] >= 0x00000001) {
449 unsigned int cacheline
;
451 cpuid (0x00000001, regs2
);
453 util_cpu_caps
.x86_cpu_type
= (regs2
[0] >> 8) & 0xf;
454 if (util_cpu_caps
.x86_cpu_type
== 0xf)
455 util_cpu_caps
.x86_cpu_type
= 8 + ((regs2
[0] >> 20) & 255); /* use extended family (P4, IA64) */
457 /* general feature flags */
458 util_cpu_caps
.has_tsc
= (regs2
[3] & (1 << 8 )) >> 8; /* 0x0000010 */
459 util_cpu_caps
.has_mmx
= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
460 util_cpu_caps
.has_sse
= (regs2
[3] & (1 << 25 )) >> 25; /* 0x2000000 */
461 util_cpu_caps
.has_sse2
= (regs2
[3] & (1 << 26 )) >> 26; /* 0x4000000 */
462 util_cpu_caps
.has_sse3
= (regs2
[2] & (1)); /* 0x0000001 */
463 util_cpu_caps
.has_ssse3
= (regs2
[2] & (1 << 9 )) >> 9; /* 0x0000020 */
464 util_cpu_caps
.has_sse4_1
= (regs2
[2] & (1 << 19)) >> 19;
465 util_cpu_caps
.has_mmx2
= util_cpu_caps
.has_sse
; /* SSE cpus supports mmxext too */
467 cacheline
= ((regs2
[1] >> 8) & 0xFF) * 8;
469 util_cpu_caps
.cacheline
= cacheline
;
472 cpuid(0x80000000, regs
);
474 if (regs
[0] >= 0x80000001) {
476 cpuid(0x80000001, regs2
);
478 util_cpu_caps
.has_mmx
|= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
479 util_cpu_caps
.has_mmx2
|= (regs2
[3] & (1 << 22 )) >> 22; /* 0x400000 */
480 util_cpu_caps
.has_3dnow
= (regs2
[3] & (1 << 31 )) >> 31; /* 0x80000000 */
481 util_cpu_caps
.has_3dnow_ext
= (regs2
[3] & (1 << 30 )) >> 30;
484 if (regs
[0] >= 0x80000006) {
485 cpuid(0x80000006, regs2
);
486 util_cpu_caps
.cacheline
= regs2
[2] & 0xFF;
489 if (util_cpu_caps
.has_sse
)
490 check_os_katmai_support();
492 if (!util_cpu_caps
.has_sse
) {
493 util_cpu_caps
.has_sse2
= 0;
494 util_cpu_caps
.has_sse3
= 0;
495 util_cpu_caps
.has_ssse3
= 0;
496 util_cpu_caps
.has_sse4_1
= 0;
499 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
501 #if defined(PIPE_ARCH_PPC)
502 check_os_altivec_support();
503 #endif /* PIPE_ARCH_PPC */
506 if (debug_get_option_dump_cpu()) {
507 debug_printf("util_cpu_caps.arch = %i\n", util_cpu_caps
.arch
);
508 debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps
.nr_cpus
);
510 debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps
.x86_cpu_type
);
511 debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps
.cacheline
);
513 debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps
.has_tsc
);
514 debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps
.has_mmx
);
515 debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps
.has_mmx2
);
516 debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps
.has_sse
);
517 debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps
.has_sse2
);
518 debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps
.has_sse3
);
519 debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps
.has_ssse3
);
520 debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps
.has_sse4_1
);
521 debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps
.has_3dnow
);
522 debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps
.has_3dnow_ext
);
523 debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps
.has_altivec
);
527 util_cpu_detect_initialized
= TRUE
;