1 /**************************************************************************
3 * Copyright 2008 Dennis Smit
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * on the rights to use, copy, modify, merge, publish, distribute, sub
10 * license, and/or sell copies of the Software, and to permit persons to whom
11 * the Software is furnished to do so, subject to the following conditions:
13 * The above copyright notice and this permission notice (including the next
14 * paragraph) shall be included in all copies or substantial portions of the
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
20 * AUTHORS, COPYRIGHT HOLDERS, AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
21 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
22 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
23 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 **************************************************************************/
29 * CPU feature detection.
32 * @author Based on the work of Eric Anholt <anholt@FreeBSD.org>
35 #include "pipe/p_config.h"
38 #include "u_cpu_detect.h"
40 #if defined(PIPE_ARCH_PPC)
41 #if defined(PIPE_OS_APPLE)
42 #include <sys/sysctl.h>
49 #if defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
50 #include <sys/param.h>
51 #include <sys/sysctl.h>
52 #include <machine/cpu.h>
55 #if defined(PIPE_OS_FREEBSD)
56 #include <sys/types.h>
57 #include <sys/sysctl.h>
60 #if defined(PIPE_OS_LINUX)
68 #if defined(PIPE_OS_WINDOWS)
76 struct util_cpu_caps util_cpu_caps
;
78 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
79 static int has_cpuid(void);
83 #if defined(PIPE_ARCH_X86)
85 /* The sigill handlers */
86 #if defined(PIPE_OS_LINUX) /*&& defined(_POSIX_SOURCE) && defined(X86_FXSR_MAGIC)*/
88 sigill_handler_sse(int signal
, struct sigcontext sc
)
90 /* Both the "xorps %%xmm0,%%xmm0" and "divps %xmm0,%%xmm1"
91 * instructions are 3 bytes long. We must increment the instruction
92 * pointer manually to avoid repeated execution of the offending
95 * If the SIGILL is caused by a divide-by-zero when unmasked
96 * exceptions aren't supported, the SIMD FPU status and control
97 * word will be restored at the end of the test, so we don't need
98 * to worry about doing it here. Besides, we may not be able to...
102 util_cpu_caps
.has_sse
=0;
106 sigfpe_handler_sse(int signal
, struct sigcontext sc
)
108 if (sc
.fpstate
->magic
!= 0xffff) {
109 /* Our signal context has the extended FPU state, so reset the
110 * divide-by-zero exception mask and clear the divide-by-zero
113 sc
.fpstate
->mxcsr
|= 0x00000200;
114 sc
.fpstate
->mxcsr
&= 0xfffffffb;
116 /* If we ever get here, we're completely hosed.
120 #endif /* PIPE_OS_LINUX && _POSIX_SOURCE && X86_FXSR_MAGIC */
122 #if defined(PIPE_OS_WINDOWS)
124 win32_sig_handler_sse(EXCEPTION_POINTERS
* ep
)
126 if(ep
->ExceptionRecord
->ExceptionCode
==EXCEPTION_ILLEGAL_INSTRUCTION
){
127 ep
->ContextRecord
->Eip
+=3;
128 util_cpu_caps
.has_sse
=0;
129 return EXCEPTION_CONTINUE_EXECUTION
;
131 return EXCEPTION_CONTINUE_SEARCH
;
133 #endif /* PIPE_OS_WINDOWS */
135 #endif /* PIPE_ARCH_X86 */
138 #if defined(PIPE_ARCH_PPC) && !defined(PIPE_OS_APPLE)
139 static jmp_buf __lv_powerpc_jmpbuf
;
140 static volatile sig_atomic_t __lv_powerpc_canjump
= 0;
143 sigill_handler(int sig
)
145 if (!__lv_powerpc_canjump
) {
146 signal (sig
, SIG_DFL
);
150 __lv_powerpc_canjump
= 0;
151 longjmp(__lv_powerpc_jmpbuf
, 1);
155 #if defined(PIPE_ARCH_PPC)
157 check_os_altivec_support(void)
159 #if defined(PIPE_OS_APPLE)
160 int sels
[2] = {CTL_HW
, HW_VECTORUNIT
};
162 int len
= sizeof (has_vu
);
165 err
= sysctl(sels
, 2, &has_vu
, &len
, NULL
, 0);
169 util_cpu_caps
.has_altivec
= 1;
172 #else /* !PIPE_OS_APPLE */
173 /* not on Apple/Darwin, do it the brute-force way */
174 /* this is borrowed from the libmpeg2 library */
175 signal(SIGILL
, sigill_handler
);
176 if (setjmp(__lv_powerpc_jmpbuf
)) {
177 signal(SIGILL
, SIG_DFL
);
179 __lv_powerpc_canjump
= 1;
183 "vand %%v0, %%v0, %%v0"
187 signal(SIGILL
, SIG_DFL
);
188 util_cpu_caps
.has_altivec
= 1;
190 #endif /* !PIPE_OS_APPLE */
192 #endif /* PIPE_ARCH_PPC */
194 /* If we're running on a processor that can do SSE, let's see if we
195 * are allowed to or not. This will catch 2.4.0 or later kernels that
196 * haven't been configured for a Pentium III but are running on one,
197 * and RedHat patched 2.2 kernels that have broken exception handling
198 * support for user space apps that do SSE.
200 #if defined(PIPE_ARCH_X86) || defined (PIPE_ARCH_X86_64)
202 check_os_katmai_support(void)
204 #if defined(PIPE_ARCH_X86)
205 #if defined(PIPE_OS_FREEBSD)
207 int len
= sizeof (has_sse
);
209 ret
= sysctlbyname("hw.instruction_sse", &has_sse
, &len
, NULL
, 0);
211 util_cpu_caps
.has_sse
=0;
213 #elif defined(PIPE_OS_NETBSD) || defined(PIPE_OS_OPENBSD)
214 int has_sse
, has_sse2
, ret
, mib
[2];
217 mib
[0] = CTL_MACHDEP
;
219 varlen
= sizeof (has_sse
);
221 ret
= sysctl(mib
, 2, &has_sse
, &varlen
, NULL
, 0);
222 if (ret
< 0 || !has_sse
) {
223 util_cpu_caps
.has_sse
= 0;
225 util_cpu_caps
.has_sse
= 1;
229 varlen
= sizeof (has_sse2
);
230 ret
= sysctl(mib
, 2, &has_sse2
, &varlen
, NULL
, 0);
231 if (ret
< 0 || !has_sse2
) {
232 util_cpu_caps
.has_sse2
= 0;
234 util_cpu_caps
.has_sse2
= 1;
236 util_cpu_caps
.has_sse
= 0; /* FIXME ?!?!? */
238 #elif defined(PIPE_OS_WINDOWS)
239 LPTOP_LEVEL_EXCEPTION_FILTER exc_fil
;
240 if (util_cpu_caps
.has_sse
) {
241 exc_fil
= SetUnhandledExceptionFilter(win32_sig_handler_sse
);
242 #if defined(PIPE_CC_GCC)
243 __asm
__volatile ("xorps %xmm0, %xmm0");
244 #elif defined(PIPE_CC_MSVC)
246 xorps xmm0
, xmm0
/* executing SSE instruction */
249 #error Unsupported compiler
251 SetUnhandledExceptionFilter(exc_fil
);
253 #elif defined(PIPE_OS_LINUX)
254 struct sigaction saved_sigill
;
255 struct sigaction saved_sigfpe
;
257 /* Save the original signal handlers.
259 sigaction(SIGILL
, NULL
, &saved_sigill
);
260 sigaction(SIGFPE
, NULL
, &saved_sigfpe
);
262 signal(SIGILL
, (void (*)(int))sigill_handler_sse
);
263 signal(SIGFPE
, (void (*)(int))sigfpe_handler_sse
);
265 /* Emulate test for OSFXSR in CR4. The OS will set this bit if it
266 * supports the extended FPU save and restore required for SSE. If
267 * we execute an SSE instruction on a PIII and get a SIGILL, the OS
268 * doesn't support Streaming SIMD Exceptions, even if the processor
271 if (util_cpu_caps
.has_sse
) {
272 __asm
__volatile ("xorps %xmm1, %xmm0");
275 /* Emulate test for OSXMMEXCPT in CR4. The OS will set this bit if
276 * it supports unmasked SIMD FPU exceptions. If we unmask the
277 * exceptions, do a SIMD divide-by-zero and get a SIGILL, the OS
278 * doesn't support unmasked SIMD FPU exceptions. If we get a SIGFPE
279 * as expected, we're okay but we need to clean up after it.
281 * Are we being too stringent in our requirement that the OS support
282 * unmasked exceptions? Certain RedHat 2.2 kernels enable SSE by
283 * setting CR4.OSFXSR but don't support unmasked exceptions. Win98
284 * doesn't even support them. We at least know the user-space SSE
285 * support is good in kernels that do support unmasked exceptions,
286 * and therefore to be safe I'm going to leave this test in here.
288 if (util_cpu_caps
.has_sse
) {
289 /* test_os_katmai_exception_support(); */
292 /* Restore the original signal handlers.
294 sigaction(SIGILL
, &saved_sigill
, NULL
);
295 sigaction(SIGFPE
, &saved_sigfpe
, NULL
);
298 /* We can't use POSIX signal handling to test the availability of
299 * SSE, so we disable it by default.
301 util_cpu_caps
.has_sse
= 0;
302 #endif /* __linux__ */
305 #if defined(PIPE_ARCH_X86_64)
306 util_cpu_caps
.has_sse
= 1;
311 static int has_cpuid(void)
313 #if defined(PIPE_ARCH_X86)
314 #if defined(PIPE_OS_GCC)
321 "xorl $0x200000, %0\n"
335 #elif defined(PIPE_ARCH_X86_64)
344 * @sa cpuid.h included in gcc-4.3 onwards.
345 * @sa http://msdn.microsoft.com/en-us/library/hskdteyh.aspx
348 cpuid(uint32_t ax
, uint32_t *p
)
350 #if defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86)
352 "xchgl %%ebx, %1\n\t"
361 #elif defined(PIPE_CC_GCC) && defined(PIPE_ARCH_X86_64)
370 #elif defined(PIPE_CC_MSVC)
379 #endif /* X86 or X86_64 */
382 util_cpu_detect(void)
384 static boolean util_cpu_detect_initialized
= FALSE
;
386 if(util_cpu_detect_initialized
)
389 memset(&util_cpu_caps
, 0, sizeof util_cpu_caps
);
391 /* Check for arch type */
392 #if defined(PIPE_ARCH_MIPS)
393 util_cpu_caps
.arch
= UTIL_CPU_ARCH_MIPS
;
394 #elif defined(PIPE_ARCH_ALPHA)
395 util_cpu_caps
.arch
= UTIL_CPU_ARCH_ALPHA
;
396 #elif defined(PIPE_ARCH_SPARC)
397 util_cpu_caps
.arch
= UTIL_CPU_ARCH_SPARC
;
398 #elif defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
399 util_cpu_caps
.arch
= UTIL_CPU_ARCH_X86
;
400 util_cpu_caps
.little_endian
= 1;
401 #elif defined(PIPE_ARCH_PPC)
402 util_cpu_caps
.arch
= UTIL_CPU_ARCH_POWERPC
;
403 util_cpu_caps
.little_endian
= 0;
405 util_cpu_caps
.arch
= UTIL_CPU_ARCH_UNKNOWN
;
408 /* Count the number of CPUs in system */
409 #if defined(PIPE_OS_WINDOWS)
411 SYSTEM_INFO system_info
;
412 GetSystemInfo(&system_info
);
413 util_cpu_caps
.nr_cpus
= system_info
.dwNumberOfProcessors
;
415 #elif defined(PIPE_OS_UNIX) && defined(_SC_NPROCESSORS_ONLN)
416 util_cpu_caps
.nr_cpus
= sysconf(_SC_NPROCESSORS_ONLN
);
417 if (util_cpu_caps
.nr_cpus
== -1)
418 util_cpu_caps
.nr_cpus
= 1;
419 #elif defined(PIPE_OS_BSD)
428 sysctl(mib
, 2, &ncpu
, &len
, NULL
, 0);
429 util_cpu_caps
.nr_cpus
= ncpu
;
432 util_cpu_caps
.nr_cpus
= 1;
435 #if defined(PIPE_ARCH_X86) || defined(PIPE_ARCH_X86_64)
440 util_cpu_caps
.cacheline
= 32;
442 /* Get max cpuid level */
443 cpuid(0x00000000, regs
);
445 if (regs
[0] >= 0x00000001) {
446 unsigned int cacheline
;
448 cpuid (0x00000001, regs2
);
450 util_cpu_caps
.x86_cpu_type
= (regs2
[0] >> 8) & 0xf;
451 if (util_cpu_caps
.x86_cpu_type
== 0xf)
452 util_cpu_caps
.x86_cpu_type
= 8 + ((regs2
[0] >> 20) & 255); /* use extended family (P4, IA64) */
454 /* general feature flags */
455 util_cpu_caps
.has_tsc
= (regs2
[3] & (1 << 8 )) >> 8; /* 0x0000010 */
456 util_cpu_caps
.has_mmx
= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
457 util_cpu_caps
.has_sse
= (regs2
[3] & (1 << 25 )) >> 25; /* 0x2000000 */
458 util_cpu_caps
.has_sse2
= (regs2
[3] & (1 << 26 )) >> 26; /* 0x4000000 */
459 util_cpu_caps
.has_sse3
= (regs2
[2] & (1)); /* 0x0000001 */
460 util_cpu_caps
.has_ssse3
= (regs2
[2] & (1 << 9 )) >> 9; /* 0x0000020 */
461 util_cpu_caps
.has_sse4_1
= (regs2
[2] & (1 << 19)) >> 19;
462 util_cpu_caps
.has_mmx2
= util_cpu_caps
.has_sse
; /* SSE cpus supports mmxext too */
464 cacheline
= ((regs2
[1] >> 8) & 0xFF) * 8;
466 util_cpu_caps
.cacheline
= cacheline
;
469 cpuid(0x80000000, regs
);
471 if (regs
[0] >= 0x80000001) {
473 cpuid(0x80000001, regs2
);
475 util_cpu_caps
.has_mmx
|= (regs2
[3] & (1 << 23 )) >> 23; /* 0x0800000 */
476 util_cpu_caps
.has_mmx2
|= (regs2
[3] & (1 << 22 )) >> 22; /* 0x400000 */
477 util_cpu_caps
.has_3dnow
= (regs2
[3] & (1 << 31 )) >> 31; /* 0x80000000 */
478 util_cpu_caps
.has_3dnow_ext
= (regs2
[3] & (1 << 30 )) >> 30;
481 if (regs
[0] >= 0x80000006) {
482 cpuid(0x80000006, regs2
);
483 util_cpu_caps
.cacheline
= regs2
[2] & 0xFF;
486 if (util_cpu_caps
.has_sse
)
487 check_os_katmai_support();
489 if (!util_cpu_caps
.has_sse
) {
490 util_cpu_caps
.has_sse2
= 0;
491 util_cpu_caps
.has_sse3
= 0;
492 util_cpu_caps
.has_ssse3
= 0;
493 util_cpu_caps
.has_sse4_1
= 0;
496 #endif /* PIPE_ARCH_X86 || PIPE_ARCH_X86_64 */
498 #if defined(PIPE_ARCH_PPC)
499 check_os_altivec_support();
500 #endif /* PIPE_ARCH_PPC */
503 debug_printf("util_cpu_caps.arch = %i\n", util_cpu_caps
.arch
);
504 debug_printf("util_cpu_caps.nr_cpus = %u\n", util_cpu_caps
.nr_cpus
);
506 debug_printf("util_cpu_caps.x86_cpu_type = %u\n", util_cpu_caps
.x86_cpu_type
);
507 debug_printf("util_cpu_caps.cacheline = %u\n", util_cpu_caps
.cacheline
);
509 debug_printf("util_cpu_caps.has_tsc = %u\n", util_cpu_caps
.has_tsc
);
510 debug_printf("util_cpu_caps.has_mmx = %u\n", util_cpu_caps
.has_mmx
);
511 debug_printf("util_cpu_caps.has_mmx2 = %u\n", util_cpu_caps
.has_mmx2
);
512 debug_printf("util_cpu_caps.has_sse = %u\n", util_cpu_caps
.has_sse
);
513 debug_printf("util_cpu_caps.has_sse2 = %u\n", util_cpu_caps
.has_sse2
);
514 debug_printf("util_cpu_caps.has_sse3 = %u\n", util_cpu_caps
.has_sse3
);
515 debug_printf("util_cpu_caps.has_ssse3 = %u\n", util_cpu_caps
.has_ssse3
);
516 debug_printf("util_cpu_caps.has_sse4_1 = %u\n", util_cpu_caps
.has_sse4_1
);
517 debug_printf("util_cpu_caps.has_3dnow = %u\n", util_cpu_caps
.has_3dnow
);
518 debug_printf("util_cpu_caps.has_3dnow_ext = %u\n", util_cpu_caps
.has_3dnow_ext
);
519 debug_printf("util_cpu_caps.has_altivec = %u\n", util_cpu_caps
.has_altivec
);
522 util_cpu_detect_initialized
= TRUE
;