03a37f0bd29fee79f763fb0d16510366fb31276c
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_TWO_SIDED_STENCIL``: Whether the stencil test can also affect back-facing
28 polygons.
29 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
30 :ref:`Blend` for more information.
31 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
32 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
33 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
34 bound.
35 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
36 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
37 * ``PIPE_CAP_TEXTURE_SHADOW_MAP``: indicates whether the fragment shader hardware
38 can do the depth texture / Z comparison operation in TEX instructions
39 for shadow testing.
40 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
41 supported.
42 * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
43 for a 2D texture.
44 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
45 for a 3D texture.
46 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
47 for a cubemap.
48 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates with clamp
49 are supported.
50 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
51 from color blend equations, in :ref:`Blend` state.
52 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
53 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
54 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
55 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
56 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
57 masks are supported. If 0, then the first rendertarget's blend mask is
58 replicated across all MRTs.
59 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
60 available. If 0, then the first rendertarget's blend functions affect all
61 MRTs.
62 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
63 layers supported. If 0, the array textures are not supported at all and
64 the ARRAY texture targets are invalid.
65 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
66 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
67 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
68 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
69 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
70 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
71 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
72 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
73 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
74 depth clipping (through pipe_rasterizer_state)
75 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
76 written from a fragment shader.
77 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
78 in the vertex shader.
79 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
80 per-instance vertex attribs.
81 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
82 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
83 flag supported by the driver? If not, the state tracker will insert
84 clamping code into the fragment shaders when needed.
85
86 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
87 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
88 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
89 outputting unclamped vertex colors from a vertex shader. If unsupported,
90 the vertex colors are always clamped. This is the default for DX9 hardware.
91 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
92 clamping vertex colors when they come out of a vertex shader, as specified
93 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
94 the vertex colors are never clamped. This is the default for DX10 hardware.
95 If both clamped and unclamped CAPs are supported, the clamping can be
96 controlled through pipe_rasterizer_state. If the driver cannot do vertex
97 color clamping, the state tracker may insert clamping code into the vertex
98 shader.
99 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
100 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
101 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
102 the flatshade_first setting in ``pipe_rasterizer_state``.
103 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
104 buffers. If not, the state tracker must upload all data which is not in hw
105 resources. If user-space buffers are supported, the driver must also still
106 accept HW resource buffers.
107 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
108 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
109 to 4. If false, there are no restrictions on the offset.
110 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
111 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
112 If false, there are no restrictions on the stride.
113 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
114 a hw limitation. If true, pipe_vertex_element::src_offset must always be
115 aligned to 4. If false, there are no restrictions on src_offset.
116 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
117 compute entry points defined in pipe_context and pipe_screen.
118 * ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user-space constant buffers
119 are supported. If not, the state tracker must put constants into HW
120 resources/buffers. If user-space constant buffers are supported, the
121 driver must still accept HW constant buffers also.
122 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
123 alignment of pipe_constant_buffer::buffer_offset.
124 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
125 pipe_draw_info::start_instance.
126 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
127 the pipe_screen::get_timestamp hook are implemented.
128 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
129 for rendering are also supported for texturing.
130 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
131 expected for a pointer returned by transfer_map if the resource is
132 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
133 always aligned to this value.
134 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
135 alignment for pipe_sampler_view::u.buf.offset, in bytes.
136 If a driver does not support offset/size, it should return 0.
137 * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only
138 supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views.
139 When this is the case it should be assumed that the swizzle parameters
140 in the sampler view have no effect.
141 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
142 If true, the hardware cannot replace arbitrary shader inputs with sprite
143 coordinates and hence the inputs that are desired to be replaceable must
144 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
145 The rasterizer's sprite_coord_enable state therefore also applies to the
146 TEXCOORD semantic.
147 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
148 input that will always be replaced with sprite coordinates.
149 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
150 to use a blit to implement a texture transfer which needs format conversions
151 and swizzling in state trackers. Generally, all hardware drivers with
152 dedicated memory should return 1 and all software rasterizers should return 0.
153 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
154 is supported.
155 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
156 considerations have to be given to the interaction between the border color
157 in the sampler object and the sampler view used with it.
158 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
159 may be affected in undefined ways for any kind of permutational swizzle
160 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
161 in the sampler view.
162 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
163 state should be swizzled manually according to the swizzle in the sampler
164 view it is intended to be used with, or herein undefined results may occur
165 for permutational swizzles.
166 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
167 a buffer sampler view, in texels.
168 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
169 since they are linked) a driver can support. Returning 0 is equivalent
170 to returning 1 because every driver has to support at least a single
171 viewport/scissor combination.
172 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
173 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
174 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
175 different sizes for fb color/zs attachments. This controls whether
176 ARB_framebuffer_object is provided.
177 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
178 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
179 outputs. Note that the viewport will only be used if multiple viewports are
180 exposed.
181 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
182 output by a single invocation of a geometry shader.
183 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
184 vertex components output by a single invocation of a geometry shader.
185 This is the product of the number of attribute components per vertex and
186 the number of output vertices.
187 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
188 in format that texture gather can operate on. 1 == RED, ALPHA etc,
189 4 == All formats.
190 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
191 hardware implements the SM5 features, component selection,
192 shadow comparison, and run-time offsets.
193 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
194 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
195 for buffers.
196 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
197 supported.
198 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
199 in conjunction with a texture gather opcode.
200 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
201 in conjunction with a texture gather opcode.
202 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
203 shading. The context->set_min_samples function will be expected to be
204 implemented.
205 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
206 accept 4 offsets.
207 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
208 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
209 and viewport transformation.
210 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
211 supported by the geometry shader. If stream-out is supported, this should be
212 at least 1. If stream-out is not supported, this should be 0.
213 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
214 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
215 See pipe_draw_info.
216 * ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports
217 pipe_draw_info::indirect_stride and ::indirect_count
218 * ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports
219 taking the number of indirect draws from a separate parameter
220 buffer, see pipe_draw_indirect_info::indirect_draw_count.
221 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
222 the FINE versions of DDX/DDY.
223 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
224 not available one should return 0xFFFFFFFF.
225 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
226 0xFFFFFFFF if not available.
227 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
228 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
229 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
230 memory and GART.
231 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
232 condition for conditional rendering.
233 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
234 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
235 different than the underlying resource's, as permitted by
236 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
237 cube (array) texture and vice-versa.
238 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
239 pipe_rasterizer_state::clip_halfz being set to true. This is required
240 for enabling ARB_clip_control.
241 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
242 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
243 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
244 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
245 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
246 semantics. Only relevant if geometry shaders are supported.
247 (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``).
248 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
249 for ``pipe_rasterizer_state::offset_clamp``.
250 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
251 a multisampled depth buffer into a single-sampled texture (or depth buffer).
252 Only the first sampled should be copied.
253 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
254 a pipe_resource where an already-existing piece of (malloc'd) user memory
255 is used as its backing storage. In other words, whether the driver can map
256 existing user memory into the device address space for direct device access.
257 The create function is pipe_screen::resource_from_user_memory. The address
258 and size must be page-aligned.
259 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
260 Whether pipe_context::get_device_reset_status is implemented.
261 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
262 How many per-patch outputs and inputs are supported between tessellation
263 control and tessellation evaluation shaders, not counting in TESSINNER and
264 TESSOUTER. The minimum allowed value for OpenGL is 30.
265 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
266 magnification filters are supported with single-precision floating-point
267 textures.
268 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
269 magnification filters are supported with half-precision floating-point
270 textures.
271 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
272 bounds_max states of pipe_depth_stencil_alpha_state behave according
273 to the GL_EXT_depth_bounds_test specification.
274 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
275 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
276 interpolation for all fragment shader inputs if
277 pipe_rasterizer_state::force_persample_interp is set. This is only used
278 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
279 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
280 GL4 hardware will likely need to emulate it with a shader variant, or by
281 selecting the interpolation weights with a conditional assignment
282 in the shader.
283 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
284 pipe_context.
285 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
286 Whether copying between compressed and plain formats is supported where
287 a compressed block is copied to/from a plain pixel of the same size.
288 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
289 available in contexts.
290 * ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``,
291 ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are
292 supported in vertex shaders.
293 * ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H``
294 TGSI opcodes are supported.
295 * ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use
296 a system value for the POSITION fragment shader input.
297 * ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use
298 a system value for the FACE fragment shader input.
299 Also, the FACE system value is integer, not float.
300 * ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required
301 alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum
302 value allowed is 256 (for GL conformance). 0 is only allowed if
303 shader buffers are not supported.
304 * ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource``
305 for buffers is supported.
306 * ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap
307 is supported.
308 * ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported.
309 * ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether
310 pipe_context::create_surface supports reinterpreting a texture as a surface
311 of a format with different block width/height (but same block size in bits).
312 For example, a compressed texture image can be interpreted as a
313 non-compressed surface whose texels are the same number of bits as the
314 compressed blocks, and vice versa. The width and height of the surface is
315 adjusted appropriately.
316 * ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports
317 context::get_query_result_resource callback.
318 * ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number.
319 * ``PIPE_CAP_PCI_BUS``: Return the PCI bus number.
320 * ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number.
321 * ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number.
322 * ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``:
323 If non-zero, rendering to framebuffers with no surface attachments
324 is supported. The context->is_format_supported function will be expected
325 to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware
326 supports. N.B., The maximum number of layers supported for rasterizing a
327 primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``
328 even though it can be larger than the number of layers supported by either
329 rendering or textures.
330 * ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds
331 checking on resource accesses by shader if the context is created with
332 PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior
333 extension for information on the required behavior for out of bounds accesses
334 and accesses to unbound resources.
335 * ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance
336 extension and thus implements proper support for culling planes.
337 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
338 supported for patch primitives.
339 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
340 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
341 supported in ``set_window_rectangles``.
342 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support
343 for ``pipe_rasterizer_state::offset_units_unscaled``.
344 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
345 floating point viewport bounds.
346 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
347 support for color/depth format combinations that use a different
348 number of bits. For the purpose of this cap, Z24 is treated as
349 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
350 combination will require a driver fallback, and should not be
351 advertised in the GLX/EGL config list.
352 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
353 UsageMask of input and output declarations and allows declaring arrays
354 in overlapping ranges. The components must be a contiguous range, e.g. a
355 UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with
356 overlapping locations must have matching semantic names and indices, and
357 equal interpolation qualifiers.
358 Components may overlap, notably when the gaps in an array of dvec3 are
359 filled in.
360 * ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream
361 output mode is able to interleave across buffers. This is required for
362 ARB_transform_feedback3.
363 * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read
364 from the output file.
365 * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
366 the minimum amount of optimizations just to be able to do all the linking
367 and lowering.
368 * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
369 opcode to retrieve the current value in the framebuffer.
370 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
371 ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
372 * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
373 are supported.
374 * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
375 * ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo
376 operations are supported.
377 * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are
378 supported.
379 * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported.
380 * ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the
381 PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for
382 ``pipe_rasterizer_state::fill_front`` and
383 ``pipe_rasterizer_state::fill_back``.
384 * ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in
385 bytes, or 0 if sparse buffers are not supported. The page size must be at
386 most 64KB.
387 * ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as
388 the SUBGROUP_* semantics are supported.
389 * ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
390 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation
391 shader outputs.
392
393
394 .. _pipe_capf:
395
396 PIPE_CAPF_*
397 ^^^^^^^^^^^^^^^^
398
399 The floating-point capabilities are:
400
401 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
402 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
403 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
404 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
405 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
406 applied to anisotropically filtered textures.
407 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
408 to filtered textures.
409 * ``PIPE_CAPF_GUARD_BAND_LEFT``,
410 ``PIPE_CAPF_GUARD_BAND_TOP``,
411 ``PIPE_CAPF_GUARD_BAND_RIGHT``,
412 ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
413
414
415 .. _pipe_shader_cap:
416
417 PIPE_SHADER_CAP_*
418 ^^^^^^^^^^^^^^^^^
419
420 These are per-shader-stage capabitity queries. Different shader stages may
421 support different features.
422
423 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
424 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
425 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
426 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
427 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
428 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
429 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
430 This is valid for all shaders except the fragment shader.
431 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
432 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
433 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
434 only permit binding one constant buffer per shader, and the shaders will
435 not permit two-dimensional access to constants.
436
437 If a value greater than 0 is returned, the driver can have multiple
438 constant buffers bound to shader stages. The CONST register file can
439 be accessed with two-dimensional indices, like in the example below.
440
441 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
442 DCL CONST[3][0] # declare first vector of constbuf 3
443 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
444
445 For backwards compatibility, one-dimensional access to CONST register
446 file is still supported. In that case, the constbuf index is assumed
447 to be 0.
448
449 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
450 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
451 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
452 of the input file is supported.
453 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
454 of the output file is supported.
455 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
456 of the temporary file is supported.
457 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
458 of the constant file is supported.
459 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
460 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
461 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
462 If unsupported, only float opcodes are supported.
463 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
464 samplers.
465 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
466 program. It should be one of the ``pipe_shader_ir`` enum values.
467 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
468 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
469 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
470 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
471 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
472 DLDEXP are supported.
473 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
474 are supported.
475 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
476 ignore tgsi_declaration_range::Last for shader inputs and outputs.
477 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
478 of iterations that loops are allowed to have to be unrolled. It is only
479 a hint to state trackers. Whether any loops will be unrolled is not
480 guaranteed.
481 * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers
482 (also used to implement atomic counters). Having this be non-0 also
483 implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI
484 opcodes.
485 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
486 program. It should be a mask of ``pipe_shader_ir`` bits.
487 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
488 * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
489 cost than this value should be lowered by the state tracker for better
490 performance. This is a tunable for the GLSL compiler and the behavior is
491 specific to the compiler.
492 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
493 TGSI pass is skipped. This might reduce code size and register pressure if
494 the underlying driver has a real backend compiler.
495
496
497 .. _pipe_compute_cap:
498
499 PIPE_COMPUTE_CAP_*
500 ^^^^^^^^^^^^^^^^^^
501
502 Compute-specific capabilities. They can be queried using
503 pipe_screen::get_compute_param.
504
505 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
506 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
507 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM
508 or PIPE_SHADER_IR_NATIVE for their preferred IR.
509 Value type: null-terminated string. Shader IR type dependent.
510 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
511 for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
512 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
513 units. Value type: ``uint64_t []``. Shader IR type dependent.
514 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
515 units. Value type: ``uint64_t []``. Shader IR type dependent.
516 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
517 a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
518 This may be less than the product of the components of MAX_BLOCK_SIZE and is
519 usually limited by the number of threads that can be resident simultaneously
520 on a compute unit.
521 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
522 resource. Value type: ``uint64_t``. Shader IR type dependent.
523 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
524 resource. Value type: ``uint64_t``. Shader IR type dependent.
525 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
526 resource. Value type: ``uint64_t``. Shader IR type dependent.
527 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
528 resource. Value type: ``uint64_t``. Shader IR type dependent.
529 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
530 allocation in bytes. Value type: ``uint64_t``.
531 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
532 clock in MHz. Value type: ``uint32_t``
533 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
534 Value type: ``uint32_t``
535 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
536 non-zero means yes, zero means no. Value type: ``uint32_t``
537 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
538 threads. Also known as wavefront size, warp size or SIMD width.
539 * ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space
540 size specified as an unsigned integer value in bits.
541 * ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number
542 of threads that a single block can contain. This is similar to
543 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not
544 known a compile-time but at dispatch-time.
545
546 .. _pipe_bind:
547
548 PIPE_BIND_*
549 ^^^^^^^^^^^
550
551 These flags indicate how a resource will be used and are specified at resource
552 creation time. Resources may be used in different roles
553 during their lifecycle. Bind flags are cumulative and may be combined to create
554 a resource which can be used for multiple things.
555 Depending on the pipe driver's memory management and these bind flags,
556 resources might be created and handled quite differently.
557
558 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
559 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
560 must have this flag set.
561 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
562 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
563 have this flag set.
564 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
565 query whether a device supports blending for a given format.
566 If this flag is set, surface creation may fail if blending is not supported
567 for the specified format. If it is not set, a driver may choose to ignore
568 blending on surfaces with formats that would require emulation.
569 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
570 pipe_screen::flush_front_buffer must have this flag set.
571 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
572 or vertex shader.
573 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
574 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
575 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
576 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
577 * ``PIPE_BIND_CUSTOM``:
578 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
579 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
580 process.
581 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
582 address space of a compute program.
583 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
584 to a shader and can be used with load, store, and atomic instructions.
585 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
586 bound to a shader and can be used with load, store, and atomic instructions.
587 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
588 bound to the compute program as a shader resource.
589 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
590 GPU command processor. It can contain, for example, the arguments to
591 indirect draw calls.
592
593 .. _pipe_usage:
594
595 PIPE_USAGE_*
596 ^^^^^^^^^^^^
597
598 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
599 Note that drivers must always support read and write CPU access at any time
600 no matter which hint they got.
601
602 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
603 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
604 not expected to be mapped or changed (even by the GPU) after the first upload.
605 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
606 uploaded is expected to be used at least several times by the GPU.
607 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
608 uploaded is expected to be used only once by the GPU.
609 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
610
611
612 Methods
613 -------
614
615 XXX to-do
616
617 get_name
618 ^^^^^^^^
619
620 Returns an identifying name for the screen.
621
622 get_vendor
623 ^^^^^^^^^^
624
625 Returns the screen vendor.
626
627 get_device_vendor
628 ^^^^^^^^^^^^^^^^^
629
630 Returns the actual vendor of the device driving the screen
631 (as opposed to the driver vendor).
632
633 .. _get_param:
634
635 get_param
636 ^^^^^^^^^
637
638 Get an integer/boolean screen parameter.
639
640 **param** is one of the :ref:`PIPE_CAP` names.
641
642 .. _get_paramf:
643
644 get_paramf
645 ^^^^^^^^^^
646
647 Get a floating-point screen parameter.
648
649 **param** is one of the :ref:`PIPE_CAP` names.
650
651 context_create
652 ^^^^^^^^^^^^^^
653
654 Create a pipe_context.
655
656 **priv** is private data of the caller, which may be put to various
657 unspecified uses, typically to do with implementing swapbuffers
658 and/or front-buffer rendering.
659
660 is_format_supported
661 ^^^^^^^^^^^^^^^^^^^
662
663 Determine if a resource in the given format can be used in a specific manner.
664
665 **format** the resource format
666
667 **target** one of the PIPE_TEXTURE_x flags
668
669 **sample_count** the number of samples. 0 and 1 mean no multisampling,
670 the maximum allowed legal value is 32.
671
672 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
673
674 Returns TRUE if all usages can be satisfied.
675
676
677 can_create_resource
678 ^^^^^^^^^^^^^^^^^^^
679
680 Check if a resource can actually be created (but don't actually allocate any
681 memory). This is used to implement OpenGL's proxy textures. Typically, a
682 driver will simply check if the total size of the given resource is less than
683 some limit.
684
685 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
686
687
688 .. _resource_create:
689
690 resource_create
691 ^^^^^^^^^^^^^^^
692
693 Create a new resource from a template.
694 The following fields of the pipe_resource must be specified in the template:
695
696 **target** one of the pipe_texture_target enums.
697 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
698 Modern APIs allow using buffers as shader resources.
699
700 **format** one of the pipe_format enums.
701
702 **width0** the width of the base mip level of the texture or size of the buffer.
703
704 **height0** the height of the base mip level of the texture
705 (1 for 1D or 1D array textures).
706
707 **depth0** the depth of the base mip level of the texture
708 (1 for everything else).
709
710 **array_size** the array size for 1D and 2D array textures.
711 For cube maps this must be 6, for other textures 1.
712
713 **last_level** the last mip map level present.
714
715 **nr_samples** the nr of msaa samples. 0 (or 1) specifies a resource
716 which isn't multisampled.
717
718 **usage** one of the PIPE_USAGE flags.
719
720 **bind** bitmask of the PIPE_BIND flags.
721
722 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
723
724
725
726 resource_changed
727 ^^^^^^^^^^^^^^^^
728
729 Mark a resource as changed so derived internal resources will be recreated
730 on next use.
731
732 When importing external images that can't be directly used as texture sampler
733 source, internal copies may have to be created that the hardware can sample
734 from. When those resources are reimported, the image data may have changed, and
735 the previously derived internal resources must be invalidated to avoid sampling
736 from old copies.
737
738
739
740 resource_destroy
741 ^^^^^^^^^^^^^^^^
742
743 Destroy a resource. A resource is destroyed if it has no more references.
744
745
746
747 get_timestamp
748 ^^^^^^^^^^^^^
749
750 Query a timestamp in nanoseconds. The returned value should match
751 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
752 wait for rendering to complete (which cannot be achieved with queries).
753
754
755
756 get_driver_query_info
757 ^^^^^^^^^^^^^^^^^^^^^
758
759 Return a driver-specific query. If the **info** parameter is NULL,
760 the number of available queries is returned. Otherwise, the driver
761 query at the specified **index** is returned in **info**.
762 The function returns non-zero on success.
763 The driver-specific query is described with the pipe_driver_query_info
764 structure.
765
766 get_driver_query_group_info
767 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
768
769 Return a driver-specific query group. If the **info** parameter is NULL,
770 the number of available groups is returned. Otherwise, the driver
771 query group at the specified **index** is returned in **info**.
772 The function returns non-zero on success.
773 The driver-specific query group is described with the
774 pipe_driver_query_group_info structure.
775
776
777
778 get_disk_shader_cache
779 ^^^^^^^^^^^^^^^^^^^^^
780
781 Returns a pointer to a driver-specific on-disk shader cache. If the driver
782 failed to create the cache or does not support an on-disk shader cache NULL is
783 returned. The callback itself may also be NULL if the driver doesn't support
784 an on-disk shader cache.
785
786
787 Thread safety
788 -------------
789
790 Screen methods are required to be thread safe. While gallium rendering
791 contexts are not required to be thread safe, it is required to be safe to use
792 different contexts created with the same screen in different threads without
793 locks. It is also required to be safe using screen methods in a thread, while
794 using one of its contexts in another (without locks).