gallium: add cap for driver specified max combined shader resources.
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_TWO_SIDED_STENCIL``: Whether the stencil test can also affect back-facing
28 polygons.
29 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
30 :ref:`Blend` for more information.
31 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
32 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
33 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
34 bound.
35 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
36 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
37 * ``PIPE_CAP_TEXTURE_SHADOW_MAP``: indicates whether the fragment shader hardware
38 can do the depth texture / Z comparison operation in TEX instructions
39 for shadow testing.
40 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
41 supported.
42 * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
43 for a 2D texture.
44 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
45 for a 3D texture.
46 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
47 for a cubemap.
48 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates with clamp
49 are supported.
50 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
51 from color blend equations, in :ref:`Blend` state.
52 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
53 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
54 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
55 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
56 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
57 masks are supported. If 0, then the first rendertarget's blend mask is
58 replicated across all MRTs.
59 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
60 available. If 0, then the first rendertarget's blend functions affect all
61 MRTs.
62 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
63 layers supported. If 0, the array textures are not supported at all and
64 the ARRAY texture targets are invalid.
65 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
66 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
67 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
68 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
69 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
70 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
71 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
72 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
73 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
74 depth clipping (through pipe_rasterizer_state)
75 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
76 written from a fragment shader.
77 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
78 in the vertex shader.
79 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
80 per-instance vertex attribs.
81 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
82 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
83 flag supported by the driver? If not, the state tracker will insert
84 clamping code into the fragment shaders when needed.
85
86 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
87 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
88 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
89 outputting unclamped vertex colors from a vertex shader. If unsupported,
90 the vertex colors are always clamped. This is the default for DX9 hardware.
91 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
92 clamping vertex colors when they come out of a vertex shader, as specified
93 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
94 the vertex colors are never clamped. This is the default for DX10 hardware.
95 If both clamped and unclamped CAPs are supported, the clamping can be
96 controlled through pipe_rasterizer_state. If the driver cannot do vertex
97 color clamping, the state tracker may insert clamping code into the vertex
98 shader.
99 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
100 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
101 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
102 the flatshade_first setting in ``pipe_rasterizer_state``.
103 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
104 buffers. If not, the state tracker must upload all data which is not in hw
105 resources. If user-space buffers are supported, the driver must also still
106 accept HW resource buffers.
107 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
108 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
109 to 4. If false, there are no restrictions on the offset.
110 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
111 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
112 If false, there are no restrictions on the stride.
113 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
114 a hw limitation. If true, pipe_vertex_element::src_offset must always be
115 aligned to 4. If false, there are no restrictions on src_offset.
116 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
117 compute entry points defined in pipe_context and pipe_screen.
118 * ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user-space constant buffers
119 are supported. If not, the state tracker must put constants into HW
120 resources/buffers. If user-space constant buffers are supported, the
121 driver must still accept HW constant buffers also.
122 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
123 alignment of pipe_constant_buffer::buffer_offset.
124 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
125 pipe_draw_info::start_instance.
126 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
127 the pipe_screen::get_timestamp hook are implemented.
128 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
129 for rendering are also supported for texturing.
130 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
131 expected for a pointer returned by transfer_map if the resource is
132 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
133 always aligned to this value.
134 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
135 alignment for pipe_sampler_view::u.buf.offset, in bytes.
136 If a driver does not support offset/size, it should return 0.
137 * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only
138 supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views.
139 When this is the case it should be assumed that the swizzle parameters
140 in the sampler view have no effect.
141 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
142 If true, the hardware cannot replace arbitrary shader inputs with sprite
143 coordinates and hence the inputs that are desired to be replaceable must
144 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
145 The rasterizer's sprite_coord_enable state therefore also applies to the
146 TEXCOORD semantic.
147 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
148 input that will always be replaced with sprite coordinates.
149 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
150 to use a blit to implement a texture transfer which needs format conversions
151 and swizzling in state trackers. Generally, all hardware drivers with
152 dedicated memory should return 1 and all software rasterizers should return 0.
153 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
154 is supported.
155 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
156 considerations have to be given to the interaction between the border color
157 in the sampler object and the sampler view used with it.
158 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
159 may be affected in undefined ways for any kind of permutational swizzle
160 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
161 in the sampler view.
162 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
163 state should be swizzled manually according to the swizzle in the sampler
164 view it is intended to be used with, or herein undefined results may occur
165 for permutational swizzles.
166 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
167 a buffer sampler view, in texels.
168 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
169 since they are linked) a driver can support. Returning 0 is equivalent
170 to returning 1 because every driver has to support at least a single
171 viewport/scissor combination.
172 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
173 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
174 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
175 different sizes for fb color/zs attachments. This controls whether
176 ARB_framebuffer_object is provided.
177 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
178 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
179 outputs. Note that the viewport will only be used if multiple viewports are
180 exposed.
181 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
182 output by a single invocation of a geometry shader.
183 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
184 vertex components output by a single invocation of a geometry shader.
185 This is the product of the number of attribute components per vertex and
186 the number of output vertices.
187 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
188 in format that texture gather can operate on. 1 == RED, ALPHA etc,
189 4 == All formats.
190 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
191 hardware implements the SM5 features, component selection,
192 shadow comparison, and run-time offsets.
193 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
194 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
195 for buffers.
196 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
197 supported.
198 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
199 in conjunction with a texture gather opcode.
200 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
201 in conjunction with a texture gather opcode.
202 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
203 shading. The context->set_min_samples function will be expected to be
204 implemented.
205 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
206 accept 4 offsets.
207 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
208 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
209 and viewport transformation.
210 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
211 supported by the geometry shader. If stream-out is supported, this should be
212 at least 1. If stream-out is not supported, this should be 0.
213 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
214 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
215 See pipe_draw_info.
216 * ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports
217 pipe_draw_info::indirect_stride and ::indirect_count
218 * ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports
219 taking the number of indirect draws from a separate parameter
220 buffer, see pipe_draw_indirect_info::indirect_draw_count.
221 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
222 the FINE versions of DDX/DDY.
223 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
224 not available one should return 0xFFFFFFFF.
225 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
226 0xFFFFFFFF if not available.
227 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
228 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
229 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
230 memory and GART.
231 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
232 condition for conditional rendering.
233 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
234 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
235 different than the underlying resource's, as permitted by
236 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
237 cube (array) texture and vice-versa.
238 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
239 pipe_rasterizer_state::clip_halfz being set to true. This is required
240 for enabling ARB_clip_control.
241 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
242 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
243 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
244 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
245 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
246 semantics. Only relevant if geometry shaders are supported.
247 (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``).
248 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
249 for ``pipe_rasterizer_state::offset_clamp``.
250 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
251 a multisampled depth buffer into a single-sampled texture (or depth buffer).
252 Only the first sampled should be copied.
253 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
254 a pipe_resource where an already-existing piece of (malloc'd) user memory
255 is used as its backing storage. In other words, whether the driver can map
256 existing user memory into the device address space for direct device access.
257 The create function is pipe_screen::resource_from_user_memory. The address
258 and size must be page-aligned.
259 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
260 Whether pipe_context::get_device_reset_status is implemented.
261 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
262 How many per-patch outputs and inputs are supported between tessellation
263 control and tessellation evaluation shaders, not counting in TESSINNER and
264 TESSOUTER. The minimum allowed value for OpenGL is 30.
265 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
266 magnification filters are supported with single-precision floating-point
267 textures.
268 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
269 magnification filters are supported with half-precision floating-point
270 textures.
271 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
272 bounds_max states of pipe_depth_stencil_alpha_state behave according
273 to the GL_EXT_depth_bounds_test specification.
274 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
275 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
276 interpolation for all fragment shader inputs if
277 pipe_rasterizer_state::force_persample_interp is set. This is only used
278 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
279 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
280 GL4 hardware will likely need to emulate it with a shader variant, or by
281 selecting the interpolation weights with a conditional assignment
282 in the shader.
283 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
284 pipe_context.
285 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
286 Whether copying between compressed and plain formats is supported where
287 a compressed block is copied to/from a plain pixel of the same size.
288 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
289 available in contexts.
290 * ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``,
291 ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are
292 supported in vertex shaders.
293 * ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H``
294 TGSI opcodes are supported.
295 * ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use
296 a system value for the POSITION fragment shader input.
297 * ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use
298 a system value for the FACE fragment shader input.
299 Also, the FACE system value is integer, not float.
300 * ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required
301 alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum
302 value allowed is 256 (for GL conformance). 0 is only allowed if
303 shader buffers are not supported.
304 * ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource``
305 for buffers is supported.
306 * ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap
307 is supported.
308 * ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported.
309 * ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether
310 pipe_context::create_surface supports reinterpreting a texture as a surface
311 of a format with different block width/height (but same block size in bits).
312 For example, a compressed texture image can be interpreted as a
313 non-compressed surface whose texels are the same number of bits as the
314 compressed blocks, and vice versa. The width and height of the surface is
315 adjusted appropriately.
316 * ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports
317 context::get_query_result_resource callback.
318 * ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number.
319 * ``PIPE_CAP_PCI_BUS``: Return the PCI bus number.
320 * ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number.
321 * ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number.
322 * ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``:
323 If non-zero, rendering to framebuffers with no surface attachments
324 is supported. The context->is_format_supported function will be expected
325 to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware
326 supports. N.B., The maximum number of layers supported for rasterizing a
327 primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``
328 even though it can be larger than the number of layers supported by either
329 rendering or textures.
330 * ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds
331 checking on resource accesses by shader if the context is created with
332 PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior
333 extension for information on the required behavior for out of bounds accesses
334 and accesses to unbound resources.
335 * ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance
336 extension and thus implements proper support for culling planes.
337 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
338 supported for patch primitives.
339 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
340 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
341 supported in ``set_window_rectangles``.
342 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support
343 for ``pipe_rasterizer_state::offset_units_unscaled``.
344 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
345 floating point viewport bounds.
346 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
347 support for color/depth format combinations that use a different
348 number of bits. For the purpose of this cap, Z24 is treated as
349 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
350 combination will require a driver fallback, and should not be
351 advertised in the GLX/EGL config list.
352 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
353 UsageMask of input and output declarations and allows declaring arrays
354 in overlapping ranges. The components must be a contiguous range, e.g. a
355 UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with
356 overlapping locations must have matching semantic names and indices, and
357 equal interpolation qualifiers.
358 Components may overlap, notably when the gaps in an array of dvec3 are
359 filled in.
360 * ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream
361 output mode is able to interleave across buffers. This is required for
362 ARB_transform_feedback3.
363 * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read
364 from the output file.
365 * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
366 the minimum amount of optimizations just to be able to do all the linking
367 and lowering.
368 * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
369 opcode to retrieve the current value in the framebuffer.
370 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
371 ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
372 * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
373 are supported.
374 * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
375 * ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo
376 operations are supported.
377 * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are
378 supported.
379 * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported.
380 * ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the
381 PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for
382 ``pipe_rasterizer_state::fill_front`` and
383 ``pipe_rasterizer_state::fill_back``.
384 * ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in
385 bytes, or 0 if sparse buffers are not supported. The page size must be at
386 most 64KB.
387 * ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as
388 the SUBGROUP_* semantics are supported.
389 * ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
390 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation
391 shader outputs.
392 * ``PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX``: Whether a buffer with just
393 PIPE_BIND_CONSTANT_BUFFER can be legally passed to set_vertex_buffers.
394 * ``PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION``: As the name says.
395 * ``PIPE_CAP_POST_DEPTH_COVERAGE``: whether
396 ``TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE`` is supported.
397 * ``PIPE_CAP_BINDLESS_TEXTURE``: Whether bindless texture operations are
398 supported.
399 * ``PIPE_CAP_NIR_SAMPLERS_AS_DEREF``: Whether NIR tex instructions should
400 reference texture and sampler as NIR derefs instead of by indices.
401 * ``PIPE_CAP_QUERY_SO_OVERFLOW``: Whether the
402 ``PIPE_QUERY_SO_OVERFLOW_PREDICATE`` and
403 ``PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE`` query types are supported. Note that
404 for a driver that does not support multiple output streams (i.e.,
405 ``PIPE_CAP_MAX_VERTEX_STREAMS`` is 1), both query types are identical.
406 * ``PIPE_CAP_MEMOBJ``: Whether operations on memory objects are supported.
407 * ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports TGSI_OPCODE_LOAD use
408 with constant buffers.
409 * ``PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS``: Any TGSI register can be used as
410 an address for indirect register indexing.
411 * ``PIPE_CAP_TILE_RASTER_ORDER``: Whether the driver supports
412 GL_MESA_tile_raster_order, using the tile_raster_order_* fields in
413 pipe_rasterizer_state.
414 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
415 output resources (images + buffers + fragment outputs). If 0 the state
416 tracker works it out.
417
418 .. _pipe_capf:
419
420 PIPE_CAPF_*
421 ^^^^^^^^^^^^^^^^
422
423 The floating-point capabilities are:
424
425 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
426 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
427 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
428 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
429 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
430 applied to anisotropically filtered textures.
431 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
432 to filtered textures.
433 * ``PIPE_CAPF_GUARD_BAND_LEFT``,
434 ``PIPE_CAPF_GUARD_BAND_TOP``,
435 ``PIPE_CAPF_GUARD_BAND_RIGHT``,
436 ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
437
438
439 .. _pipe_shader_cap:
440
441 PIPE_SHADER_CAP_*
442 ^^^^^^^^^^^^^^^^^
443
444 These are per-shader-stage capabitity queries. Different shader stages may
445 support different features.
446
447 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
448 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
449 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
450 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
451 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
452 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
453 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
454 This is valid for all shaders except the fragment shader.
455 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
456 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
457 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
458 only permit binding one constant buffer per shader.
459
460 If a value greater than 0 is returned, the driver can have multiple
461 constant buffers bound to shader stages. The CONST register file is
462 accessed with two-dimensional indices, like in the example below.
463
464 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
465 DCL CONST[3][0] # declare first vector of constbuf 3
466 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
467
468 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
469 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
470 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
471 of the input file is supported.
472 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
473 of the output file is supported.
474 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
475 of the temporary file is supported.
476 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
477 of the constant file is supported.
478 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
479 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
480 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
481 If unsupported, only float opcodes are supported.
482 * ``PIPE_SHADER_CAP_INT64_ATOMICS``: Whether int64 atomic opcodes are supported. The device needs to support add, sub, swap, cmpswap, and, or, xor, min, and max.
483 * ``PIPE_SHADER_CAP_FP16``: Whether half precision floating-point opcodes are supported.
484 If unsupported, half precision ops need to be lowered to full precision.
485 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
486 samplers.
487 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
488 program. It should be one of the ``pipe_shader_ir`` enum values.
489 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
490 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
491 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
492 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
493 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
494 DLDEXP are supported.
495 * ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported.
496 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
497 are supported.
498 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
499 ignore tgsi_declaration_range::Last for shader inputs and outputs.
500 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
501 of iterations that loops are allowed to have to be unrolled. It is only
502 a hint to state trackers. Whether any loops will be unrolled is not
503 guaranteed.
504 * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers
505 (also used to implement atomic counters). Having this be non-0 also
506 implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI
507 opcodes.
508 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
509 program. It should be a mask of ``pipe_shader_ir`` bits.
510 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
511 * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
512 cost than this value should be lowered by the state tracker for better
513 performance. This is a tunable for the GLSL compiler and the behavior is
514 specific to the compiler.
515 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
516 TGSI pass is skipped. This might reduce code size and register pressure if
517 the underlying driver has a real backend compiler.
518
519
520 .. _pipe_compute_cap:
521
522 PIPE_COMPUTE_CAP_*
523 ^^^^^^^^^^^^^^^^^^
524
525 Compute-specific capabilities. They can be queried using
526 pipe_screen::get_compute_param.
527
528 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
529 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
530 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM
531 or PIPE_SHADER_IR_NATIVE for their preferred IR.
532 Value type: null-terminated string. Shader IR type dependent.
533 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
534 for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
535 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
536 units. Value type: ``uint64_t []``. Shader IR type dependent.
537 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
538 units. Value type: ``uint64_t []``. Shader IR type dependent.
539 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
540 a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
541 This may be less than the product of the components of MAX_BLOCK_SIZE and is
542 usually limited by the number of threads that can be resident simultaneously
543 on a compute unit.
544 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
545 resource. Value type: ``uint64_t``. Shader IR type dependent.
546 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
547 resource. Value type: ``uint64_t``. Shader IR type dependent.
548 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
549 resource. Value type: ``uint64_t``. Shader IR type dependent.
550 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
551 resource. Value type: ``uint64_t``. Shader IR type dependent.
552 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
553 allocation in bytes. Value type: ``uint64_t``.
554 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
555 clock in MHz. Value type: ``uint32_t``
556 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
557 Value type: ``uint32_t``
558 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
559 non-zero means yes, zero means no. Value type: ``uint32_t``
560 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
561 threads. Also known as wavefront size, warp size or SIMD width.
562 * ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space
563 size specified as an unsigned integer value in bits.
564 * ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number
565 of threads that a single block can contain. This is similar to
566 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not
567 known a compile-time but at dispatch-time.
568
569 .. _pipe_bind:
570
571 PIPE_BIND_*
572 ^^^^^^^^^^^
573
574 These flags indicate how a resource will be used and are specified at resource
575 creation time. Resources may be used in different roles
576 during their lifecycle. Bind flags are cumulative and may be combined to create
577 a resource which can be used for multiple things.
578 Depending on the pipe driver's memory management and these bind flags,
579 resources might be created and handled quite differently.
580
581 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
582 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
583 must have this flag set.
584 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
585 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
586 have this flag set.
587 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
588 query whether a device supports blending for a given format.
589 If this flag is set, surface creation may fail if blending is not supported
590 for the specified format. If it is not set, a driver may choose to ignore
591 blending on surfaces with formats that would require emulation.
592 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
593 pipe_screen::flush_front_buffer must have this flag set.
594 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
595 or vertex shader.
596 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
597 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
598 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
599 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
600 * ``PIPE_BIND_CUSTOM``:
601 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
602 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
603 process.
604 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
605 address space of a compute program.
606 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
607 to a shader and can be used with load, store, and atomic instructions.
608 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
609 bound to a shader and can be used with load, store, and atomic instructions.
610 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
611 bound to the compute program as a shader resource.
612 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
613 GPU command processor. It can contain, for example, the arguments to
614 indirect draw calls.
615
616 .. _pipe_usage:
617
618 PIPE_USAGE_*
619 ^^^^^^^^^^^^
620
621 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
622 Note that drivers must always support read and write CPU access at any time
623 no matter which hint they got.
624
625 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
626 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
627 not expected to be mapped or changed (even by the GPU) after the first upload.
628 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
629 uploaded is expected to be used at least several times by the GPU.
630 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
631 uploaded is expected to be used only once by the GPU.
632 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
633
634
635 Methods
636 -------
637
638 XXX to-do
639
640 get_name
641 ^^^^^^^^
642
643 Returns an identifying name for the screen.
644
645 The returned string should remain valid and immutable for the lifetime of
646 pipe_screen.
647
648 get_vendor
649 ^^^^^^^^^^
650
651 Returns the screen vendor.
652
653 The returned string should remain valid and immutable for the lifetime of
654 pipe_screen.
655
656 get_device_vendor
657 ^^^^^^^^^^^^^^^^^
658
659 Returns the actual vendor of the device driving the screen
660 (as opposed to the driver vendor).
661
662 The returned string should remain valid and immutable for the lifetime of
663 pipe_screen.
664
665 .. _get_param:
666
667 get_param
668 ^^^^^^^^^
669
670 Get an integer/boolean screen parameter.
671
672 **param** is one of the :ref:`PIPE_CAP` names.
673
674 .. _get_paramf:
675
676 get_paramf
677 ^^^^^^^^^^
678
679 Get a floating-point screen parameter.
680
681 **param** is one of the :ref:`PIPE_CAPF` names.
682
683 context_create
684 ^^^^^^^^^^^^^^
685
686 Create a pipe_context.
687
688 **priv** is private data of the caller, which may be put to various
689 unspecified uses, typically to do with implementing swapbuffers
690 and/or front-buffer rendering.
691
692 is_format_supported
693 ^^^^^^^^^^^^^^^^^^^
694
695 Determine if a resource in the given format can be used in a specific manner.
696
697 **format** the resource format
698
699 **target** one of the PIPE_TEXTURE_x flags
700
701 **sample_count** the number of samples. 0 and 1 mean no multisampling,
702 the maximum allowed legal value is 32.
703
704 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
705
706 Returns TRUE if all usages can be satisfied.
707
708
709 can_create_resource
710 ^^^^^^^^^^^^^^^^^^^
711
712 Check if a resource can actually be created (but don't actually allocate any
713 memory). This is used to implement OpenGL's proxy textures. Typically, a
714 driver will simply check if the total size of the given resource is less than
715 some limit.
716
717 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
718
719
720 .. _resource_create:
721
722 resource_create
723 ^^^^^^^^^^^^^^^
724
725 Create a new resource from a template.
726 The following fields of the pipe_resource must be specified in the template:
727
728 **target** one of the pipe_texture_target enums.
729 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
730 Modern APIs allow using buffers as shader resources.
731
732 **format** one of the pipe_format enums.
733
734 **width0** the width of the base mip level of the texture or size of the buffer.
735
736 **height0** the height of the base mip level of the texture
737 (1 for 1D or 1D array textures).
738
739 **depth0** the depth of the base mip level of the texture
740 (1 for everything else).
741
742 **array_size** the array size for 1D and 2D array textures.
743 For cube maps this must be 6, for other textures 1.
744
745 **last_level** the last mip map level present.
746
747 **nr_samples** the nr of msaa samples. 0 (or 1) specifies a resource
748 which isn't multisampled.
749
750 **usage** one of the :ref:`PIPE_USAGE` flags.
751
752 **bind** bitmask of the :ref:`PIPE_BIND` flags.
753
754 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
755
756
757
758 resource_changed
759 ^^^^^^^^^^^^^^^^
760
761 Mark a resource as changed so derived internal resources will be recreated
762 on next use.
763
764 When importing external images that can't be directly used as texture sampler
765 source, internal copies may have to be created that the hardware can sample
766 from. When those resources are reimported, the image data may have changed, and
767 the previously derived internal resources must be invalidated to avoid sampling
768 from old copies.
769
770
771
772 resource_destroy
773 ^^^^^^^^^^^^^^^^
774
775 Destroy a resource. A resource is destroyed if it has no more references.
776
777
778
779 get_timestamp
780 ^^^^^^^^^^^^^
781
782 Query a timestamp in nanoseconds. The returned value should match
783 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
784 wait for rendering to complete (which cannot be achieved with queries).
785
786
787
788 get_driver_query_info
789 ^^^^^^^^^^^^^^^^^^^^^
790
791 Return a driver-specific query. If the **info** parameter is NULL,
792 the number of available queries is returned. Otherwise, the driver
793 query at the specified **index** is returned in **info**.
794 The function returns non-zero on success.
795 The driver-specific query is described with the pipe_driver_query_info
796 structure.
797
798 get_driver_query_group_info
799 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
800
801 Return a driver-specific query group. If the **info** parameter is NULL,
802 the number of available groups is returned. Otherwise, the driver
803 query group at the specified **index** is returned in **info**.
804 The function returns non-zero on success.
805 The driver-specific query group is described with the
806 pipe_driver_query_group_info structure.
807
808
809
810 get_disk_shader_cache
811 ^^^^^^^^^^^^^^^^^^^^^
812
813 Returns a pointer to a driver-specific on-disk shader cache. If the driver
814 failed to create the cache or does not support an on-disk shader cache NULL is
815 returned. The callback itself may also be NULL if the driver doesn't support
816 an on-disk shader cache.
817
818
819 Thread safety
820 -------------
821
822 Screen methods are required to be thread safe. While gallium rendering
823 contexts are not required to be thread safe, it is required to be safe to use
824 different contexts created with the same screen in different threads without
825 locks. It is also required to be safe using screen methods in a thread, while
826 using one of its contexts in another (without locks).