59c0103539c5ec2fe712a84b4acbd6d5ef269d37
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
28 :ref:`Blend` for more information.
29 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
30 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
31 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
32 bound.
33 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
34 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
35 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
36 supported.
37 * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
38 for a 2D texture.
39 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
40 for a 3D texture.
41 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
42 for a cubemap.
43 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE``: Whether mirrored texture coordinates are
44 supported with the clamp-to-edge wrap mode.
45 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates are supported
46 with clamp or clamp-to-border wrap modes.
47 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
48 from color blend equations, in :ref:`Blend` state.
49 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
50 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
51 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
52 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
53 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
54 masks are supported. If 0, then the first rendertarget's blend mask is
55 replicated across all MRTs.
56 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
57 available. If 0, then the first rendertarget's blend functions affect all
58 MRTs.
59 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
60 layers supported. If 0, the array textures are not supported at all and
61 the ARRAY texture targets are invalid.
62 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
63 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
64 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
65 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
66 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
67 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
68 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
69 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
70 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
71 depth clipping (through pipe_rasterizer_state)
72 * ``PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE``: Whether the driver is capable of
73 disabling depth clipping (through pipe_rasterizer_state) separately for
74 the near and far plane. If not, depth_clip_near and depth_clip_far will be
75 equal.
76 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
77 written from a fragment shader.
78 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
79 in the vertex shader.
80 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
81 per-instance vertex attribs.
82 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
83 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
84 flag supported by the driver? If not, the state tracker will insert
85 clamping code into the fragment shaders when needed.
86
87 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
88 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
89 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
90 outputting unclamped vertex colors from a vertex shader. If unsupported,
91 the vertex colors are always clamped. This is the default for DX9 hardware.
92 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
93 clamping vertex colors when they come out of a vertex shader, as specified
94 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
95 the vertex colors are never clamped. This is the default for DX10 hardware.
96 If both clamped and unclamped CAPs are supported, the clamping can be
97 controlled through pipe_rasterizer_state. If the driver cannot do vertex
98 color clamping, the state tracker may insert clamping code into the vertex
99 shader.
100 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
101 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
102 * ``PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY``: Whether the driver supports
103 features equivalent to a specific GLSL version including all legacy OpenGL
104 features only present in the OpenGL compatibility profile.
105 The only legacy features that Gallium drivers must implement are
106 the legacy shader inputs and outputs (colors, texcoords, fog, clipvertex,
107 edgeflag).
108 * ``PIPE_CAP_ESSL_FEATURE_LEVEL``: An optional cap to allow drivers to
109 report a higher GLSL version for GLES contexts. This is useful when a
110 driver does not support all the required features for a higher GL version,
111 but does support the required features for a higher GLES version. A driver
112 is allowed to return ``0`` in which case ``PIPE_CAP_GLSL_FEATURE_LEVEL`` is
113 used.
114 Note that simply returning the same value as the GLSL feature level cap is
115 incorrect. For example, GLSL version 3.30 does not require ``ARB_gpu_shader5``,
116 but ESSL version 3.20 es does require ``EXT_gpu_shader5``
117 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
118 the flatshade_first setting in ``pipe_rasterizer_state``.
119 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
120 buffers. If not, the state tracker must upload all data which is not in hw
121 resources. If user-space buffers are supported, the driver must also still
122 accept HW resource buffers.
123 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
124 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
125 to 4. If false, there are no restrictions on the offset.
126 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
127 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
128 If false, there are no restrictions on the stride.
129 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
130 a hw limitation. If true, pipe_vertex_element::src_offset must always be
131 aligned to 4. If false, there are no restrictions on src_offset.
132 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
133 compute entry points defined in pipe_context and pipe_screen.
134 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
135 alignment of pipe_constant_buffer::buffer_offset.
136 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
137 pipe_draw_info::start_instance.
138 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
139 the pipe_screen::get_timestamp hook are implemented.
140 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
141 for rendering are also supported for texturing.
142 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
143 expected for a pointer returned by transfer_map if the resource is
144 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
145 always aligned to this value.
146 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
147 alignment for pipe_sampler_view::u.buf.offset, in bytes.
148 If a driver does not support offset/size, it should return 0.
149 * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only
150 supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views.
151 When this is the case it should be assumed that the swizzle parameters
152 in the sampler view have no effect.
153 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
154 If true, the hardware cannot replace arbitrary shader inputs with sprite
155 coordinates and hence the inputs that are desired to be replaceable must
156 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
157 The rasterizer's sprite_coord_enable state therefore also applies to the
158 TEXCOORD semantic.
159 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
160 input that will always be replaced with sprite coordinates.
161 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
162 to use a blit to implement a texture transfer which needs format conversions
163 and swizzling in state trackers. Generally, all hardware drivers with
164 dedicated memory should return 1 and all software rasterizers should return 0.
165 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
166 is supported.
167 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
168 considerations have to be given to the interaction between the border color
169 in the sampler object and the sampler view used with it.
170 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
171 may be affected in undefined ways for any kind of permutational swizzle
172 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
173 in the sampler view.
174 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
175 state should be swizzled manually according to the swizzle in the sampler
176 view it is intended to be used with, or herein undefined results may occur
177 for permutational swizzles.
178 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
179 a buffer sampler view, in texels.
180 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
181 since they are linked) a driver can support. Returning 0 is equivalent
182 to returning 1 because every driver has to support at least a single
183 viewport/scissor combination.
184 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
185 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
186 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
187 different sizes for fb color/zs attachments. This controls whether
188 ARB_framebuffer_object is provided.
189 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
190 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
191 outputs. Note that the viewport will only be used if multiple viewports are
192 exposed.
193 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
194 output by a single invocation of a geometry shader.
195 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
196 vertex components output by a single invocation of a geometry shader.
197 This is the product of the number of attribute components per vertex and
198 the number of output vertices.
199 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
200 in format that texture gather can operate on. 1 == RED, ALPHA etc,
201 4 == All formats.
202 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
203 hardware implements the SM5 features, component selection,
204 shadow comparison, and run-time offsets.
205 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
206 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
207 for buffers.
208 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
209 supported.
210 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
211 in conjunction with a texture gather opcode.
212 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
213 in conjunction with a texture gather opcode.
214 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
215 shading. The context->set_min_samples function will be expected to be
216 implemented.
217 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
218 accept 4 offsets.
219 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
220 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
221 and viewport transformation.
222 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
223 supported by the geometry shader. If stream-out is supported, this should be
224 at least 1. If stream-out is not supported, this should be 0.
225 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
226 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
227 See pipe_draw_info.
228 * ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports
229 pipe_draw_info::indirect_stride and ::indirect_count
230 * ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports
231 taking the number of indirect draws from a separate parameter
232 buffer, see pipe_draw_indirect_info::indirect_draw_count.
233 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
234 the FINE versions of DDX/DDY.
235 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
236 not available one should return 0xFFFFFFFF.
237 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
238 0xFFFFFFFF if not available.
239 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
240 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
241 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
242 memory and GART.
243 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
244 condition for conditional rendering.
245 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
246 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
247 different than the underlying resource's, as permitted by
248 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
249 cube (array) texture and vice-versa.
250 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
251 pipe_rasterizer_state::clip_halfz being set to true. This is required
252 for enabling ARB_clip_control.
253 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
254 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
255 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
256 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
257 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
258 semantics. Only relevant if geometry shaders are supported.
259 (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``).
260 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
261 for ``pipe_rasterizer_state::offset_clamp``.
262 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
263 a multisampled depth buffer into a single-sampled texture (or depth buffer).
264 Only the first sampled should be copied.
265 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
266 a pipe_resource where an already-existing piece of (malloc'd) user memory
267 is used as its backing storage. In other words, whether the driver can map
268 existing user memory into the device address space for direct device access.
269 The create function is pipe_screen::resource_from_user_memory. The address
270 and size must be page-aligned.
271 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
272 Whether pipe_context::get_device_reset_status is implemented.
273 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
274 How many per-patch outputs and inputs are supported between tessellation
275 control and tessellation evaluation shaders, not counting in TESSINNER and
276 TESSOUTER. The minimum allowed value for OpenGL is 30.
277 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
278 magnification filters are supported with single-precision floating-point
279 textures.
280 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
281 magnification filters are supported with half-precision floating-point
282 textures.
283 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
284 bounds_max states of pipe_depth_stencil_alpha_state behave according
285 to the GL_EXT_depth_bounds_test specification.
286 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
287 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
288 interpolation for all fragment shader inputs if
289 pipe_rasterizer_state::force_persample_interp is set. This is only used
290 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
291 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
292 GL4 hardware will likely need to emulate it with a shader variant, or by
293 selecting the interpolation weights with a conditional assignment
294 in the shader.
295 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
296 pipe_context.
297 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
298 Whether copying between compressed and plain formats is supported where
299 a compressed block is copied to/from a plain pixel of the same size.
300 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
301 available in contexts.
302 * ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``,
303 ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are
304 supported in vertex shaders.
305 * ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H``
306 TGSI opcodes are supported.
307 * ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use
308 a system value for the POSITION fragment shader input.
309 * ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use
310 a system value for the FACE fragment shader input.
311 Also, the FACE system value is integer, not float.
312 * ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required
313 alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum
314 value allowed is 256 (for GL conformance). 0 is only allowed if
315 shader buffers are not supported.
316 * ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource``
317 for buffers is supported.
318 * ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap
319 is supported.
320 * ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported.
321 * ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether
322 pipe_context::create_surface supports reinterpreting a texture as a surface
323 of a format with different block width/height (but same block size in bits).
324 For example, a compressed texture image can be interpreted as a
325 non-compressed surface whose texels are the same number of bits as the
326 compressed blocks, and vice versa. The width and height of the surface is
327 adjusted appropriately.
328 * ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports
329 context::get_query_result_resource callback.
330 * ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number.
331 * ``PIPE_CAP_PCI_BUS``: Return the PCI bus number.
332 * ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number.
333 * ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number.
334 * ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``:
335 If non-zero, rendering to framebuffers with no surface attachments
336 is supported. The context->is_format_supported function will be expected
337 to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware
338 supports. N.B., The maximum number of layers supported for rasterizing a
339 primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``
340 even though it can be larger than the number of layers supported by either
341 rendering or textures.
342 * ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds
343 checking on resource accesses by shader if the context is created with
344 PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior
345 extension for information on the required behavior for out of bounds accesses
346 and accesses to unbound resources.
347 * ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance
348 extension and thus implements proper support for culling planes.
349 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
350 supported for patch primitives.
351 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
352 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
353 supported in ``set_window_rectangles``.
354 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support
355 for ``pipe_rasterizer_state::offset_units_unscaled``.
356 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
357 floating point viewport bounds.
358 * ``PIPE_CAP_RASTERIZER_SUBPIXEL_BITS``: Number of bits of subpixel precision used
359 by the rasterizer.
360 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
361 support for color/depth format combinations that use a different
362 number of bits. For the purpose of this cap, Z24 is treated as
363 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
364 combination will require a driver fallback, and should not be
365 advertised in the GLX/EGL config list.
366 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
367 UsageMask of input and output declarations and allows declaring arrays
368 in overlapping ranges. The components must be a contiguous range, e.g. a
369 UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with
370 overlapping locations must have matching semantic names and indices, and
371 equal interpolation qualifiers.
372 Components may overlap, notably when the gaps in an array of dvec3 are
373 filled in.
374 * ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream
375 output mode is able to interleave across buffers. This is required for
376 ARB_transform_feedback3.
377 * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read
378 from the output file.
379 * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
380 the minimum amount of optimizations just to be able to do all the linking
381 and lowering.
382 * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
383 opcode to retrieve the current value in the framebuffer.
384 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
385 ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
386 * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
387 are supported.
388 * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
389 * ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo
390 operations are supported.
391 * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are
392 supported.
393 * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported.
394 * ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the
395 PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for
396 ``pipe_rasterizer_state::fill_front`` and
397 ``pipe_rasterizer_state::fill_back``.
398 * ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in
399 bytes, or 0 if sparse buffers are not supported. The page size must be at
400 most 64KB.
401 * ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as
402 the SUBGROUP_* semantics are supported.
403 * ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
404 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation
405 shader outputs.
406 * ``PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX``: Whether a buffer with just
407 PIPE_BIND_CONSTANT_BUFFER can be legally passed to set_vertex_buffers.
408 * ``PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION``: As the name says.
409 * ``PIPE_CAP_POST_DEPTH_COVERAGE``: whether
410 ``TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE`` is supported.
411 * ``PIPE_CAP_BINDLESS_TEXTURE``: Whether bindless texture operations are
412 supported.
413 * ``PIPE_CAP_NIR_SAMPLERS_AS_DEREF``: Whether NIR tex instructions should
414 reference texture and sampler as NIR derefs instead of by indices.
415 * ``PIPE_CAP_QUERY_SO_OVERFLOW``: Whether the
416 ``PIPE_QUERY_SO_OVERFLOW_PREDICATE`` and
417 ``PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE`` query types are supported. Note that
418 for a driver that does not support multiple output streams (i.e.,
419 ``PIPE_CAP_MAX_VERTEX_STREAMS`` is 1), both query types are identical.
420 * ``PIPE_CAP_MEMOBJ``: Whether operations on memory objects are supported.
421 * ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports ``TGSI_OPCODE_LOAD`` use
422 with constant buffers.
423 * ``PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS``: Any TGSI register can be used as
424 an address for indirect register indexing.
425 * ``PIPE_CAP_TILE_RASTER_ORDER``: Whether the driver supports
426 GL_MESA_tile_raster_order, using the tile_raster_order_* fields in
427 pipe_rasterizer_state.
428 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
429 output resources (images + buffers + fragment outputs). If 0 the state
430 tracker works it out.
431 * ``PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS``: This determines limitations
432 on the number of samples that framebuffer attachments can have.
433 Possible values:
434 0: color.nr_samples == zs.nr_samples == color.nr_storage_samples
435 (standard MSAA quality)
436 1: color.nr_samples >= zs.nr_samples == color.nr_storage_samples
437 (enhanced MSAA quality)
438 2: color.nr_samples >= zs.nr_samples >= color.nr_storage_samples
439 (full flexibility in tuning MSAA quality and performance)
440 All color attachments must have the same number of samples and the same
441 number of storage samples.
442 * ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``:
443 Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf
444 module needs this for optimal performance in workstation applications.
445 * ``PIPE_CAP_CONTEXT_PRIORITY_MASK``: For drivers that support per-context
446 priorities, this returns a bitmask of ``PIPE_CONTEXT_PRIORITY_x`` for the
447 supported priority levels. A driver that does not support prioritized
448 contexts can return 0.
449 * ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores
450 using fence_server_signal().
451 * ``PIPE_CAP_CONSTBUF0_FLAGS``: The bits of pipe_resource::flags that must be
452 set when binding that buffer as constant buffer 0. If the buffer doesn't have
453 those bits set, pipe_context::set_constant_buffer(.., 0, ..) is ignored
454 by the driver, and the driver can throw assertion failures.
455 * ``PIPE_CAP_PACKED_UNIFORMS``: True if the driver supports packed uniforms
456 as opposed to padding to vec4s.
457 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES``: Whether the
458 ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for triangles.
459 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES``: Whether the
460 ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for points and lines.
461 * ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES``: Whether the
462 ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for triangles.
463 * ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES``: Whether the
464 ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for points and lines.
465 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE``: Whether
466 ``PIPE_CAP_POST_DEPTH_COVERAGE`` works with conservative rasterization.
467 * ``PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE``: Whether
468 inner_coverage from GL_INTEL_conservative_rasterization is supported.
469 * ``PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS``: The maximum
470 subpixel precision bias in bits during conservative rasterization.
471 * ``PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS``: True is the driver supports
472 programmable sample location through ```get_sample_pixel_grid``` and
473 ```set_sample_locations```.
474 * ``PIPE_CAP_MAX_GS_INVOCATIONS``: Maximum supported value of
475 TGSI_PROPERTY_GS_INVOCATIONS.
476 * ``PIPE_CAP_MAX_SHADER_BUFFER_SIZE``: Maximum supported size for binding
477 with set_shader_buffers.
478 * ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader
479 buffers. A value of 0 means the sum of all per-shader stage maximums (see
480 ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``).
481 * ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS``: Maximum total number of atomic
482 counters. A value of 0 means the default value (MAX_ATOMIC_COUNTERS = 4096).
483 * ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
484 atomic counter buffers. A value of 0 means the sum of all per-shader stage
485 maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
486 * ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET``: Maximum recommend memory size
487 for all active texture uploads combined. This is a performance hint.
488 0 means no limit.
489 * ``PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET``: The maximum supported value for
490 of pipe_vertex_element::src_offset.
491 * ``PIPE_CAP_SURFACE_SAMPLE_COUNT``: Whether the driver
492 supports pipe_surface overrides of resource nr_samples. If set, will
493 enable EXT_multisampled_render_to_texture.
494 * ``PIPE_CAP_TGSI_ATOMFADD``: Atomic floating point adds are supported on
495 images, buffers, and shared memory.
496 * ``PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND``: True if the driver needs blend state to use zero/one instead of destination alpha for RGB/XRGB formats.
497 * ``PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS``: True if the driver wants TESSINNER and TESSOUTER to be inputs (rather than system values) for tessellation evaluation shaders.
498 * ``PIPE_CAP_DEST_SURFACE_SRGB_CONTROL``: Indicates whether the drivers
499 supports switching the format between sRGB and linear for a surface that is
500 used as destination in draw and blit calls.
501 * ``PIPE_CAP_NIR_COMPACT_ARRAYS``: True if the compiler backend supports NIR's compact array feature, for all shader stages.
502 * ``PIPE_CAP_MAX_VARYINGS``: The maximum number of fragment shader
503 varyings. This will generally correspond to
504 ``PIPE_SHADER_CAP_MAX_INPUTS`` for the fragment shader, but in some
505 cases may be a smaller number.
506 * ``PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK``: Whether pipe_grid_info::last_block
507 is implemented by the driver. See struct pipe_grid_info for more details.
508 * ``PIPE_CAP_COMPUTE_SHADER_DERIVATIVE``: True if the driver supports derivatives (and texture lookups with implicit derivatives) in compute shaders.
509 * ``PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS``: Whether the TGSI pass to shrink IO
510 arrays should be skipped and enforce keeping the declared array sizes instead.
511 A driver might rely on the input mapping that was defined with the original
512 GLSL code.
513 * ``PIPE_CAP_IMAGE_LOAD_FORMATTED``: True if a format for image loads does not need to be specified in the shader IR
514
515 .. _pipe_capf:
516
517 PIPE_CAPF_*
518 ^^^^^^^^^^^^^^^^
519
520 The floating-point capabilities are:
521
522 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
523 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
524 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
525 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
526 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
527 applied to anisotropically filtered textures.
528 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
529 to filtered textures.
530 * ``PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE``: The minimum conservative rasterization
531 dilation.
532 * ``PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE``: The maximum conservative rasterization
533 dilation.
534 * ``PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY``: The conservative rasterization
535 dilation granularity for values relative to the minimum dilation.
536
537
538 .. _pipe_shader_cap:
539
540 PIPE_SHADER_CAP_*
541 ^^^^^^^^^^^^^^^^^
542
543 These are per-shader-stage capabitity queries. Different shader stages may
544 support different features.
545
546 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
547 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
548 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
549 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
550 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
551 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
552 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
553 This is valid for all shaders except the fragment shader.
554 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
555 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
556 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
557 only permit binding one constant buffer per shader.
558
559 If a value greater than 0 is returned, the driver can have multiple
560 constant buffers bound to shader stages. The CONST register file is
561 accessed with two-dimensional indices, like in the example below.
562
563 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
564 DCL CONST[3][0] # declare first vector of constbuf 3
565 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
566
567 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
568 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
569 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
570 of the input file is supported.
571 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
572 of the output file is supported.
573 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
574 of the temporary file is supported.
575 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
576 of the constant file is supported.
577 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
578 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
579 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
580 If unsupported, only float opcodes are supported.
581 * ``PIPE_SHADER_CAP_INT64_ATOMICS``: Whether int64 atomic opcodes are supported. The device needs to support add, sub, swap, cmpswap, and, or, xor, min, and max.
582 * ``PIPE_SHADER_CAP_FP16``: Whether half precision floating-point opcodes are supported.
583 If unsupported, half precision ops need to be lowered to full precision.
584 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
585 samplers.
586 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
587 program. It should be one of the ``pipe_shader_ir`` enum values.
588 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
589 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
590 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
591 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
592 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
593 DLDEXP are supported.
594 * ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported.
595 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
596 are supported.
597 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
598 ignore tgsi_declaration_range::Last for shader inputs and outputs.
599 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
600 of iterations that loops are allowed to have to be unrolled. It is only
601 a hint to state trackers. Whether any loops will be unrolled is not
602 guaranteed.
603 * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers
604 (also used to implement atomic counters). Having this be non-0 also
605 implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI
606 opcodes.
607 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
608 program. It should be a mask of ``pipe_shader_ir`` bits.
609 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
610 * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
611 cost than this value should be lowered by the state tracker for better
612 performance. This is a tunable for the GLSL compiler and the behavior is
613 specific to the compiler.
614 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
615 TGSI pass is skipped. This might reduce code size and register pressure if
616 the underlying driver has a real backend compiler.
617 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate,
618 how many HW counters are available for this stage. (0 uses SSBO atomics).
619 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
620 separate, how many atomic counter buffers are available for this stage.
621 * ``PIPE_SHADER_CAP_SCALAR_ISA``: Whether the ISA is a scalar one.
622
623 .. _pipe_compute_cap:
624
625 PIPE_COMPUTE_CAP_*
626 ^^^^^^^^^^^^^^^^^^
627
628 Compute-specific capabilities. They can be queried using
629 pipe_screen::get_compute_param.
630
631 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
632 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
633 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_NATIVE for
634 their preferred IR.
635 Value type: null-terminated string. Shader IR type dependent.
636 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
637 for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
638 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
639 units. Value type: ``uint64_t []``. Shader IR type dependent.
640 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
641 units. Value type: ``uint64_t []``. Shader IR type dependent.
642 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
643 a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
644 This may be less than the product of the components of MAX_BLOCK_SIZE and is
645 usually limited by the number of threads that can be resident simultaneously
646 on a compute unit.
647 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
648 resource. Value type: ``uint64_t``. Shader IR type dependent.
649 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
650 resource. Value type: ``uint64_t``. Shader IR type dependent.
651 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
652 resource. Value type: ``uint64_t``. Shader IR type dependent.
653 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
654 resource. Value type: ``uint64_t``. Shader IR type dependent.
655 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
656 allocation in bytes. Value type: ``uint64_t``.
657 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
658 clock in MHz. Value type: ``uint32_t``
659 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
660 Value type: ``uint32_t``
661 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
662 non-zero means yes, zero means no. Value type: ``uint32_t``
663 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
664 threads. Also known as wavefront size, warp size or SIMD width.
665 * ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space
666 size specified as an unsigned integer value in bits.
667 * ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number
668 of threads that a single block can contain. This is similar to
669 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not
670 known a compile-time but at dispatch-time.
671
672 .. _pipe_bind:
673
674 PIPE_BIND_*
675 ^^^^^^^^^^^
676
677 These flags indicate how a resource will be used and are specified at resource
678 creation time. Resources may be used in different roles
679 during their lifecycle. Bind flags are cumulative and may be combined to create
680 a resource which can be used for multiple things.
681 Depending on the pipe driver's memory management and these bind flags,
682 resources might be created and handled quite differently.
683
684 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
685 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
686 must have this flag set.
687 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
688 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
689 have this flag set.
690 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
691 query whether a device supports blending for a given format.
692 If this flag is set, surface creation may fail if blending is not supported
693 for the specified format. If it is not set, a driver may choose to ignore
694 blending on surfaces with formats that would require emulation.
695 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
696 pipe_screen::flush_front_buffer must have this flag set.
697 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
698 or vertex shader.
699 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
700 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
701 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
702 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
703 * ``PIPE_BIND_CUSTOM``:
704 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
705 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
706 process.
707 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
708 address space of a compute program.
709 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
710 to a shader and can be used with load, store, and atomic instructions.
711 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
712 bound to a shader and can be used with load, store, and atomic instructions.
713 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
714 bound to the compute program as a shader resource.
715 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
716 GPU command processor. It can contain, for example, the arguments to
717 indirect draw calls.
718
719 .. _pipe_usage:
720
721 PIPE_USAGE_*
722 ^^^^^^^^^^^^
723
724 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
725 Note that drivers must always support read and write CPU access at any time
726 no matter which hint they got.
727
728 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
729 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
730 not expected to be mapped or changed (even by the GPU) after the first upload.
731 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
732 uploaded is expected to be used at least several times by the GPU.
733 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
734 uploaded is expected to be used only once by the GPU.
735 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
736
737
738 Methods
739 -------
740
741 XXX to-do
742
743 get_name
744 ^^^^^^^^
745
746 Returns an identifying name for the screen.
747
748 The returned string should remain valid and immutable for the lifetime of
749 pipe_screen.
750
751 get_vendor
752 ^^^^^^^^^^
753
754 Returns the screen vendor.
755
756 The returned string should remain valid and immutable for the lifetime of
757 pipe_screen.
758
759 get_device_vendor
760 ^^^^^^^^^^^^^^^^^
761
762 Returns the actual vendor of the device driving the screen
763 (as opposed to the driver vendor).
764
765 The returned string should remain valid and immutable for the lifetime of
766 pipe_screen.
767
768 .. _get_param:
769
770 get_param
771 ^^^^^^^^^
772
773 Get an integer/boolean screen parameter.
774
775 **param** is one of the :ref:`PIPE_CAP` names.
776
777 .. _get_paramf:
778
779 get_paramf
780 ^^^^^^^^^^
781
782 Get a floating-point screen parameter.
783
784 **param** is one of the :ref:`PIPE_CAPF` names.
785
786 context_create
787 ^^^^^^^^^^^^^^
788
789 Create a pipe_context.
790
791 **priv** is private data of the caller, which may be put to various
792 unspecified uses, typically to do with implementing swapbuffers
793 and/or front-buffer rendering.
794
795 is_format_supported
796 ^^^^^^^^^^^^^^^^^^^
797
798 Determine if a resource in the given format can be used in a specific manner.
799
800 **format** the resource format
801
802 **target** one of the PIPE_TEXTURE_x flags
803
804 **sample_count** the number of samples. 0 and 1 mean no multisampling,
805 the maximum allowed legal value is 32.
806
807 **storage_sample_count** the number of storage samples. This must be <=
808 sample_count. See the documentation of ``pipe_resource::nr_storage_samples``.
809
810 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
811
812 Returns TRUE if all usages can be satisfied.
813
814
815 can_create_resource
816 ^^^^^^^^^^^^^^^^^^^
817
818 Check if a resource can actually be created (but don't actually allocate any
819 memory). This is used to implement OpenGL's proxy textures. Typically, a
820 driver will simply check if the total size of the given resource is less than
821 some limit.
822
823 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
824
825
826 .. _resource_create:
827
828 resource_create
829 ^^^^^^^^^^^^^^^
830
831 Create a new resource from a template.
832 The following fields of the pipe_resource must be specified in the template:
833
834 **target** one of the pipe_texture_target enums.
835 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
836 Modern APIs allow using buffers as shader resources.
837
838 **format** one of the pipe_format enums.
839
840 **width0** the width of the base mip level of the texture or size of the buffer.
841
842 **height0** the height of the base mip level of the texture
843 (1 for 1D or 1D array textures).
844
845 **depth0** the depth of the base mip level of the texture
846 (1 for everything else).
847
848 **array_size** the array size for 1D and 2D array textures.
849 For cube maps this must be 6, for other textures 1.
850
851 **last_level** the last mip map level present.
852
853 **nr_samples**: Number of samples determining quality, driving the rasterizer,
854 shading, and framebuffer. It is the number of samples seen by the whole
855 graphics pipeline. 0 and 1 specify a resource which isn't multisampled.
856
857 **nr_storage_samples**: Only color buffers can set this lower than nr_samples.
858 Multiple samples within a pixel can have the same color. ``nr_storage_samples``
859 determines how many slots for different colors there are per pixel.
860 If there are not enough slots to store all sample colors, some samples will
861 have an undefined color (called "undefined samples").
862
863 The resolve blit behavior is driver-specific, but can be one of these two:
864 1. Only defined samples will be averaged. Undefined samples will be ignored.
865 2. Undefined samples will be approximated by looking at surrounding defined
866 samples (even in different pixels).
867
868 Blits and MSAA texturing: If the sample being fetched is undefined, one of
869 the defined samples is returned instead.
870
871 Sample shading (``set_min_samples``) will operate at a sample frequency that
872 is at most ``nr_storage_samples``. Greater ``min_samples`` values will be
873 replaced by ``nr_storage_samples``.
874
875 **usage** one of the :ref:`PIPE_USAGE` flags.
876
877 **bind** bitmask of the :ref:`PIPE_BIND` flags.
878
879 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
880
881
882
883 resource_changed
884 ^^^^^^^^^^^^^^^^
885
886 Mark a resource as changed so derived internal resources will be recreated
887 on next use.
888
889 When importing external images that can't be directly used as texture sampler
890 source, internal copies may have to be created that the hardware can sample
891 from. When those resources are reimported, the image data may have changed, and
892 the previously derived internal resources must be invalidated to avoid sampling
893 from old copies.
894
895
896
897 resource_destroy
898 ^^^^^^^^^^^^^^^^
899
900 Destroy a resource. A resource is destroyed if it has no more references.
901
902
903
904 get_timestamp
905 ^^^^^^^^^^^^^
906
907 Query a timestamp in nanoseconds. The returned value should match
908 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
909 wait for rendering to complete (which cannot be achieved with queries).
910
911
912
913 get_driver_query_info
914 ^^^^^^^^^^^^^^^^^^^^^
915
916 Return a driver-specific query. If the **info** parameter is NULL,
917 the number of available queries is returned. Otherwise, the driver
918 query at the specified **index** is returned in **info**.
919 The function returns non-zero on success.
920 The driver-specific query is described with the pipe_driver_query_info
921 structure.
922
923 get_driver_query_group_info
924 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
925
926 Return a driver-specific query group. If the **info** parameter is NULL,
927 the number of available groups is returned. Otherwise, the driver
928 query group at the specified **index** is returned in **info**.
929 The function returns non-zero on success.
930 The driver-specific query group is described with the
931 pipe_driver_query_group_info structure.
932
933
934
935 get_disk_shader_cache
936 ^^^^^^^^^^^^^^^^^^^^^
937
938 Returns a pointer to a driver-specific on-disk shader cache. If the driver
939 failed to create the cache or does not support an on-disk shader cache NULL is
940 returned. The callback itself may also be NULL if the driver doesn't support
941 an on-disk shader cache.
942
943
944 Thread safety
945 -------------
946
947 Screen methods are required to be thread safe. While gallium rendering
948 contexts are not required to be thread safe, it is required to be safe to use
949 different contexts created with the same screen in different threads without
950 locks. It is also required to be safe using screen methods in a thread, while
951 using one of its contexts in another (without locks).