gallium: Redefine the max texture 2d cap from _LEVELS to _SIZE.
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
28 :ref:`Blend` for more information.
29 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
30 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
31 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
32 bound.
33 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
34 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
35 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
36 supported.
37 * ``PIPE_CAP_MAX_TEXTURE_2D_SIZE``: The maximum size of 2D (and 1D) textures.
38 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
39 for a 3D texture.
40 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
41 for a cubemap.
42 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP_TO_EDGE``: Whether mirrored texture coordinates are
43 supported with the clamp-to-edge wrap mode.
44 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates are supported
45 with clamp or clamp-to-border wrap modes.
46 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
47 from color blend equations, in :ref:`Blend` state.
48 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
49 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
50 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
51 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
52 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
53 masks are supported. If 0, then the first rendertarget's blend mask is
54 replicated across all MRTs.
55 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
56 available. If 0, then the first rendertarget's blend functions affect all
57 MRTs.
58 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
59 layers supported. If 0, the array textures are not supported at all and
60 the ARRAY texture targets are invalid.
61 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
62 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
63 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
64 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
65 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
66 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
67 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
68 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
69 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
70 depth clipping (through pipe_rasterizer_state)
71 * ``PIPE_CAP_DEPTH_CLIP_DISABLE_SEPARATE``: Whether the driver is capable of
72 disabling depth clipping (through pipe_rasterizer_state) separately for
73 the near and far plane. If not, depth_clip_near and depth_clip_far will be
74 equal.
75 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
76 written from a fragment shader.
77 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
78 in the vertex shader.
79 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
80 per-instance vertex attribs.
81 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
82 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
83 flag supported by the driver? If not, the state tracker will insert
84 clamping code into the fragment shaders when needed.
85
86 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
87 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
88 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
89 outputting unclamped vertex colors from a vertex shader. If unsupported,
90 the vertex colors are always clamped. This is the default for DX9 hardware.
91 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
92 clamping vertex colors when they come out of a vertex shader, as specified
93 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
94 the vertex colors are never clamped. This is the default for DX10 hardware.
95 If both clamped and unclamped CAPs are supported, the clamping can be
96 controlled through pipe_rasterizer_state. If the driver cannot do vertex
97 color clamping, the state tracker may insert clamping code into the vertex
98 shader.
99 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
100 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
101 * ``PIPE_CAP_GLSL_FEATURE_LEVEL_COMPATIBILITY``: Whether the driver supports
102 features equivalent to a specific GLSL version including all legacy OpenGL
103 features only present in the OpenGL compatibility profile.
104 The only legacy features that Gallium drivers must implement are
105 the legacy shader inputs and outputs (colors, texcoords, fog, clipvertex,
106 edgeflag).
107 * ``PIPE_CAP_ESSL_FEATURE_LEVEL``: An optional cap to allow drivers to
108 report a higher GLSL version for GLES contexts. This is useful when a
109 driver does not support all the required features for a higher GL version,
110 but does support the required features for a higher GLES version. A driver
111 is allowed to return ``0`` in which case ``PIPE_CAP_GLSL_FEATURE_LEVEL`` is
112 used.
113 Note that simply returning the same value as the GLSL feature level cap is
114 incorrect. For example, GLSL version 3.30 does not require ``ARB_gpu_shader5``,
115 but ESSL version 3.20 es does require ``EXT_gpu_shader5``
116 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
117 the flatshade_first setting in ``pipe_rasterizer_state``.
118 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
119 buffers. If not, the state tracker must upload all data which is not in hw
120 resources. If user-space buffers are supported, the driver must also still
121 accept HW resource buffers.
122 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
123 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
124 to 4. If false, there are no restrictions on the offset.
125 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
126 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
127 If false, there are no restrictions on the stride.
128 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
129 a hw limitation. If true, pipe_vertex_element::src_offset must always be
130 aligned to 4. If false, there are no restrictions on src_offset.
131 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
132 compute entry points defined in pipe_context and pipe_screen.
133 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
134 alignment of pipe_constant_buffer::buffer_offset.
135 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
136 pipe_draw_info::start_instance.
137 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
138 the pipe_screen::get_timestamp hook are implemented.
139 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
140 for rendering are also supported for texturing.
141 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
142 expected for a pointer returned by transfer_map if the resource is
143 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
144 always aligned to this value.
145 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
146 alignment for pipe_sampler_view::u.buf.offset, in bytes.
147 If a driver does not support offset/size, it should return 0.
148 * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only
149 supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views.
150 When this is the case it should be assumed that the swizzle parameters
151 in the sampler view have no effect.
152 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
153 If true, the hardware cannot replace arbitrary shader inputs with sprite
154 coordinates and hence the inputs that are desired to be replaceable must
155 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
156 The rasterizer's sprite_coord_enable state therefore also applies to the
157 TEXCOORD semantic.
158 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
159 input that will always be replaced with sprite coordinates.
160 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
161 to use a blit to implement a texture transfer which needs format conversions
162 and swizzling in state trackers. Generally, all hardware drivers with
163 dedicated memory should return 1 and all software rasterizers should return 0.
164 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
165 is supported.
166 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
167 considerations have to be given to the interaction between the border color
168 in the sampler object and the sampler view used with it.
169 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
170 may be affected in undefined ways for any kind of permutational swizzle
171 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
172 in the sampler view.
173 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
174 state should be swizzled manually according to the swizzle in the sampler
175 view it is intended to be used with, or herein undefined results may occur
176 for permutational swizzles.
177 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
178 a buffer sampler view, in texels.
179 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
180 since they are linked) a driver can support. Returning 0 is equivalent
181 to returning 1 because every driver has to support at least a single
182 viewport/scissor combination.
183 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
184 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
185 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
186 different sizes for fb color/zs attachments. This controls whether
187 ARB_framebuffer_object is provided.
188 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
189 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
190 outputs. Note that the viewport will only be used if multiple viewports are
191 exposed.
192 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
193 output by a single invocation of a geometry shader.
194 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
195 vertex components output by a single invocation of a geometry shader.
196 This is the product of the number of attribute components per vertex and
197 the number of output vertices.
198 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
199 in format that texture gather can operate on. 1 == RED, ALPHA etc,
200 4 == All formats.
201 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
202 hardware implements the SM5 features, component selection,
203 shadow comparison, and run-time offsets.
204 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
205 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
206 for buffers.
207 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
208 supported.
209 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
210 in conjunction with a texture gather opcode.
211 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
212 in conjunction with a texture gather opcode.
213 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
214 shading. The context->set_min_samples function will be expected to be
215 implemented.
216 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
217 accept 4 offsets.
218 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
219 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
220 and viewport transformation.
221 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
222 supported by the geometry shader. If stream-out is supported, this should be
223 at least 1. If stream-out is not supported, this should be 0.
224 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
225 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
226 See pipe_draw_info.
227 * ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports
228 pipe_draw_info::indirect_stride and ::indirect_count
229 * ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports
230 taking the number of indirect draws from a separate parameter
231 buffer, see pipe_draw_indirect_info::indirect_draw_count.
232 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
233 the FINE versions of DDX/DDY.
234 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
235 not available one should return 0xFFFFFFFF.
236 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
237 0xFFFFFFFF if not available.
238 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
239 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
240 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
241 memory and GART.
242 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
243 condition for conditional rendering.
244 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
245 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
246 different than the underlying resource's, as permitted by
247 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
248 cube (array) texture and vice-versa.
249 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
250 pipe_rasterizer_state::clip_halfz being set to true. This is required
251 for enabling ARB_clip_control.
252 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
253 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
254 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
255 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
256 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
257 semantics. Only relevant if geometry shaders are supported.
258 (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``).
259 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
260 for ``pipe_rasterizer_state::offset_clamp``.
261 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
262 a multisampled depth buffer into a single-sampled texture (or depth buffer).
263 Only the first sampled should be copied.
264 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
265 a pipe_resource where an already-existing piece of (malloc'd) user memory
266 is used as its backing storage. In other words, whether the driver can map
267 existing user memory into the device address space for direct device access.
268 The create function is pipe_screen::resource_from_user_memory. The address
269 and size must be page-aligned.
270 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
271 Whether pipe_context::get_device_reset_status is implemented.
272 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
273 How many per-patch outputs and inputs are supported between tessellation
274 control and tessellation evaluation shaders, not counting in TESSINNER and
275 TESSOUTER. The minimum allowed value for OpenGL is 30.
276 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
277 magnification filters are supported with single-precision floating-point
278 textures.
279 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
280 magnification filters are supported with half-precision floating-point
281 textures.
282 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
283 bounds_max states of pipe_depth_stencil_alpha_state behave according
284 to the GL_EXT_depth_bounds_test specification.
285 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
286 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
287 interpolation for all fragment shader inputs if
288 pipe_rasterizer_state::force_persample_interp is set. This is only used
289 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
290 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
291 GL4 hardware will likely need to emulate it with a shader variant, or by
292 selecting the interpolation weights with a conditional assignment
293 in the shader.
294 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
295 pipe_context.
296 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
297 Whether copying between compressed and plain formats is supported where
298 a compressed block is copied to/from a plain pixel of the same size.
299 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
300 available in contexts.
301 * ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``,
302 ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are
303 supported in vertex shaders.
304 * ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H``
305 TGSI opcodes are supported.
306 * ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use
307 a system value for the POSITION fragment shader input.
308 * ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use
309 a system value for the FACE fragment shader input.
310 Also, the FACE system value is integer, not float.
311 * ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required
312 alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum
313 value allowed is 256 (for GL conformance). 0 is only allowed if
314 shader buffers are not supported.
315 * ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource``
316 for buffers is supported.
317 * ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap
318 is supported.
319 * ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported.
320 * ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether
321 pipe_context::create_surface supports reinterpreting a texture as a surface
322 of a format with different block width/height (but same block size in bits).
323 For example, a compressed texture image can be interpreted as a
324 non-compressed surface whose texels are the same number of bits as the
325 compressed blocks, and vice versa. The width and height of the surface is
326 adjusted appropriately.
327 * ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports
328 context::get_query_result_resource callback.
329 * ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number.
330 * ``PIPE_CAP_PCI_BUS``: Return the PCI bus number.
331 * ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number.
332 * ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number.
333 * ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``:
334 If non-zero, rendering to framebuffers with no surface attachments
335 is supported. The context->is_format_supported function will be expected
336 to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware
337 supports. N.B., The maximum number of layers supported for rasterizing a
338 primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``
339 even though it can be larger than the number of layers supported by either
340 rendering or textures.
341 * ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds
342 checking on resource accesses by shader if the context is created with
343 PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior
344 extension for information on the required behavior for out of bounds accesses
345 and accesses to unbound resources.
346 * ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance
347 extension and thus implements proper support for culling planes.
348 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
349 supported for patch primitives.
350 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
351 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
352 supported in ``set_window_rectangles``.
353 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support
354 for ``pipe_rasterizer_state::offset_units_unscaled``.
355 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
356 floating point viewport bounds.
357 * ``PIPE_CAP_RASTERIZER_SUBPIXEL_BITS``: Number of bits of subpixel precision used
358 by the rasterizer.
359 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
360 support for color/depth format combinations that use a different
361 number of bits. For the purpose of this cap, Z24 is treated as
362 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
363 combination will require a driver fallback, and should not be
364 advertised in the GLX/EGL config list.
365 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
366 UsageMask of input and output declarations and allows declaring arrays
367 in overlapping ranges. The components must be a contiguous range, e.g. a
368 UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with
369 overlapping locations must have matching semantic names and indices, and
370 equal interpolation qualifiers.
371 Components may overlap, notably when the gaps in an array of dvec3 are
372 filled in.
373 * ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream
374 output mode is able to interleave across buffers. This is required for
375 ARB_transform_feedback3.
376 * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read
377 from the output file.
378 * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
379 the minimum amount of optimizations just to be able to do all the linking
380 and lowering.
381 * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
382 opcode to retrieve the current value in the framebuffer.
383 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
384 ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
385 * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
386 are supported.
387 * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
388 * ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo
389 operations are supported.
390 * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are
391 supported.
392 * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported.
393 * ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the
394 PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for
395 ``pipe_rasterizer_state::fill_front`` and
396 ``pipe_rasterizer_state::fill_back``.
397 * ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in
398 bytes, or 0 if sparse buffers are not supported. The page size must be at
399 most 64KB.
400 * ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as
401 the SUBGROUP_* semantics are supported.
402 * ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
403 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation
404 shader outputs.
405 * ``PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX``: Whether a buffer with just
406 PIPE_BIND_CONSTANT_BUFFER can be legally passed to set_vertex_buffers.
407 * ``PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION``: As the name says.
408 * ``PIPE_CAP_POST_DEPTH_COVERAGE``: whether
409 ``TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE`` is supported.
410 * ``PIPE_CAP_BINDLESS_TEXTURE``: Whether bindless texture operations are
411 supported.
412 * ``PIPE_CAP_NIR_SAMPLERS_AS_DEREF``: Whether NIR tex instructions should
413 reference texture and sampler as NIR derefs instead of by indices.
414 * ``PIPE_CAP_QUERY_SO_OVERFLOW``: Whether the
415 ``PIPE_QUERY_SO_OVERFLOW_PREDICATE`` and
416 ``PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE`` query types are supported. Note that
417 for a driver that does not support multiple output streams (i.e.,
418 ``PIPE_CAP_MAX_VERTEX_STREAMS`` is 1), both query types are identical.
419 * ``PIPE_CAP_MEMOBJ``: Whether operations on memory objects are supported.
420 * ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports ``TGSI_OPCODE_LOAD`` use
421 with constant buffers.
422 * ``PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS``: Any TGSI register can be used as
423 an address for indirect register indexing.
424 * ``PIPE_CAP_TILE_RASTER_ORDER``: Whether the driver supports
425 GL_MESA_tile_raster_order, using the tile_raster_order_* fields in
426 pipe_rasterizer_state.
427 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
428 output resources (images + buffers + fragment outputs). If 0 the state
429 tracker works it out.
430 * ``PIPE_CAP_FRAMEBUFFER_MSAA_CONSTRAINTS``: This determines limitations
431 on the number of samples that framebuffer attachments can have.
432 Possible values:
433 0: color.nr_samples == zs.nr_samples == color.nr_storage_samples
434 (standard MSAA quality)
435 1: color.nr_samples >= zs.nr_samples == color.nr_storage_samples
436 (enhanced MSAA quality)
437 2: color.nr_samples >= zs.nr_samples >= color.nr_storage_samples
438 (full flexibility in tuning MSAA quality and performance)
439 All color attachments must have the same number of samples and the same
440 number of storage samples.
441 * ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``:
442 Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf
443 module needs this for optimal performance in workstation applications.
444 * ``PIPE_CAP_CONTEXT_PRIORITY_MASK``: For drivers that support per-context
445 priorities, this returns a bitmask of ``PIPE_CONTEXT_PRIORITY_x`` for the
446 supported priority levels. A driver that does not support prioritized
447 contexts can return 0.
448 * ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores
449 using fence_server_signal().
450 * ``PIPE_CAP_CONSTBUF0_FLAGS``: The bits of pipe_resource::flags that must be
451 set when binding that buffer as constant buffer 0. If the buffer doesn't have
452 those bits set, pipe_context::set_constant_buffer(.., 0, ..) is ignored
453 by the driver, and the driver can throw assertion failures.
454 * ``PIPE_CAP_PACKED_UNIFORMS``: True if the driver supports packed uniforms
455 as opposed to padding to vec4s.
456 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_TRIANGLES``: Whether the
457 ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for triangles.
458 The post-snap mode means the conservative rasterization occurs after
459 the conversion from floating-point to fixed-point coordinates
460 on the subpixel grid.
461 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_SNAP_POINTS_LINES``: Whether the
462 ``PIPE_CONSERVATIVE_RASTER_POST_SNAP`` mode is supported for points and lines.
463 * ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_TRIANGLES``: Whether the
464 ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for triangles.
465 The pre-snap mode means the conservative rasterization occurs before
466 the conversion from floating-point to fixed-point coordinates.
467 * ``PIPE_CAP_CONSERVATIVE_RASTER_PRE_SNAP_POINTS_LINES``: Whether the
468 ``PIPE_CONSERVATIVE_RASTER_PRE_SNAP`` mode is supported for points and lines.
469 * ``PIPE_CAP_CONSERVATIVE_RASTER_POST_DEPTH_COVERAGE``: Whether
470 ``PIPE_CAP_POST_DEPTH_COVERAGE`` works with conservative rasterization.
471 * ``PIPE_CAP_CONSERVATIVE_RASTER_INNER_COVERAGE``: Whether
472 inner_coverage from GL_INTEL_conservative_rasterization is supported.
473 * ``PIPE_CAP_MAX_CONSERVATIVE_RASTER_SUBPIXEL_PRECISION_BIAS``: The maximum
474 subpixel precision bias in bits during conservative rasterization.
475 * ``PIPE_CAP_PROGRAMMABLE_SAMPLE_LOCATIONS``: True is the driver supports
476 programmable sample location through ```get_sample_pixel_grid``` and
477 ```set_sample_locations```.
478 * ``PIPE_CAP_MAX_GS_INVOCATIONS``: Maximum supported value of
479 TGSI_PROPERTY_GS_INVOCATIONS.
480 * ``PIPE_CAP_MAX_SHADER_BUFFER_SIZE``: Maximum supported size for binding
481 with set_shader_buffers.
482 * ``PIPE_CAP_MAX_COMBINED_SHADER_BUFFERS``: Maximum total number of shader
483 buffers. A value of 0 means the sum of all per-shader stage maximums (see
484 ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``).
485 * ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTERS``: Maximum total number of atomic
486 counters. A value of 0 means the default value (MAX_ATOMIC_COUNTERS = 4096).
487 * ``PIPE_CAP_MAX_COMBINED_HW_ATOMIC_COUNTER_BUFFERS``: Maximum total number of
488 atomic counter buffers. A value of 0 means the sum of all per-shader stage
489 maximums (see ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``).
490 * ``PIPE_CAP_MAX_TEXTURE_UPLOAD_MEMORY_BUDGET``: Maximum recommend memory size
491 for all active texture uploads combined. This is a performance hint.
492 0 means no limit.
493 * ``PIPE_CAP_MAX_VERTEX_ELEMENT_SRC_OFFSET``: The maximum supported value for
494 of pipe_vertex_element::src_offset.
495 * ``PIPE_CAP_SURFACE_SAMPLE_COUNT``: Whether the driver
496 supports pipe_surface overrides of resource nr_samples. If set, will
497 enable EXT_multisampled_render_to_texture.
498 * ``PIPE_CAP_TGSI_ATOMFADD``: Atomic floating point adds are supported on
499 images, buffers, and shared memory.
500 * ``PIPE_CAP_RGB_OVERRIDE_DST_ALPHA_BLEND``: True if the driver needs blend state to use zero/one instead of destination alpha for RGB/XRGB formats.
501 * ``PIPE_CAP_GLSL_TESS_LEVELS_AS_INPUTS``: True if the driver wants TESSINNER and TESSOUTER to be inputs (rather than system values) for tessellation evaluation shaders.
502 * ``PIPE_CAP_DEST_SURFACE_SRGB_CONTROL``: Indicates whether the drivers
503 supports switching the format between sRGB and linear for a surface that is
504 used as destination in draw and blit calls.
505 * ``PIPE_CAP_NIR_COMPACT_ARRAYS``: True if the compiler backend supports NIR's compact array feature, for all shader stages.
506 * ``PIPE_CAP_MAX_VARYINGS``: The maximum number of fragment shader
507 varyings. This will generally correspond to
508 ``PIPE_SHADER_CAP_MAX_INPUTS`` for the fragment shader, but in some
509 cases may be a smaller number.
510 * ``PIPE_CAP_COMPUTE_GRID_INFO_LAST_BLOCK``: Whether pipe_grid_info::last_block
511 is implemented by the driver. See struct pipe_grid_info for more details.
512 * ``PIPE_CAP_COMPUTE_SHADER_DERIVATIVE``: True if the driver supports derivatives (and texture lookups with implicit derivatives) in compute shaders.
513 * ``PIPE_CAP_TGSI_SKIP_SHRINK_IO_ARRAYS``: Whether the TGSI pass to shrink IO
514 arrays should be skipped and enforce keeping the declared array sizes instead.
515 A driver might rely on the input mapping that was defined with the original
516 GLSL code.
517 * ``PIPE_CAP_IMAGE_LOAD_FORMATTED``: True if a format for image loads does not need to be specified in the shader IR
518 * ``PIPE_CAP_MAX_FRAMES_IN_FLIGHT``: Maximum number of frames that state
519 trackers should allow to be in flight before throttling pipe_context
520 execution. 0 = throttling is disabled.
521 * ``PIPE_CAP_DMABUF``: Whether Linux DMABUF handles are supported by
522 resource_from_handle and resource_get_handle.
523 * ``PIPE_CAP_PREFER_COMPUTE_BLIT_FOR_MULTIMEDIA``: Whether VDPAU, VAAPI, and
524 OpenMAX should use a compute-based blit instead of pipe_context::blit.
525
526 .. _pipe_capf:
527
528 PIPE_CAPF_*
529 ^^^^^^^^^^^^^^^^
530
531 The floating-point capabilities are:
532
533 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
534 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
535 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
536 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
537 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
538 applied to anisotropically filtered textures.
539 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
540 to filtered textures.
541 * ``PIPE_CAPF_MIN_CONSERVATIVE_RASTER_DILATE``: The minimum conservative rasterization
542 dilation.
543 * ``PIPE_CAPF_MAX_CONSERVATIVE_RASTER_DILATE``: The maximum conservative rasterization
544 dilation.
545 * ``PIPE_CAPF_CONSERVATIVE_RASTER_DILATE_GRANULARITY``: The conservative rasterization
546 dilation granularity for values relative to the minimum dilation.
547
548
549 .. _pipe_shader_cap:
550
551 PIPE_SHADER_CAP_*
552 ^^^^^^^^^^^^^^^^^
553
554 These are per-shader-stage capabitity queries. Different shader stages may
555 support different features.
556
557 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
558 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
559 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
560 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
561 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
562 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
563 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
564 This is valid for all shaders except the fragment shader.
565 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
566 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
567 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
568 only permit binding one constant buffer per shader.
569
570 If a value greater than 0 is returned, the driver can have multiple
571 constant buffers bound to shader stages. The CONST register file is
572 accessed with two-dimensional indices, like in the example below.
573
574 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
575 DCL CONST[3][0] # declare first vector of constbuf 3
576 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
577
578 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
579 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
580 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
581 of the input file is supported.
582 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
583 of the output file is supported.
584 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
585 of the temporary file is supported.
586 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
587 of the constant file is supported.
588 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
589 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
590 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
591 If unsupported, only float opcodes are supported.
592 * ``PIPE_SHADER_CAP_INT64_ATOMICS``: Whether int64 atomic opcodes are supported. The device needs to support add, sub, swap, cmpswap, and, or, xor, min, and max.
593 * ``PIPE_SHADER_CAP_FP16``: Whether half precision floating-point opcodes are supported.
594 If unsupported, half precision ops need to be lowered to full precision.
595 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
596 samplers.
597 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
598 program. It should be one of the ``pipe_shader_ir`` enum values.
599 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
600 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
601 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
602 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
603 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
604 DLDEXP are supported.
605 * ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported.
606 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
607 are supported.
608 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
609 ignore tgsi_declaration_range::Last for shader inputs and outputs.
610 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
611 of iterations that loops are allowed to have to be unrolled. It is only
612 a hint to state trackers. Whether any loops will be unrolled is not
613 guaranteed.
614 * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers
615 (also used to implement atomic counters). Having this be non-0 also
616 implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI
617 opcodes.
618 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
619 program. It should be a mask of ``pipe_shader_ir`` bits.
620 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
621 * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
622 cost than this value should be lowered by the state tracker for better
623 performance. This is a tunable for the GLSL compiler and the behavior is
624 specific to the compiler.
625 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
626 TGSI pass is skipped. This might reduce code size and register pressure if
627 the underlying driver has a real backend compiler.
628 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate,
629 how many HW counters are available for this stage. (0 uses SSBO atomics).
630 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
631 separate, how many atomic counter buffers are available for this stage.
632 * ``PIPE_SHADER_CAP_SCALAR_ISA``: Whether the ISA is a scalar one.
633
634 .. _pipe_compute_cap:
635
636 PIPE_COMPUTE_CAP_*
637 ^^^^^^^^^^^^^^^^^^
638
639 Compute-specific capabilities. They can be queried using
640 pipe_screen::get_compute_param.
641
642 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
643 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
644 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_NATIVE for
645 their preferred IR.
646 Value type: null-terminated string. Shader IR type dependent.
647 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
648 for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
649 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
650 units. Value type: ``uint64_t []``. Shader IR type dependent.
651 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
652 units. Value type: ``uint64_t []``. Shader IR type dependent.
653 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
654 a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
655 This may be less than the product of the components of MAX_BLOCK_SIZE and is
656 usually limited by the number of threads that can be resident simultaneously
657 on a compute unit.
658 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
659 resource. Value type: ``uint64_t``. Shader IR type dependent.
660 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
661 resource. Value type: ``uint64_t``. Shader IR type dependent.
662 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
663 resource. Value type: ``uint64_t``. Shader IR type dependent.
664 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
665 resource. Value type: ``uint64_t``. Shader IR type dependent.
666 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
667 allocation in bytes. Value type: ``uint64_t``.
668 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
669 clock in MHz. Value type: ``uint32_t``
670 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
671 Value type: ``uint32_t``
672 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
673 non-zero means yes, zero means no. Value type: ``uint32_t``
674 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
675 threads. Also known as wavefront size, warp size or SIMD width.
676 * ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space
677 size specified as an unsigned integer value in bits.
678 * ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number
679 of threads that a single block can contain. This is similar to
680 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not
681 known a compile-time but at dispatch-time.
682
683 .. _pipe_bind:
684
685 PIPE_BIND_*
686 ^^^^^^^^^^^
687
688 These flags indicate how a resource will be used and are specified at resource
689 creation time. Resources may be used in different roles
690 during their lifecycle. Bind flags are cumulative and may be combined to create
691 a resource which can be used for multiple things.
692 Depending on the pipe driver's memory management and these bind flags,
693 resources might be created and handled quite differently.
694
695 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
696 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
697 must have this flag set.
698 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
699 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
700 have this flag set.
701 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
702 query whether a device supports blending for a given format.
703 If this flag is set, surface creation may fail if blending is not supported
704 for the specified format. If it is not set, a driver may choose to ignore
705 blending on surfaces with formats that would require emulation.
706 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
707 pipe_screen::flush_front_buffer must have this flag set.
708 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
709 or vertex shader.
710 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
711 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
712 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
713 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
714 * ``PIPE_BIND_CUSTOM``:
715 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
716 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
717 process.
718 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
719 address space of a compute program.
720 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
721 to a shader and can be used with load, store, and atomic instructions.
722 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
723 bound to a shader and can be used with load, store, and atomic instructions.
724 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
725 bound to the compute program as a shader resource.
726 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
727 GPU command processor. It can contain, for example, the arguments to
728 indirect draw calls.
729
730 .. _pipe_usage:
731
732 PIPE_USAGE_*
733 ^^^^^^^^^^^^
734
735 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
736 Note that drivers must always support read and write CPU access at any time
737 no matter which hint they got.
738
739 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
740 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
741 not expected to be mapped or changed (even by the GPU) after the first upload.
742 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
743 uploaded is expected to be used at least several times by the GPU.
744 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
745 uploaded is expected to be used only once by the GPU.
746 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
747
748
749 Methods
750 -------
751
752 XXX to-do
753
754 get_name
755 ^^^^^^^^
756
757 Returns an identifying name for the screen.
758
759 The returned string should remain valid and immutable for the lifetime of
760 pipe_screen.
761
762 get_vendor
763 ^^^^^^^^^^
764
765 Returns the screen vendor.
766
767 The returned string should remain valid and immutable for the lifetime of
768 pipe_screen.
769
770 get_device_vendor
771 ^^^^^^^^^^^^^^^^^
772
773 Returns the actual vendor of the device driving the screen
774 (as opposed to the driver vendor).
775
776 The returned string should remain valid and immutable for the lifetime of
777 pipe_screen.
778
779 .. _get_param:
780
781 get_param
782 ^^^^^^^^^
783
784 Get an integer/boolean screen parameter.
785
786 **param** is one of the :ref:`PIPE_CAP` names.
787
788 .. _get_paramf:
789
790 get_paramf
791 ^^^^^^^^^^
792
793 Get a floating-point screen parameter.
794
795 **param** is one of the :ref:`PIPE_CAPF` names.
796
797 context_create
798 ^^^^^^^^^^^^^^
799
800 Create a pipe_context.
801
802 **priv** is private data of the caller, which may be put to various
803 unspecified uses, typically to do with implementing swapbuffers
804 and/or front-buffer rendering.
805
806 is_format_supported
807 ^^^^^^^^^^^^^^^^^^^
808
809 Determine if a resource in the given format can be used in a specific manner.
810
811 **format** the resource format
812
813 **target** one of the PIPE_TEXTURE_x flags
814
815 **sample_count** the number of samples. 0 and 1 mean no multisampling,
816 the maximum allowed legal value is 32.
817
818 **storage_sample_count** the number of storage samples. This must be <=
819 sample_count. See the documentation of ``pipe_resource::nr_storage_samples``.
820
821 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
822
823 Returns TRUE if all usages can be satisfied.
824
825
826 can_create_resource
827 ^^^^^^^^^^^^^^^^^^^
828
829 Check if a resource can actually be created (but don't actually allocate any
830 memory). This is used to implement OpenGL's proxy textures. Typically, a
831 driver will simply check if the total size of the given resource is less than
832 some limit.
833
834 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
835
836
837 .. _resource_create:
838
839 resource_create
840 ^^^^^^^^^^^^^^^
841
842 Create a new resource from a template.
843 The following fields of the pipe_resource must be specified in the template:
844
845 **target** one of the pipe_texture_target enums.
846 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
847 Modern APIs allow using buffers as shader resources.
848
849 **format** one of the pipe_format enums.
850
851 **width0** the width of the base mip level of the texture or size of the buffer.
852
853 **height0** the height of the base mip level of the texture
854 (1 for 1D or 1D array textures).
855
856 **depth0** the depth of the base mip level of the texture
857 (1 for everything else).
858
859 **array_size** the array size for 1D and 2D array textures.
860 For cube maps this must be 6, for other textures 1.
861
862 **last_level** the last mip map level present.
863
864 **nr_samples**: Number of samples determining quality, driving the rasterizer,
865 shading, and framebuffer. It is the number of samples seen by the whole
866 graphics pipeline. 0 and 1 specify a resource which isn't multisampled.
867
868 **nr_storage_samples**: Only color buffers can set this lower than nr_samples.
869 Multiple samples within a pixel can have the same color. ``nr_storage_samples``
870 determines how many slots for different colors there are per pixel.
871 If there are not enough slots to store all sample colors, some samples will
872 have an undefined color (called "undefined samples").
873
874 The resolve blit behavior is driver-specific, but can be one of these two:
875 1. Only defined samples will be averaged. Undefined samples will be ignored.
876 2. Undefined samples will be approximated by looking at surrounding defined
877 samples (even in different pixels).
878
879 Blits and MSAA texturing: If the sample being fetched is undefined, one of
880 the defined samples is returned instead.
881
882 Sample shading (``set_min_samples``) will operate at a sample frequency that
883 is at most ``nr_storage_samples``. Greater ``min_samples`` values will be
884 replaced by ``nr_storage_samples``.
885
886 **usage** one of the :ref:`PIPE_USAGE` flags.
887
888 **bind** bitmask of the :ref:`PIPE_BIND` flags.
889
890 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
891
892
893
894 resource_changed
895 ^^^^^^^^^^^^^^^^
896
897 Mark a resource as changed so derived internal resources will be recreated
898 on next use.
899
900 When importing external images that can't be directly used as texture sampler
901 source, internal copies may have to be created that the hardware can sample
902 from. When those resources are reimported, the image data may have changed, and
903 the previously derived internal resources must be invalidated to avoid sampling
904 from old copies.
905
906
907
908 resource_destroy
909 ^^^^^^^^^^^^^^^^
910
911 Destroy a resource. A resource is destroyed if it has no more references.
912
913
914
915 get_timestamp
916 ^^^^^^^^^^^^^
917
918 Query a timestamp in nanoseconds. The returned value should match
919 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
920 wait for rendering to complete (which cannot be achieved with queries).
921
922
923
924 get_driver_query_info
925 ^^^^^^^^^^^^^^^^^^^^^
926
927 Return a driver-specific query. If the **info** parameter is NULL,
928 the number of available queries is returned. Otherwise, the driver
929 query at the specified **index** is returned in **info**.
930 The function returns non-zero on success.
931 The driver-specific query is described with the pipe_driver_query_info
932 structure.
933
934 get_driver_query_group_info
935 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
936
937 Return a driver-specific query group. If the **info** parameter is NULL,
938 the number of available groups is returned. Otherwise, the driver
939 query group at the specified **index** is returned in **info**.
940 The function returns non-zero on success.
941 The driver-specific query group is described with the
942 pipe_driver_query_group_info structure.
943
944
945
946 get_disk_shader_cache
947 ^^^^^^^^^^^^^^^^^^^^^
948
949 Returns a pointer to a driver-specific on-disk shader cache. If the driver
950 failed to create the cache or does not support an on-disk shader cache NULL is
951 returned. The callback itself may also be NULL if the driver doesn't support
952 an on-disk shader cache.
953
954
955 Thread safety
956 -------------
957
958 Screen methods are required to be thread safe. While gallium rendering
959 contexts are not required to be thread safe, it is required to be safe to use
960 different contexts created with the same screen in different threads without
961 locks. It is also required to be safe using screen methods in a thread, while
962 using one of its contexts in another (without locks).