Merge remote-tracking branch 'mesa-public/master' into vulkan
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_TWO_SIDED_STENCIL``: Whether the stencil test can also affect back-facing
28 polygons.
29 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
30 :ref:`Blend` for more information.
31 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
32 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
33 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
34 bound.
35 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
36 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
37 * ``PIPE_CAP_TEXTURE_SHADOW_MAP``: indicates whether the fragment shader hardware
38 can do the depth texture / Z comparison operation in TEX instructions
39 for shadow testing.
40 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
41 supported.
42 * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
43 for a 2D texture.
44 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
45 for a 3D texture.
46 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
47 for a cubemap.
48 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates with clamp
49 are supported.
50 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
51 from color blend equations, in :ref:`Blend` state.
52 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
53 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
54 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
55 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
56 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
57 masks are supported. If 0, then the first rendertarget's blend mask is
58 replicated across all MRTs.
59 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
60 available. If 0, then the first rendertarget's blend functions affect all
61 MRTs.
62 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
63 layers supported. If 0, the array textures are not supported at all and
64 the ARRAY texture targets are invalid.
65 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
66 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
67 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
68 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
69 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
70 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
71 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
72 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
73 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
74 depth clipping (through pipe_rasterizer_state)
75 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
76 written from a fragment shader.
77 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
78 in the vertex shader.
79 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
80 per-instance vertex attribs.
81 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
82 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
83 flag supported by the driver? If not, the state tracker will insert
84 clamping code into the fragment shaders when needed.
85
86 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
87 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
88 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
89 outputting unclamped vertex colors from a vertex shader. If unsupported,
90 the vertex colors are always clamped. This is the default for DX9 hardware.
91 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
92 clamping vertex colors when they come out of a vertex shader, as specified
93 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
94 the vertex colors are never clamped. This is the default for DX10 hardware.
95 If both clamped and unclamped CAPs are supported, the clamping can be
96 controlled through pipe_rasterizer_state. If the driver cannot do vertex
97 color clamping, the state tracker may insert clamping code into the vertex
98 shader.
99 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
100 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
101 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
102 the flatshade_first setting in ``pipe_rasterizer_state``.
103 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
104 buffers. If not, the state tracker must upload all data which is not in hw
105 resources. If user-space buffers are supported, the driver must also still
106 accept HW resource buffers.
107 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
108 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
109 to 4. If false, there are no restrictions on the offset.
110 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
111 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
112 If false, there are no restrictions on the stride.
113 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
114 a hw limitation. If true, pipe_vertex_element::src_offset must always be
115 aligned to 4. If false, there are no restrictions on src_offset.
116 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
117 compute entry points defined in pipe_context and pipe_screen.
118 * ``PIPE_CAP_USER_INDEX_BUFFERS``: Whether user index buffers are supported.
119 If not, the state tracker must upload all indices which are not in hw
120 resources. If user-space buffers are supported, the driver must also still
121 accept HW resource buffers.
122 * ``PIPE_CAP_USER_CONSTANT_BUFFERS``: Whether user-space constant buffers
123 are supported. If not, the state tracker must put constants into HW
124 resources/buffers. If user-space constant buffers are supported, the
125 driver must still accept HW constant buffers also.
126 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
127 alignment of pipe_constant_buffer::buffer_offset.
128 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
129 pipe_draw_info::start_instance.
130 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
131 the pipe_screen::get_timestamp hook are implemented.
132 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
133 for rendering are also supported for texturing.
134 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
135 expected for a pointer returned by transfer_map if the resource is
136 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
137 always aligned to this value.
138 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
139 alignment for pipe_sampler_view::u.buf.first_element, in bytes.
140 If a driver does not support first/last_element, it should return 0.
141 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
142 If true, the hardware cannot replace arbitrary shader inputs with sprite
143 coordinates and hence the inputs that are desired to be replaceable must
144 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
145 The rasterizer's sprite_coord_enable state therefore also applies to the
146 TEXCOORD semantic.
147 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
148 input that will always be replaced with sprite coordinates.
149 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
150 to use a blit to implement a texture transfer which needs format conversions
151 and swizzling in state trackers. Generally, all hardware drivers with
152 dedicated memory should return 1 and all software rasterizers should return 0.
153 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
154 is supported.
155 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
156 considerations have to be given to the interaction between the border color
157 in the sampler object and the sampler view used with it.
158 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
159 may be affected in undefined ways for any kind of permutational swizzle
160 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
161 in the sampler view.
162 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
163 state should be swizzled manually according to the swizzle in the sampler
164 view it is intended to be used with, or herein undefined results may occur
165 for permutational swizzles.
166 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
167 a buffer sampler view, in bytes.
168 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
169 since they are linked) a driver can support. Returning 0 is equivalent
170 to returning 1 because every driver has to support at least a single
171 viewport/scissor combination.
172 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
173 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
174 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
175 different sizes for fb color/zs attachments. This controls whether
176 ARB_framebuffer_object is provided.
177 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
178 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
179 outputs. Note that the viewport will only be used if multiple viewports are
180 exposed.
181 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
182 output by a single invocation of a geometry shader.
183 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
184 vertex components output by a single invocation of a geometry shader.
185 This is the product of the number of attribute components per vertex and
186 the number of output vertices.
187 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
188 in format that texture gather can operate on. 1 == RED, ALPHA etc,
189 4 == All formats.
190 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
191 hardware implements the SM5 features, component selection,
192 shadow comparison, and run-time offsets.
193 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
194 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
195 for buffers.
196 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
197 supported.
198 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
199 in conjunction with a texture gather opcode.
200 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
201 in conjunction with a texture gather opcode.
202 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
203 shading. The context->set_min_samples function will be expected to be
204 implemented.
205 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
206 accept 4 offsets.
207 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
208 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
209 and viewport transformation.
210 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
211 supported by the geometry shader. If stream-out is supported, this should be
212 at least 1. If stream-out is not supported, this should be 0.
213 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
214 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
215 See pipe_draw_info.
216 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
217 the FINE versions of DDX/DDY.
218 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
219 not available one should return 0xFFFFFFFF.
220 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
221 0xFFFFFFFF if not available.
222 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
223 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
224 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
225 memory and GART.
226 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
227 condition for conditional rendering.
228 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
229 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
230 different than the underlying resource's, as permitted by
231 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
232 cube (array) texture and vice-versa.
233 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
234 pipe_rasterizer_state::clip_halfz being set to true. This is required
235 for enabling ARB_clip_control.
236 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
237 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
238 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
239 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
240 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
241 semantics. Only relevant if geometry shaders are supported.
242 (Currently not possible to query availability of these two semantics outside
243 this, at least BASEVERTEX should be exposed separately too).
244 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
245 for ``pipe_rasterizer_state::offset_clamp``.
246 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
247 a multisampled depth buffer into a single-sampled texture (or depth buffer).
248 Only the first sampled should be copied.
249 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
250 a pipe_resource where an already-existing piece of (malloc'd) user memory
251 is used as its backing storage. In other words, whether the driver can map
252 existing user memory into the device address space for direct device access.
253 The create function is pipe_screen::resource_from_user_memory. The address
254 and size must be page-aligned.
255 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
256 Whether pipe_context::get_device_reset_status is implemented.
257 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
258 How many per-patch outputs and inputs are supported between tessellation
259 control and tessellation evaluation shaders, not counting in TESSINNER and
260 TESSOUTER. The minimum allowed value for OpenGL is 30.
261 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
262 magnification filters are supported with single-precision floating-point
263 textures.
264 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
265 magnification filters are supported with half-precision floating-point
266 textures.
267 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
268 bounds_max states of pipe_depth_stencil_alpha_state behave according
269 to the GL_EXT_depth_bounds_test specification.
270 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
271 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
272 interpolation for all fragment shader inputs if
273 pipe_rasterizer_state::force_persample_interp is set. This is only used
274 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
275 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
276 GL4 hardware will likely need to emulate it with a shader variant, or by
277 selecting the interpolation weights with a conditional assignment
278 in the shader.
279 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
280 pipe_context.
281 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
282 Whether copying between compressed and plain formats is supported where
283 a compressed block is copied to/from a plain pixel of the same size.
284 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
285 available in contexts.
286
287
288 .. _pipe_capf:
289
290 PIPE_CAPF_*
291 ^^^^^^^^^^^^^^^^
292
293 The floating-point capabilities are:
294
295 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
296 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
297 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
298 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
299 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
300 applied to anisotropically filtered textures.
301 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
302 to filtered textures.
303 * ``PIPE_CAPF_GUARD_BAND_LEFT``,
304 ``PIPE_CAPF_GUARD_BAND_TOP``,
305 ``PIPE_CAPF_GUARD_BAND_RIGHT``,
306 ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
307
308
309 .. _pipe_shader_cap:
310
311 PIPE_SHADER_CAP_*
312 ^^^^^^^^^^^^^^^^^
313
314 These are per-shader-stage capabitity queries. Different shader stages may
315 support different features.
316
317 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
318 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
319 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
320 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
321 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
322 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
323 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
324 This is valid for all shaders except the fragment shader.
325 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
326 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
327 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
328 only permit binding one constant buffer per shader, and the shaders will
329 not permit two-dimensional access to constants.
330
331 If a value greater than 0 is returned, the driver can have multiple
332 constant buffers bound to shader stages. The CONST register file can
333 be accessed with two-dimensional indices, like in the example below.
334
335 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
336 DCL CONST[3][0] # declare first vector of constbuf 3
337 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
338
339 For backwards compatibility, one-dimensional access to CONST register
340 file is still supported. In that case, the constbuf index is assumed
341 to be 0.
342
343 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
344 * ``PIPE_SHADER_CAP_MAX_PREDS``: The maximum number of predicate registers.
345 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
346 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
347 of the input file is supported.
348 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
349 of the output file is supported.
350 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
351 of the temporary file is supported.
352 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
353 of the constant file is supported.
354 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
355 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
356 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
357 If unsupported, only float opcodes are supported.
358 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
359 samplers.
360 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
361 program. It should be one of the ``pipe_shader_ir`` enum values.
362 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
363 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
364 * ``PIPE_SHADER_CAP_DOUBLES``: Whether double precision floating-point
365 operations are supported.
366 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
367 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
368 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
369 DLDEXP are supported.
370 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
371 are supported.
372 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
373 ignore tgsi_declaration_range::Last for shader inputs and outputs.
374 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
375 of iterations that loops are allowed to have to be unrolled. It is only
376 a hint to state trackers. Whether any loops will be unrolled is not
377 guaranteed.
378
379
380 .. _pipe_compute_cap:
381
382 PIPE_COMPUTE_CAP_*
383 ^^^^^^^^^^^^^^^^^^
384
385 Compute-specific capabilities. They can be queried using
386 pipe_screen::get_compute_param.
387
388 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
389 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
390 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_LLVM
391 or PIPE_SHADER_IR_NATIVE for their preferred IR.
392 Value type: null-terminated string.
393 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
394 for grid and block coordinates. Value type: ``uint64_t``.
395 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
396 units. Value type: ``uint64_t []``.
397 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
398 units. Value type: ``uint64_t []``.
399 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
400 a single block can contain. Value type: ``uint64_t``.
401 This may be less than the product of the components of MAX_BLOCK_SIZE and is
402 usually limited by the number of threads that can be resident simultaneously
403 on a compute unit.
404 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
405 resource. Value type: ``uint64_t``.
406 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
407 resource. Value type: ``uint64_t``.
408 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
409 resource. Value type: ``uint64_t``.
410 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
411 resource. Value type: ``uint64_t``.
412 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
413 allocation in bytes. Value type: ``uint64_t``.
414 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
415 clock in MHz. Value type: ``uint32_t``
416 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
417 Value type: ``uint32_t``
418 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
419 non-zero means yes, zero means no. Value type: ``uint32_t``
420 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
421 threads. Also known as wavefront size, warp size or SIMD width.
422
423 .. _pipe_bind:
424
425 PIPE_BIND_*
426 ^^^^^^^^^^^
427
428 These flags indicate how a resource will be used and are specified at resource
429 creation time. Resources may be used in different roles
430 during their lifecycle. Bind flags are cumulative and may be combined to create
431 a resource which can be used for multiple things.
432 Depending on the pipe driver's memory management and these bind flags,
433 resources might be created and handled quite differently.
434
435 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
436 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
437 must have this flag set.
438 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
439 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
440 have this flag set.
441 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
442 query whether a device supports blending for a given format.
443 If this flag is set, surface creation may fail if blending is not supported
444 for the specified format. If it is not set, a driver may choose to ignore
445 blending on surfaces with formats that would require emulation.
446 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
447 pipe_screen::flush_front_buffer must have this flag set.
448 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
449 or vertex shader.
450 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
451 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
452 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
453 * ``PIPE_BIND_TRANSFER_WRITE``: A transfer object which will be written to.
454 * ``PIPE_BIND_TRANSFER_READ``: A transfer object which will be read from.
455 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
456 * ``PIPE_BIND_CUSTOM``:
457 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
458 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
459 process.
460 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
461 address space of a compute program.
462 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
463 to a shader and can be used with load, store, and atomic instructions.
464 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
465 bound to a shader and can be used with load, store, and atomic instructions.
466 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
467 bound to the compute program as a shader resource.
468 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
469 GPU command processor. It can contain, for example, the arguments to
470 indirect draw calls.
471
472 .. _pipe_usage:
473
474 PIPE_USAGE_*
475 ^^^^^^^^^^^^
476
477 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
478 Note that drivers must always support read and write CPU access at any time
479 no matter which hint they got.
480
481 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
482 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
483 not expected to be mapped or changed (even by the GPU) after the first upload.
484 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
485 uploaded is expected to be used at least several times by the GPU.
486 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
487 uploaded is expected to be used only once by the GPU.
488 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
489
490
491 Methods
492 -------
493
494 XXX to-do
495
496 get_name
497 ^^^^^^^^
498
499 Returns an identifying name for the screen.
500
501 get_vendor
502 ^^^^^^^^^^
503
504 Returns the screen vendor.
505
506 get_device_vendor
507 ^^^^^^^^^^^^^^^^^
508
509 Returns the actual vendor of the device driving the screen
510 (as opposed to the driver vendor).
511
512 .. _get_param:
513
514 get_param
515 ^^^^^^^^^
516
517 Get an integer/boolean screen parameter.
518
519 **param** is one of the :ref:`PIPE_CAP` names.
520
521 .. _get_paramf:
522
523 get_paramf
524 ^^^^^^^^^^
525
526 Get a floating-point screen parameter.
527
528 **param** is one of the :ref:`PIPE_CAP` names.
529
530 context_create
531 ^^^^^^^^^^^^^^
532
533 Create a pipe_context.
534
535 **priv** is private data of the caller, which may be put to various
536 unspecified uses, typically to do with implementing swapbuffers
537 and/or front-buffer rendering.
538
539 is_format_supported
540 ^^^^^^^^^^^^^^^^^^^
541
542 Determine if a resource in the given format can be used in a specific manner.
543
544 **format** the resource format
545
546 **target** one of the PIPE_TEXTURE_x flags
547
548 **sample_count** the number of samples. 0 and 1 mean no multisampling,
549 the maximum allowed legal value is 32.
550
551 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
552
553 **geom_flags** is a bitmask of PIPE_TEXTURE_GEOM_x flags.
554
555 Returns TRUE if all usages can be satisfied.
556
557
558 can_create_resource
559 ^^^^^^^^^^^^^^^^^^^
560
561 Check if a resource can actually be created (but don't actually allocate any
562 memory). This is used to implement OpenGL's proxy textures. Typically, a
563 driver will simply check if the total size of the given resource is less than
564 some limit.
565
566 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
567
568
569 .. _resource_create:
570
571 resource_create
572 ^^^^^^^^^^^^^^^
573
574 Create a new resource from a template.
575 The following fields of the pipe_resource must be specified in the template:
576
577 **target** one of the pipe_texture_target enums.
578 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
579 Modern APIs allow using buffers as shader resources.
580
581 **format** one of the pipe_format enums.
582
583 **width0** the width of the base mip level of the texture or size of the buffer.
584
585 **height0** the height of the base mip level of the texture
586 (1 for 1D or 1D array textures).
587
588 **depth0** the depth of the base mip level of the texture
589 (1 for everything else).
590
591 **array_size** the array size for 1D and 2D array textures.
592 For cube maps this must be 6, for other textures 1.
593
594 **last_level** the last mip map level present.
595
596 **nr_samples** the nr of msaa samples. 0 (or 1) specifies a resource
597 which isn't multisampled.
598
599 **usage** one of the PIPE_USAGE flags.
600
601 **bind** bitmask of the PIPE_BIND flags.
602
603 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
604
605
606
607 resource_destroy
608 ^^^^^^^^^^^^^^^^
609
610 Destroy a resource. A resource is destroyed if it has no more references.
611
612
613
614 get_timestamp
615 ^^^^^^^^^^^^^
616
617 Query a timestamp in nanoseconds. The returned value should match
618 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
619 wait for rendering to complete (which cannot be achieved with queries).
620
621
622
623 get_driver_query_info
624 ^^^^^^^^^^^^^^^^^^^^^
625
626 Return a driver-specific query. If the **info** parameter is NULL,
627 the number of available queries is returned. Otherwise, the driver
628 query at the specified **index** is returned in **info**.
629 The function returns non-zero on success.
630 The driver-specific query is described with the pipe_driver_query_info
631 structure.
632
633 get_driver_query_group_info
634 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
635
636 Return a driver-specific query group. If the **info** parameter is NULL,
637 the number of available groups is returned. Otherwise, the driver
638 query group at the specified **index** is returned in **info**.
639 The function returns non-zero on success.
640 The driver-specific query group is described with the
641 pipe_driver_query_group_info structure.