gallium/st/clover: remove unused PIPE_SHADER_IR_LLVM
[mesa.git] / src / gallium / docs / source / screen.rst
1 .. _screen:
2
3 Screen
4 ======
5
6 A screen is an object representing the context-independent part of a device.
7
8 Flags and enumerations
9 ----------------------
10
11 XXX some of these don't belong in this section.
12
13
14 .. _pipe_cap:
15
16 PIPE_CAP_*
17 ^^^^^^^^^^
18
19 Capability queries return information about the features and limits of the
20 driver/GPU. For floating-point values, use :ref:`get_paramf`, and for boolean
21 or integer values, use :ref:`get_param`.
22
23 The integer capabilities:
24
25 * ``PIPE_CAP_NPOT_TEXTURES``: Whether :term:`NPOT` textures may have repeat modes,
26 normalized coordinates, and mipmaps.
27 * ``PIPE_CAP_MAX_DUAL_SOURCE_RENDER_TARGETS``: How many dual-source blend RTs are support.
28 :ref:`Blend` for more information.
29 * ``PIPE_CAP_ANISOTROPIC_FILTER``: Whether textures can be filtered anisotropically.
30 * ``PIPE_CAP_POINT_SPRITE``: Whether point sprites are available.
31 * ``PIPE_CAP_MAX_RENDER_TARGETS``: The maximum number of render targets that may be
32 bound.
33 * ``PIPE_CAP_OCCLUSION_QUERY``: Whether occlusion queries are available.
34 * ``PIPE_CAP_QUERY_TIME_ELAPSED``: Whether PIPE_QUERY_TIME_ELAPSED queries are available.
35 * ``PIPE_CAP_TEXTURE_SWIZZLE``: Whether swizzling through sampler views is
36 supported.
37 * ``PIPE_CAP_MAX_TEXTURE_2D_LEVELS``: The maximum number of mipmap levels available
38 for a 2D texture.
39 * ``PIPE_CAP_MAX_TEXTURE_3D_LEVELS``: The maximum number of mipmap levels available
40 for a 3D texture.
41 * ``PIPE_CAP_MAX_TEXTURE_CUBE_LEVELS``: The maximum number of mipmap levels available
42 for a cubemap.
43 * ``PIPE_CAP_TEXTURE_MIRROR_CLAMP``: Whether mirrored texture coordinates with clamp
44 are supported.
45 * ``PIPE_CAP_BLEND_EQUATION_SEPARATE``: Whether alpha blend equations may be different
46 from color blend equations, in :ref:`Blend` state.
47 * ``PIPE_CAP_SM3``: Whether the vertex shader and fragment shader support equivalent
48 opcodes to the Shader Model 3 specification. XXX oh god this is horrible
49 * ``PIPE_CAP_MAX_STREAM_OUTPUT_BUFFERS``: The maximum number of stream buffers.
50 * ``PIPE_CAP_PRIMITIVE_RESTART``: Whether primitive restart is supported.
51 * ``PIPE_CAP_INDEP_BLEND_ENABLE``: Whether per-rendertarget blend enabling and channel
52 masks are supported. If 0, then the first rendertarget's blend mask is
53 replicated across all MRTs.
54 * ``PIPE_CAP_INDEP_BLEND_FUNC``: Whether per-rendertarget blend functions are
55 available. If 0, then the first rendertarget's blend functions affect all
56 MRTs.
57 * ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``: The maximum number of texture array
58 layers supported. If 0, the array textures are not supported at all and
59 the ARRAY texture targets are invalid.
60 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_UPPER_LEFT``: Whether the TGSI property
61 FS_COORD_ORIGIN with value UPPER_LEFT is supported.
62 * ``PIPE_CAP_TGSI_FS_COORD_ORIGIN_LOWER_LEFT``: Whether the TGSI property
63 FS_COORD_ORIGIN with value LOWER_LEFT is supported.
64 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_HALF_INTEGER``: Whether the TGSI
65 property FS_COORD_PIXEL_CENTER with value HALF_INTEGER is supported.
66 * ``PIPE_CAP_TGSI_FS_COORD_PIXEL_CENTER_INTEGER``: Whether the TGSI
67 property FS_COORD_PIXEL_CENTER with value INTEGER is supported.
68 * ``PIPE_CAP_DEPTH_CLIP_DISABLE``: Whether the driver is capable of disabling
69 depth clipping (through pipe_rasterizer_state)
70 * ``PIPE_CAP_SHADER_STENCIL_EXPORT``: Whether a stencil reference value can be
71 written from a fragment shader.
72 * ``PIPE_CAP_TGSI_INSTANCEID``: Whether TGSI_SEMANTIC_INSTANCEID is supported
73 in the vertex shader.
74 * ``PIPE_CAP_VERTEX_ELEMENT_INSTANCE_DIVISOR``: Whether the driver supports
75 per-instance vertex attribs.
76 * ``PIPE_CAP_FRAGMENT_COLOR_CLAMPED``: Whether fragment color clamping is
77 supported. That is, is the pipe_rasterizer_state::clamp_fragment_color
78 flag supported by the driver? If not, the state tracker will insert
79 clamping code into the fragment shaders when needed.
80
81 * ``PIPE_CAP_MIXED_COLORBUFFER_FORMATS``: Whether mixed colorbuffer formats are
82 supported, e.g. RGBA8 and RGBA32F as the first and second colorbuffer, resp.
83 * ``PIPE_CAP_VERTEX_COLOR_UNCLAMPED``: Whether the driver is capable of
84 outputting unclamped vertex colors from a vertex shader. If unsupported,
85 the vertex colors are always clamped. This is the default for DX9 hardware.
86 * ``PIPE_CAP_VERTEX_COLOR_CLAMPED``: Whether the driver is capable of
87 clamping vertex colors when they come out of a vertex shader, as specified
88 by the pipe_rasterizer_state::clamp_vertex_color flag. If unsupported,
89 the vertex colors are never clamped. This is the default for DX10 hardware.
90 If both clamped and unclamped CAPs are supported, the clamping can be
91 controlled through pipe_rasterizer_state. If the driver cannot do vertex
92 color clamping, the state tracker may insert clamping code into the vertex
93 shader.
94 * ``PIPE_CAP_GLSL_FEATURE_LEVEL``: Whether the driver supports features
95 equivalent to a specific GLSL version. E.g. for GLSL 1.3, report 130.
96 * ``PIPE_CAP_QUADS_FOLLOW_PROVOKING_VERTEX_CONVENTION``: Whether quads adhere to
97 the flatshade_first setting in ``pipe_rasterizer_state``.
98 * ``PIPE_CAP_USER_VERTEX_BUFFERS``: Whether the driver supports user vertex
99 buffers. If not, the state tracker must upload all data which is not in hw
100 resources. If user-space buffers are supported, the driver must also still
101 accept HW resource buffers.
102 * ``PIPE_CAP_VERTEX_BUFFER_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
103 limitation. If true, pipe_vertex_buffer::buffer_offset must always be aligned
104 to 4. If false, there are no restrictions on the offset.
105 * ``PIPE_CAP_VERTEX_BUFFER_STRIDE_4BYTE_ALIGNED_ONLY``: This CAP describes a hw
106 limitation. If true, pipe_vertex_buffer::stride must always be aligned to 4.
107 If false, there are no restrictions on the stride.
108 * ``PIPE_CAP_VERTEX_ELEMENT_SRC_OFFSET_4BYTE_ALIGNED_ONLY``: This CAP describes
109 a hw limitation. If true, pipe_vertex_element::src_offset must always be
110 aligned to 4. If false, there are no restrictions on src_offset.
111 * ``PIPE_CAP_COMPUTE``: Whether the implementation supports the
112 compute entry points defined in pipe_context and pipe_screen.
113 * ``PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT``: Describes the required
114 alignment of pipe_constant_buffer::buffer_offset.
115 * ``PIPE_CAP_START_INSTANCE``: Whether the driver supports
116 pipe_draw_info::start_instance.
117 * ``PIPE_CAP_QUERY_TIMESTAMP``: Whether PIPE_QUERY_TIMESTAMP and
118 the pipe_screen::get_timestamp hook are implemented.
119 * ``PIPE_CAP_TEXTURE_MULTISAMPLE``: Whether all MSAA resources supported
120 for rendering are also supported for texturing.
121 * ``PIPE_CAP_MIN_MAP_BUFFER_ALIGNMENT``: The minimum alignment that should be
122 expected for a pointer returned by transfer_map if the resource is
123 PIPE_BUFFER. In other words, the pointer returned by transfer_map is
124 always aligned to this value.
125 * ``PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT``: Describes the required
126 alignment for pipe_sampler_view::u.buf.offset, in bytes.
127 If a driver does not support offset/size, it should return 0.
128 * ``PIPE_CAP_BUFFER_SAMPLER_VIEW_RGBA_ONLY``: Whether the driver only
129 supports R, RG, RGB and RGBA formats for PIPE_BUFFER sampler views.
130 When this is the case it should be assumed that the swizzle parameters
131 in the sampler view have no effect.
132 * ``PIPE_CAP_TGSI_TEXCOORD``: This CAP describes a hw limitation.
133 If true, the hardware cannot replace arbitrary shader inputs with sprite
134 coordinates and hence the inputs that are desired to be replaceable must
135 be declared with TGSI_SEMANTIC_TEXCOORD instead of TGSI_SEMANTIC_GENERIC.
136 The rasterizer's sprite_coord_enable state therefore also applies to the
137 TEXCOORD semantic.
138 Also, TGSI_SEMANTIC_PCOORD becomes available, which labels a fragment shader
139 input that will always be replaced with sprite coordinates.
140 * ``PIPE_CAP_PREFER_BLIT_BASED_TEXTURE_TRANSFER``: Whether it is preferable
141 to use a blit to implement a texture transfer which needs format conversions
142 and swizzling in state trackers. Generally, all hardware drivers with
143 dedicated memory should return 1 and all software rasterizers should return 0.
144 * ``PIPE_CAP_QUERY_PIPELINE_STATISTICS``: Whether PIPE_QUERY_PIPELINE_STATISTICS
145 is supported.
146 * ``PIPE_CAP_TEXTURE_BORDER_COLOR_QUIRK``: Bitmask indicating whether special
147 considerations have to be given to the interaction between the border color
148 in the sampler object and the sampler view used with it.
149 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_R600 is set, the border color
150 may be affected in undefined ways for any kind of permutational swizzle
151 (any swizzle XYZW where X/Y/Z/W are not ZERO, ONE, or R/G/B/A respectively)
152 in the sampler view.
153 If PIPE_QUIRK_TEXTURE_BORDER_COLOR_SWIZZLE_NV50 is set, the border color
154 state should be swizzled manually according to the swizzle in the sampler
155 view it is intended to be used with, or herein undefined results may occur
156 for permutational swizzles.
157 * ``PIPE_CAP_MAX_TEXTURE_BUFFER_SIZE``: The maximum accessible size with
158 a buffer sampler view, in texels.
159 * ``PIPE_CAP_MAX_VIEWPORTS``: The maximum number of viewports (and scissors
160 since they are linked) a driver can support. Returning 0 is equivalent
161 to returning 1 because every driver has to support at least a single
162 viewport/scissor combination.
163 * ``PIPE_CAP_ENDIANNESS``:: The endianness of the device. Either
164 PIPE_ENDIAN_BIG or PIPE_ENDIAN_LITTLE.
165 * ``PIPE_CAP_MIXED_FRAMEBUFFER_SIZES``: Whether it is allowed to have
166 different sizes for fb color/zs attachments. This controls whether
167 ARB_framebuffer_object is provided.
168 * ``PIPE_CAP_TGSI_VS_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
169 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as vertex shader
170 outputs. Note that the viewport will only be used if multiple viewports are
171 exposed.
172 * ``PIPE_CAP_MAX_GEOMETRY_OUTPUT_VERTICES``: The maximum number of vertices
173 output by a single invocation of a geometry shader.
174 * ``PIPE_CAP_MAX_GEOMETRY_TOTAL_OUTPUT_COMPONENTS``: The maximum number of
175 vertex components output by a single invocation of a geometry shader.
176 This is the product of the number of attribute components per vertex and
177 the number of output vertices.
178 * ``PIPE_CAP_MAX_TEXTURE_GATHER_COMPONENTS``: Max number of components
179 in format that texture gather can operate on. 1 == RED, ALPHA etc,
180 4 == All formats.
181 * ``PIPE_CAP_TEXTURE_GATHER_SM5``: Whether the texture gather
182 hardware implements the SM5 features, component selection,
183 shadow comparison, and run-time offsets.
184 * ``PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT``: Whether
185 PIPE_TRANSFER_PERSISTENT and PIPE_TRANSFER_COHERENT are supported
186 for buffers.
187 * ``PIPE_CAP_TEXTURE_QUERY_LOD``: Whether the ``LODQ`` instruction is
188 supported.
189 * ``PIPE_CAP_MIN_TEXTURE_GATHER_OFFSET``: The minimum offset that can be used
190 in conjunction with a texture gather opcode.
191 * ``PIPE_CAP_MAX_TEXTURE_GATHER_OFFSET``: The maximum offset that can be used
192 in conjunction with a texture gather opcode.
193 * ``PIPE_CAP_SAMPLE_SHADING``: Whether there is support for per-sample
194 shading. The context->set_min_samples function will be expected to be
195 implemented.
196 * ``PIPE_CAP_TEXTURE_GATHER_OFFSETS``: Whether the ``TG4`` instruction can
197 accept 4 offsets.
198 * ``PIPE_CAP_TGSI_VS_WINDOW_SPACE_POSITION``: Whether
199 TGSI_PROPERTY_VS_WINDOW_SPACE_POSITION is supported, which disables clipping
200 and viewport transformation.
201 * ``PIPE_CAP_MAX_VERTEX_STREAMS``: The maximum number of vertex streams
202 supported by the geometry shader. If stream-out is supported, this should be
203 at least 1. If stream-out is not supported, this should be 0.
204 * ``PIPE_CAP_DRAW_INDIRECT``: Whether the driver supports taking draw arguments
205 { count, instance_count, start, index_bias } from a PIPE_BUFFER resource.
206 See pipe_draw_info.
207 * ``PIPE_CAP_MULTI_DRAW_INDIRECT``: Whether the driver supports
208 pipe_draw_info::indirect_stride and ::indirect_count
209 * ``PIPE_CAP_MULTI_DRAW_INDIRECT_PARAMS``: Whether the driver supports
210 taking the number of indirect draws from a separate parameter
211 buffer, see pipe_draw_indirect_info::indirect_draw_count.
212 * ``PIPE_CAP_TGSI_FS_FINE_DERIVATIVE``: Whether the fragment shader supports
213 the FINE versions of DDX/DDY.
214 * ``PIPE_CAP_VENDOR_ID``: The vendor ID of the underlying hardware. If it's
215 not available one should return 0xFFFFFFFF.
216 * ``PIPE_CAP_DEVICE_ID``: The device ID (PCI ID) of the underlying hardware.
217 0xFFFFFFFF if not available.
218 * ``PIPE_CAP_ACCELERATED``: Whether the renderer is hardware accelerated.
219 * ``PIPE_CAP_VIDEO_MEMORY``: The amount of video memory in megabytes.
220 * ``PIPE_CAP_UMA``: If the device has a unified memory architecture or on-card
221 memory and GART.
222 * ``PIPE_CAP_CONDITIONAL_RENDER_INVERTED``: Whether the driver supports inverted
223 condition for conditional rendering.
224 * ``PIPE_CAP_MAX_VERTEX_ATTRIB_STRIDE``: The maximum supported vertex stride.
225 * ``PIPE_CAP_SAMPLER_VIEW_TARGET``: Whether the sampler view's target can be
226 different than the underlying resource's, as permitted by
227 ARB_texture_view. For example a 2d array texture may be reinterpreted as a
228 cube (array) texture and vice-versa.
229 * ``PIPE_CAP_CLIP_HALFZ``: Whether the driver supports the
230 pipe_rasterizer_state::clip_halfz being set to true. This is required
231 for enabling ARB_clip_control.
232 * ``PIPE_CAP_VERTEXID_NOBASE``: If true, the driver only supports
233 TGSI_SEMANTIC_VERTEXID_NOBASE (and not TGSI_SEMANTIC_VERTEXID). This means
234 state trackers for APIs whose vertexIDs are offset by basevertex (such as GL)
235 will need to lower TGSI_SEMANTIC_VERTEXID to TGSI_SEMANTIC_VERTEXID_NOBASE
236 and TGSI_SEMANTIC_BASEVERTEX, so drivers setting this must handle both these
237 semantics. Only relevant if geometry shaders are supported.
238 (BASEVERTEX could be exposed separately too via ``PIPE_CAP_DRAW_PARAMETERS``).
239 * ``PIPE_CAP_POLYGON_OFFSET_CLAMP``: If true, the driver implements support
240 for ``pipe_rasterizer_state::offset_clamp``.
241 * ``PIPE_CAP_MULTISAMPLE_Z_RESOLVE``: Whether the driver supports blitting
242 a multisampled depth buffer into a single-sampled texture (or depth buffer).
243 Only the first sampled should be copied.
244 * ``PIPE_CAP_RESOURCE_FROM_USER_MEMORY``: Whether the driver can create
245 a pipe_resource where an already-existing piece of (malloc'd) user memory
246 is used as its backing storage. In other words, whether the driver can map
247 existing user memory into the device address space for direct device access.
248 The create function is pipe_screen::resource_from_user_memory. The address
249 and size must be page-aligned.
250 * ``PIPE_CAP_DEVICE_RESET_STATUS_QUERY``:
251 Whether pipe_context::get_device_reset_status is implemented.
252 * ``PIPE_CAP_MAX_SHADER_PATCH_VARYINGS``:
253 How many per-patch outputs and inputs are supported between tessellation
254 control and tessellation evaluation shaders, not counting in TESSINNER and
255 TESSOUTER. The minimum allowed value for OpenGL is 30.
256 * ``PIPE_CAP_TEXTURE_FLOAT_LINEAR``: Whether the linear minification and
257 magnification filters are supported with single-precision floating-point
258 textures.
259 * ``PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR``: Whether the linear minification and
260 magnification filters are supported with half-precision floating-point
261 textures.
262 * ``PIPE_CAP_DEPTH_BOUNDS_TEST``: Whether bounds_test, bounds_min, and
263 bounds_max states of pipe_depth_stencil_alpha_state behave according
264 to the GL_EXT_depth_bounds_test specification.
265 * ``PIPE_CAP_TGSI_TXQS``: Whether the `TXQS` opcode is supported
266 * ``PIPE_CAP_FORCE_PERSAMPLE_INTERP``: If the driver can force per-sample
267 interpolation for all fragment shader inputs if
268 pipe_rasterizer_state::force_persample_interp is set. This is only used
269 by GL3-level sample shading (ARB_sample_shading). GL4-level sample shading
270 (ARB_gpu_shader5) doesn't use this. While GL3 hardware has a state for it,
271 GL4 hardware will likely need to emulate it with a shader variant, or by
272 selecting the interpolation weights with a conditional assignment
273 in the shader.
274 * ``PIPE_CAP_SHAREABLE_SHADERS``: Whether shader CSOs can be used by any
275 pipe_context.
276 * ``PIPE_CAP_COPY_BETWEEN_COMPRESSED_AND_PLAIN_FORMATS``:
277 Whether copying between compressed and plain formats is supported where
278 a compressed block is copied to/from a plain pixel of the same size.
279 * ``PIPE_CAP_CLEAR_TEXTURE``: Whether `clear_texture` will be
280 available in contexts.
281 * ``PIPE_CAP_DRAW_PARAMETERS``: Whether ``TGSI_SEMANTIC_BASEVERTEX``,
282 ``TGSI_SEMANTIC_BASEINSTANCE``, and ``TGSI_SEMANTIC_DRAWID`` are
283 supported in vertex shaders.
284 * ``PIPE_CAP_TGSI_PACK_HALF_FLOAT``: Whether the ``UP2H`` and ``PK2H``
285 TGSI opcodes are supported.
286 * ``PIPE_CAP_TGSI_FS_POSITION_IS_SYSVAL``: If state trackers should use
287 a system value for the POSITION fragment shader input.
288 * ``PIPE_CAP_TGSI_FS_FACE_IS_INTEGER_SYSVAL``: If state trackers should use
289 a system value for the FACE fragment shader input.
290 Also, the FACE system value is integer, not float.
291 * ``PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT``: Describes the required
292 alignment for pipe_shader_buffer::buffer_offset, in bytes. Maximum
293 value allowed is 256 (for GL conformance). 0 is only allowed if
294 shader buffers are not supported.
295 * ``PIPE_CAP_INVALIDATE_BUFFER``: Whether the use of ``invalidate_resource``
296 for buffers is supported.
297 * ``PIPE_CAP_GENERATE_MIPMAP``: Indicates whether pipe_context::generate_mipmap
298 is supported.
299 * ``PIPE_CAP_STRING_MARKER``: Whether pipe->emit_string_marker() is supported.
300 * ``PIPE_CAP_SURFACE_REINTERPRET_BLOCKS``: Indicates whether
301 pipe_context::create_surface supports reinterpreting a texture as a surface
302 of a format with different block width/height (but same block size in bits).
303 For example, a compressed texture image can be interpreted as a
304 non-compressed surface whose texels are the same number of bits as the
305 compressed blocks, and vice versa. The width and height of the surface is
306 adjusted appropriately.
307 * ``PIPE_CAP_QUERY_BUFFER_OBJECT``: Driver supports
308 context::get_query_result_resource callback.
309 * ``PIPE_CAP_PCI_GROUP``: Return the PCI segment group number.
310 * ``PIPE_CAP_PCI_BUS``: Return the PCI bus number.
311 * ``PIPE_CAP_PCI_DEVICE``: Return the PCI device number.
312 * ``PIPE_CAP_PCI_FUNCTION``: Return the PCI function number.
313 * ``PIPE_CAP_FRAMEBUFFER_NO_ATTACHMENT``:
314 If non-zero, rendering to framebuffers with no surface attachments
315 is supported. The context->is_format_supported function will be expected
316 to be implemented with PIPE_FORMAT_NONE yeilding the MSAA modes the hardware
317 supports. N.B., The maximum number of layers supported for rasterizing a
318 primitive on a layer is obtained from ``PIPE_CAP_MAX_TEXTURE_ARRAY_LAYERS``
319 even though it can be larger than the number of layers supported by either
320 rendering or textures.
321 * ``PIPE_CAP_ROBUST_BUFFER_ACCESS_BEHAVIOR``: Implementation uses bounds
322 checking on resource accesses by shader if the context is created with
323 PIPE_CONTEXT_ROBUST_BUFFER_ACCESS. See the ARB_robust_buffer_access_behavior
324 extension for information on the required behavior for out of bounds accesses
325 and accesses to unbound resources.
326 * ``PIPE_CAP_CULL_DISTANCE``: Whether the driver supports the arb_cull_distance
327 extension and thus implements proper support for culling planes.
328 * ``PIPE_CAP_PRIMITIVE_RESTART_FOR_PATCHES``: Whether primitive restart is
329 supported for patch primitives.
330 * ``PIPE_CAP_TGSI_VOTE``: Whether the ``VOTE_*`` ops can be used in shaders.
331 * ``PIPE_CAP_MAX_WINDOW_RECTANGLES``: The maxium number of window rectangles
332 supported in ``set_window_rectangles``.
333 * ``PIPE_CAP_POLYGON_OFFSET_UNITS_UNSCALED``: If true, the driver implements support
334 for ``pipe_rasterizer_state::offset_units_unscaled``.
335 * ``PIPE_CAP_VIEWPORT_SUBPIXEL_BITS``: Number of bits of subpixel precision for
336 floating point viewport bounds.
337 * ``PIPE_CAP_MIXED_COLOR_DEPTH_BITS``: Whether there is non-fallback
338 support for color/depth format combinations that use a different
339 number of bits. For the purpose of this cap, Z24 is treated as
340 32-bit. If set to off, that means that a B5G6R5 + Z24 or RGBA8 + Z16
341 combination will require a driver fallback, and should not be
342 advertised in the GLX/EGL config list.
343 * ``PIPE_CAP_TGSI_ARRAY_COMPONENTS``: If true, the driver interprets the
344 UsageMask of input and output declarations and allows declaring arrays
345 in overlapping ranges. The components must be a contiguous range, e.g. a
346 UsageMask of xy or yzw is allowed, but xz or yw isn't. Declarations with
347 overlapping locations must have matching semantic names and indices, and
348 equal interpolation qualifiers.
349 Components may overlap, notably when the gaps in an array of dvec3 are
350 filled in.
351 * ``PIPE_CAP_STREAM_OUTPUT_INTERLEAVE_BUFFERS``: Whether interleaved stream
352 output mode is able to interleave across buffers. This is required for
353 ARB_transform_feedback3.
354 * ``PIPE_CAP_TGSI_CAN_READ_OUTPUTS``: Whether every TGSI shader stage can read
355 from the output file.
356 * ``PIPE_CAP_GLSL_OPTIMIZE_CONSERVATIVELY``: Tell the GLSL compiler to use
357 the minimum amount of optimizations just to be able to do all the linking
358 and lowering.
359 * ``PIPE_CAP_TGSI_FS_FBFETCH``: Whether a fragment shader can use the FBFETCH
360 opcode to retrieve the current value in the framebuffer.
361 * ``PIPE_CAP_TGSI_MUL_ZERO_WINS``: Whether TGSI shaders support the
362 ``TGSI_PROPERTY_MUL_ZERO_WINS`` shader property.
363 * ``PIPE_CAP_DOUBLES``: Whether double precision floating-point operations
364 are supported.
365 * ``PIPE_CAP_INT64``: Whether 64-bit integer operations are supported.
366 * ``PIPE_CAP_INT64_DIVMOD``: Whether 64-bit integer division/modulo
367 operations are supported.
368 * ``PIPE_CAP_TGSI_TEX_TXF_LZ``: Whether TEX_LZ and TXF_LZ opcodes are
369 supported.
370 * ``PIPE_CAP_TGSI_CLOCK``: Whether the CLOCK opcode is supported.
371 * ``PIPE_CAP_POLYGON_MODE_FILL_RECTANGLE``: Whether the
372 PIPE_POLYGON_MODE_FILL_RECTANGLE mode is supported for
373 ``pipe_rasterizer_state::fill_front`` and
374 ``pipe_rasterizer_state::fill_back``.
375 * ``PIPE_CAP_SPARSE_BUFFER_PAGE_SIZE``: The page size of sparse buffers in
376 bytes, or 0 if sparse buffers are not supported. The page size must be at
377 most 64KB.
378 * ``PIPE_CAP_TGSI_BALLOT``: Whether the BALLOT and READ_* opcodes as well as
379 the SUBGROUP_* semantics are supported.
380 * ``PIPE_CAP_TGSI_TES_LAYER_VIEWPORT``: Whether ``TGSI_SEMANTIC_LAYER`` and
381 ``TGSI_SEMANTIC_VIEWPORT_INDEX`` are supported as tessellation evaluation
382 shader outputs.
383 * ``PIPE_CAP_CAN_BIND_CONST_BUFFER_AS_VERTEX``: Whether a buffer with just
384 PIPE_BIND_CONSTANT_BUFFER can be legally passed to set_vertex_buffers.
385 * ``PIPE_CAP_ALLOW_MAPPED_BUFFERS_DURING_EXECUTION``: As the name says.
386 * ``PIPE_CAP_POST_DEPTH_COVERAGE``: whether
387 ``TGSI_PROPERTY_FS_POST_DEPTH_COVERAGE`` is supported.
388 * ``PIPE_CAP_BINDLESS_TEXTURE``: Whether bindless texture operations are
389 supported.
390 * ``PIPE_CAP_NIR_SAMPLERS_AS_DEREF``: Whether NIR tex instructions should
391 reference texture and sampler as NIR derefs instead of by indices.
392 * ``PIPE_CAP_QUERY_SO_OVERFLOW``: Whether the
393 ``PIPE_QUERY_SO_OVERFLOW_PREDICATE`` and
394 ``PIPE_QUERY_SO_OVERFLOW_ANY_PREDICATE`` query types are supported. Note that
395 for a driver that does not support multiple output streams (i.e.,
396 ``PIPE_CAP_MAX_VERTEX_STREAMS`` is 1), both query types are identical.
397 * ``PIPE_CAP_MEMOBJ``: Whether operations on memory objects are supported.
398 * ``PIPE_CAP_LOAD_CONSTBUF``: True if the driver supports TGSI_OPCODE_LOAD use
399 with constant buffers.
400 * ``PIPE_CAP_TGSI_ANY_REG_AS_ADDRESS``: Any TGSI register can be used as
401 an address for indirect register indexing.
402 * ``PIPE_CAP_TILE_RASTER_ORDER``: Whether the driver supports
403 GL_MESA_tile_raster_order, using the tile_raster_order_* fields in
404 pipe_rasterizer_state.
405 * ``PIPE_CAP_MAX_COMBINED_SHADER_OUTPUT_RESOURCES``: Limit on combined shader
406 output resources (images + buffers + fragment outputs). If 0 the state
407 tracker works it out.
408 * ``PIPE_CAP_SIGNED_VERTEX_BUFFER_OFFSET``:
409 Whether pipe_vertex_buffer::buffer_offset is treated as signed. The u_vbuf
410 module needs this for optimal performance in workstation applications.
411 * ``PIPE_CAP_CONTEXT_PRIORITY_MASK``: For drivers that support per-context
412 priorities, this returns a bitmask of PIPE_CONTEXT_PRIORITY_x for the
413 supported priority levels. A driver that does not support prioritized
414 contexts can return 0.
415 * ``PIPE_CAP_FENCE_SIGNAL``: True if the driver supports signaling semaphores
416 using fence_server_signal().
417
418
419 .. _pipe_capf:
420
421 PIPE_CAPF_*
422 ^^^^^^^^^^^^^^^^
423
424 The floating-point capabilities are:
425
426 * ``PIPE_CAPF_MAX_LINE_WIDTH``: The maximum width of a regular line.
427 * ``PIPE_CAPF_MAX_LINE_WIDTH_AA``: The maximum width of a smoothed line.
428 * ``PIPE_CAPF_MAX_POINT_WIDTH``: The maximum width and height of a point.
429 * ``PIPE_CAPF_MAX_POINT_WIDTH_AA``: The maximum width and height of a smoothed point.
430 * ``PIPE_CAPF_MAX_TEXTURE_ANISOTROPY``: The maximum level of anisotropy that can be
431 applied to anisotropically filtered textures.
432 * ``PIPE_CAPF_MAX_TEXTURE_LOD_BIAS``: The maximum :term:`LOD` bias that may be applied
433 to filtered textures.
434 * ``PIPE_CAPF_GUARD_BAND_LEFT``,
435 ``PIPE_CAPF_GUARD_BAND_TOP``,
436 ``PIPE_CAPF_GUARD_BAND_RIGHT``,
437 ``PIPE_CAPF_GUARD_BAND_BOTTOM``: TODO
438
439
440 .. _pipe_shader_cap:
441
442 PIPE_SHADER_CAP_*
443 ^^^^^^^^^^^^^^^^^
444
445 These are per-shader-stage capabitity queries. Different shader stages may
446 support different features.
447
448 * ``PIPE_SHADER_CAP_MAX_INSTRUCTIONS``: The maximum number of instructions.
449 * ``PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS``: The maximum number of arithmetic instructions.
450 * ``PIPE_SHADER_CAP_MAX_TEX_INSTRUCTIONS``: The maximum number of texture instructions.
451 * ``PIPE_SHADER_CAP_MAX_TEX_INDIRECTIONS``: The maximum number of texture indirections.
452 * ``PIPE_SHADER_CAP_MAX_CONTROL_FLOW_DEPTH``: The maximum nested control flow depth.
453 * ``PIPE_SHADER_CAP_MAX_INPUTS``: The maximum number of input registers.
454 * ``PIPE_SHADER_CAP_MAX_OUTPUTS``: The maximum number of output registers.
455 This is valid for all shaders except the fragment shader.
456 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFER_SIZE``: The maximum size per constant buffer in bytes.
457 * ``PIPE_SHADER_CAP_MAX_CONST_BUFFERS``: Maximum number of constant buffers that can be bound
458 to any shader stage using ``set_constant_buffer``. If 0 or 1, the pipe will
459 only permit binding one constant buffer per shader.
460
461 If a value greater than 0 is returned, the driver can have multiple
462 constant buffers bound to shader stages. The CONST register file is
463 accessed with two-dimensional indices, like in the example below.
464
465 DCL CONST[0][0..7] # declare first 8 vectors of constbuf 0
466 DCL CONST[3][0] # declare first vector of constbuf 3
467 MOV OUT[0], CONST[0][3] # copy vector 3 of constbuf 0
468
469 * ``PIPE_SHADER_CAP_MAX_TEMPS``: The maximum number of temporary registers.
470 * ``PIPE_SHADER_CAP_TGSI_CONT_SUPPORTED``: Whether the continue opcode is supported.
471 * ``PIPE_SHADER_CAP_INDIRECT_INPUT_ADDR``: Whether indirect addressing
472 of the input file is supported.
473 * ``PIPE_SHADER_CAP_INDIRECT_OUTPUT_ADDR``: Whether indirect addressing
474 of the output file is supported.
475 * ``PIPE_SHADER_CAP_INDIRECT_TEMP_ADDR``: Whether indirect addressing
476 of the temporary file is supported.
477 * ``PIPE_SHADER_CAP_INDIRECT_CONST_ADDR``: Whether indirect addressing
478 of the constant file is supported.
479 * ``PIPE_SHADER_CAP_SUBROUTINES``: Whether subroutines are supported, i.e.
480 BGNSUB, ENDSUB, CAL, and RET, including RET in the main block.
481 * ``PIPE_SHADER_CAP_INTEGERS``: Whether integer opcodes are supported.
482 If unsupported, only float opcodes are supported.
483 * ``PIPE_SHADER_CAP_INT64_ATOMICS``: Whether int64 atomic opcodes are supported. The device needs to support add, sub, swap, cmpswap, and, or, xor, min, and max.
484 * ``PIPE_SHADER_CAP_FP16``: Whether half precision floating-point opcodes are supported.
485 If unsupported, half precision ops need to be lowered to full precision.
486 * ``PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS``: The maximum number of texture
487 samplers.
488 * ``PIPE_SHADER_CAP_PREFERRED_IR``: Preferred representation of the
489 program. It should be one of the ``pipe_shader_ir`` enum values.
490 * ``PIPE_SHADER_CAP_MAX_SAMPLER_VIEWS``: The maximum number of texture
491 sampler views. Must not be lower than PIPE_SHADER_CAP_MAX_TEXTURE_SAMPLERS.
492 * ``PIPE_SHADER_CAP_TGSI_DROUND_SUPPORTED``: Whether double precision rounding
493 is supported. If it is, DTRUNC/DCEIL/DFLR/DROUND opcodes may be used.
494 * ``PIPE_SHADER_CAP_TGSI_DFRACEXP_DLDEXP_SUPPORTED``: Whether DFRACEXP and
495 DLDEXP are supported.
496 * ``PIPE_SHADER_CAP_TGSI_LDEXP_SUPPORTED``: Whether LDEXP is supported.
497 * ``PIPE_SHADER_CAP_TGSI_FMA_SUPPORTED``: Whether FMA and DFMA (doubles only)
498 are supported.
499 * ``PIPE_SHADER_CAP_TGSI_ANY_INOUT_DECL_RANGE``: Whether the driver doesn't
500 ignore tgsi_declaration_range::Last for shader inputs and outputs.
501 * ``PIPE_SHADER_CAP_MAX_UNROLL_ITERATIONS_HINT``: This is the maximum number
502 of iterations that loops are allowed to have to be unrolled. It is only
503 a hint to state trackers. Whether any loops will be unrolled is not
504 guaranteed.
505 * ``PIPE_SHADER_CAP_MAX_SHADER_BUFFERS``: Maximum number of memory buffers
506 (also used to implement atomic counters). Having this be non-0 also
507 implies support for the ``LOAD``, ``STORE``, and ``ATOM*`` TGSI
508 opcodes.
509 * ``PIPE_SHADER_CAP_SUPPORTED_IRS``: Supported representations of the
510 program. It should be a mask of ``pipe_shader_ir`` bits.
511 * ``PIPE_SHADER_CAP_MAX_SHADER_IMAGES``: Maximum number of image units.
512 * ``PIPE_SHADER_CAP_LOWER_IF_THRESHOLD``: IF and ELSE branches with a lower
513 cost than this value should be lowered by the state tracker for better
514 performance. This is a tunable for the GLSL compiler and the behavior is
515 specific to the compiler.
516 * ``PIPE_SHADER_CAP_TGSI_SKIP_MERGE_REGISTERS``: Whether the merge registers
517 TGSI pass is skipped. This might reduce code size and register pressure if
518 the underlying driver has a real backend compiler.
519 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTERS``: If atomic counters are separate,
520 how many HW counters are available for this stage. (0 uses SSBO atomics).
521 * ``PIPE_SHADER_CAP_MAX_HW_ATOMIC_COUNTER_BUFFERS``: If atomic counters are
522 separate, how many atomic counter buffers are available for this stage.
523
524 .. _pipe_compute_cap:
525
526 PIPE_COMPUTE_CAP_*
527 ^^^^^^^^^^^^^^^^^^
528
529 Compute-specific capabilities. They can be queried using
530 pipe_screen::get_compute_param.
531
532 * ``PIPE_COMPUTE_CAP_IR_TARGET``: A description of the target of the form
533 ``processor-arch-manufacturer-os`` that will be passed on to the compiler.
534 This CAP is only relevant for drivers that specify PIPE_SHADER_IR_NATIVE for
535 their preferred IR.
536 Value type: null-terminated string. Shader IR type dependent.
537 * ``PIPE_COMPUTE_CAP_GRID_DIMENSION``: Number of supported dimensions
538 for grid and block coordinates. Value type: ``uint64_t``. Shader IR type dependent.
539 * ``PIPE_COMPUTE_CAP_MAX_GRID_SIZE``: Maximum grid size in block
540 units. Value type: ``uint64_t []``. Shader IR type dependent.
541 * ``PIPE_COMPUTE_CAP_MAX_BLOCK_SIZE``: Maximum block size in thread
542 units. Value type: ``uint64_t []``. Shader IR type dependent.
543 * ``PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK``: Maximum number of threads that
544 a single block can contain. Value type: ``uint64_t``. Shader IR type dependent.
545 This may be less than the product of the components of MAX_BLOCK_SIZE and is
546 usually limited by the number of threads that can be resident simultaneously
547 on a compute unit.
548 * ``PIPE_COMPUTE_CAP_MAX_GLOBAL_SIZE``: Maximum size of the GLOBAL
549 resource. Value type: ``uint64_t``. Shader IR type dependent.
550 * ``PIPE_COMPUTE_CAP_MAX_LOCAL_SIZE``: Maximum size of the LOCAL
551 resource. Value type: ``uint64_t``. Shader IR type dependent.
552 * ``PIPE_COMPUTE_CAP_MAX_PRIVATE_SIZE``: Maximum size of the PRIVATE
553 resource. Value type: ``uint64_t``. Shader IR type dependent.
554 * ``PIPE_COMPUTE_CAP_MAX_INPUT_SIZE``: Maximum size of the INPUT
555 resource. Value type: ``uint64_t``. Shader IR type dependent.
556 * ``PIPE_COMPUTE_CAP_MAX_MEM_ALLOC_SIZE``: Maximum size of a memory object
557 allocation in bytes. Value type: ``uint64_t``.
558 * ``PIPE_COMPUTE_CAP_MAX_CLOCK_FREQUENCY``: Maximum frequency of the GPU
559 clock in MHz. Value type: ``uint32_t``
560 * ``PIPE_COMPUTE_CAP_MAX_COMPUTE_UNITS``: Maximum number of compute units
561 Value type: ``uint32_t``
562 * ``PIPE_COMPUTE_CAP_IMAGES_SUPPORTED``: Whether images are supported
563 non-zero means yes, zero means no. Value type: ``uint32_t``
564 * ``PIPE_COMPUTE_CAP_SUBGROUP_SIZE``: The size of a basic execution unit in
565 threads. Also known as wavefront size, warp size or SIMD width.
566 * ``PIPE_COMPUTE_CAP_ADDRESS_BITS``: The default compute device address space
567 size specified as an unsigned integer value in bits.
568 * ``PIPE_COMPUTE_CAP_MAX_VARIABLE_THREADS_PER_BLOCK``: Maximum variable number
569 of threads that a single block can contain. This is similar to
570 PIPE_COMPUTE_CAP_MAX_THREADS_PER_BLOCK, except that the variable size is not
571 known a compile-time but at dispatch-time.
572
573 .. _pipe_bind:
574
575 PIPE_BIND_*
576 ^^^^^^^^^^^
577
578 These flags indicate how a resource will be used and are specified at resource
579 creation time. Resources may be used in different roles
580 during their lifecycle. Bind flags are cumulative and may be combined to create
581 a resource which can be used for multiple things.
582 Depending on the pipe driver's memory management and these bind flags,
583 resources might be created and handled quite differently.
584
585 * ``PIPE_BIND_RENDER_TARGET``: A color buffer or pixel buffer which will be
586 rendered to. Any surface/resource attached to pipe_framebuffer_state::cbufs
587 must have this flag set.
588 * ``PIPE_BIND_DEPTH_STENCIL``: A depth (Z) buffer and/or stencil buffer. Any
589 depth/stencil surface/resource attached to pipe_framebuffer_state::zsbuf must
590 have this flag set.
591 * ``PIPE_BIND_BLENDABLE``: Used in conjunction with PIPE_BIND_RENDER_TARGET to
592 query whether a device supports blending for a given format.
593 If this flag is set, surface creation may fail if blending is not supported
594 for the specified format. If it is not set, a driver may choose to ignore
595 blending on surfaces with formats that would require emulation.
596 * ``PIPE_BIND_DISPLAY_TARGET``: A surface that can be presented to screen. Arguments to
597 pipe_screen::flush_front_buffer must have this flag set.
598 * ``PIPE_BIND_SAMPLER_VIEW``: A texture that may be sampled from in a fragment
599 or vertex shader.
600 * ``PIPE_BIND_VERTEX_BUFFER``: A vertex buffer.
601 * ``PIPE_BIND_INDEX_BUFFER``: An vertex index/element buffer.
602 * ``PIPE_BIND_CONSTANT_BUFFER``: A buffer of shader constants.
603 * ``PIPE_BIND_STREAM_OUTPUT``: A stream output buffer.
604 * ``PIPE_BIND_CUSTOM``:
605 * ``PIPE_BIND_SCANOUT``: A front color buffer or scanout buffer.
606 * ``PIPE_BIND_SHARED``: A sharable buffer that can be given to another
607 process.
608 * ``PIPE_BIND_GLOBAL``: A buffer that can be mapped into the global
609 address space of a compute program.
610 * ``PIPE_BIND_SHADER_BUFFER``: A buffer without a format that can be bound
611 to a shader and can be used with load, store, and atomic instructions.
612 * ``PIPE_BIND_SHADER_IMAGE``: A buffer or texture with a format that can be
613 bound to a shader and can be used with load, store, and atomic instructions.
614 * ``PIPE_BIND_COMPUTE_RESOURCE``: A buffer or texture that can be
615 bound to the compute program as a shader resource.
616 * ``PIPE_BIND_COMMAND_ARGS_BUFFER``: A buffer that may be sourced by the
617 GPU command processor. It can contain, for example, the arguments to
618 indirect draw calls.
619
620 .. _pipe_usage:
621
622 PIPE_USAGE_*
623 ^^^^^^^^^^^^
624
625 The PIPE_USAGE enums are hints about the expected usage pattern of a resource.
626 Note that drivers must always support read and write CPU access at any time
627 no matter which hint they got.
628
629 * ``PIPE_USAGE_DEFAULT``: Optimized for fast GPU access.
630 * ``PIPE_USAGE_IMMUTABLE``: Optimized for fast GPU access and the resource is
631 not expected to be mapped or changed (even by the GPU) after the first upload.
632 * ``PIPE_USAGE_DYNAMIC``: Expect frequent write-only CPU access. What is
633 uploaded is expected to be used at least several times by the GPU.
634 * ``PIPE_USAGE_STREAM``: Expect frequent write-only CPU access. What is
635 uploaded is expected to be used only once by the GPU.
636 * ``PIPE_USAGE_STAGING``: Optimized for fast CPU access.
637
638
639 Methods
640 -------
641
642 XXX to-do
643
644 get_name
645 ^^^^^^^^
646
647 Returns an identifying name for the screen.
648
649 The returned string should remain valid and immutable for the lifetime of
650 pipe_screen.
651
652 get_vendor
653 ^^^^^^^^^^
654
655 Returns the screen vendor.
656
657 The returned string should remain valid and immutable for the lifetime of
658 pipe_screen.
659
660 get_device_vendor
661 ^^^^^^^^^^^^^^^^^
662
663 Returns the actual vendor of the device driving the screen
664 (as opposed to the driver vendor).
665
666 The returned string should remain valid and immutable for the lifetime of
667 pipe_screen.
668
669 .. _get_param:
670
671 get_param
672 ^^^^^^^^^
673
674 Get an integer/boolean screen parameter.
675
676 **param** is one of the :ref:`PIPE_CAP` names.
677
678 .. _get_paramf:
679
680 get_paramf
681 ^^^^^^^^^^
682
683 Get a floating-point screen parameter.
684
685 **param** is one of the :ref:`PIPE_CAPF` names.
686
687 context_create
688 ^^^^^^^^^^^^^^
689
690 Create a pipe_context.
691
692 **priv** is private data of the caller, which may be put to various
693 unspecified uses, typically to do with implementing swapbuffers
694 and/or front-buffer rendering.
695
696 is_format_supported
697 ^^^^^^^^^^^^^^^^^^^
698
699 Determine if a resource in the given format can be used in a specific manner.
700
701 **format** the resource format
702
703 **target** one of the PIPE_TEXTURE_x flags
704
705 **sample_count** the number of samples. 0 and 1 mean no multisampling,
706 the maximum allowed legal value is 32.
707
708 **bindings** is a bitmask of :ref:`PIPE_BIND` flags.
709
710 Returns TRUE if all usages can be satisfied.
711
712
713 can_create_resource
714 ^^^^^^^^^^^^^^^^^^^
715
716 Check if a resource can actually be created (but don't actually allocate any
717 memory). This is used to implement OpenGL's proxy textures. Typically, a
718 driver will simply check if the total size of the given resource is less than
719 some limit.
720
721 For PIPE_TEXTURE_CUBE, the pipe_resource::array_size field should be 6.
722
723
724 .. _resource_create:
725
726 resource_create
727 ^^^^^^^^^^^^^^^
728
729 Create a new resource from a template.
730 The following fields of the pipe_resource must be specified in the template:
731
732 **target** one of the pipe_texture_target enums.
733 Note that PIPE_BUFFER and PIPE_TEXTURE_X are not really fundamentally different.
734 Modern APIs allow using buffers as shader resources.
735
736 **format** one of the pipe_format enums.
737
738 **width0** the width of the base mip level of the texture or size of the buffer.
739
740 **height0** the height of the base mip level of the texture
741 (1 for 1D or 1D array textures).
742
743 **depth0** the depth of the base mip level of the texture
744 (1 for everything else).
745
746 **array_size** the array size for 1D and 2D array textures.
747 For cube maps this must be 6, for other textures 1.
748
749 **last_level** the last mip map level present.
750
751 **nr_samples** the nr of msaa samples. 0 (or 1) specifies a resource
752 which isn't multisampled.
753
754 **usage** one of the :ref:`PIPE_USAGE` flags.
755
756 **bind** bitmask of the :ref:`PIPE_BIND` flags.
757
758 **flags** bitmask of PIPE_RESOURCE_FLAG flags.
759
760
761
762 resource_changed
763 ^^^^^^^^^^^^^^^^
764
765 Mark a resource as changed so derived internal resources will be recreated
766 on next use.
767
768 When importing external images that can't be directly used as texture sampler
769 source, internal copies may have to be created that the hardware can sample
770 from. When those resources are reimported, the image data may have changed, and
771 the previously derived internal resources must be invalidated to avoid sampling
772 from old copies.
773
774
775
776 resource_destroy
777 ^^^^^^^^^^^^^^^^
778
779 Destroy a resource. A resource is destroyed if it has no more references.
780
781
782
783 get_timestamp
784 ^^^^^^^^^^^^^
785
786 Query a timestamp in nanoseconds. The returned value should match
787 PIPE_QUERY_TIMESTAMP. This function returns immediately and doesn't
788 wait for rendering to complete (which cannot be achieved with queries).
789
790
791
792 get_driver_query_info
793 ^^^^^^^^^^^^^^^^^^^^^
794
795 Return a driver-specific query. If the **info** parameter is NULL,
796 the number of available queries is returned. Otherwise, the driver
797 query at the specified **index** is returned in **info**.
798 The function returns non-zero on success.
799 The driver-specific query is described with the pipe_driver_query_info
800 structure.
801
802 get_driver_query_group_info
803 ^^^^^^^^^^^^^^^^^^^^^^^^^^^
804
805 Return a driver-specific query group. If the **info** parameter is NULL,
806 the number of available groups is returned. Otherwise, the driver
807 query group at the specified **index** is returned in **info**.
808 The function returns non-zero on success.
809 The driver-specific query group is described with the
810 pipe_driver_query_group_info structure.
811
812
813
814 get_disk_shader_cache
815 ^^^^^^^^^^^^^^^^^^^^^
816
817 Returns a pointer to a driver-specific on-disk shader cache. If the driver
818 failed to create the cache or does not support an on-disk shader cache NULL is
819 returned. The callback itself may also be NULL if the driver doesn't support
820 an on-disk shader cache.
821
822
823 Thread safety
824 -------------
825
826 Screen methods are required to be thread safe. While gallium rendering
827 contexts are not required to be thread safe, it is required to be safe to use
828 different contexts created with the same screen in different threads without
829 locks. It is also required to be safe using screen methods in a thread, while
830 using one of its contexts in another (without locks).