cell: implement fencing for texture buffers
[mesa.git] / src / gallium / drivers / cell / common.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * Types and tokens which are common to the SPU and PPU code.
30 */
31
32
33 #ifndef CELL_COMMON_H
34 #define CELL_COMMON_H
35
36 #include "pipe/p_compiler.h"
37 #include "pipe/p_format.h"
38 #include "pipe/p_state.h"
39
40
41 /** The standard assert macro doesn't seem to work reliably */
42 #define ASSERT(x) \
43 if (!(x)) { \
44 ubyte *p = NULL; \
45 fprintf(stderr, "%s:%d: %s(): assertion %s failed.\n", \
46 __FILE__, __LINE__, __FUNCTION__, #x); \
47 *p = 0; \
48 exit(1); \
49 }
50
51
52 /** for sanity checking */
53 #define ASSERT_ALIGN16(ptr) \
54 ASSERT((((unsigned long) (ptr)) & 0xf) == 0);
55
56
57 /** round up value to next multiple of 4 */
58 #define ROUNDUP4(k) (((k) + 0x3) & ~0x3)
59
60 /** round up value to next multiple of 8 */
61 #define ROUNDUP8(k) (((k) + 0x7) & ~0x7)
62
63 /** round up value to next multiple of 16 */
64 #define ROUNDUP16(k) (((k) + 0xf) & ~0xf)
65
66
67 #define CELL_MAX_SPUS 8
68
69 #define CELL_MAX_SAMPLERS 4
70 #define CELL_MAX_TEXTURE_LEVELS 12 /* 2k x 2k */
71 #define CELL_MAX_CONSTANTS 32 /**< number of float[4] constants */
72 #define CELL_MAX_WIDTH 1024 /**< max framebuffer width */
73 #define CELL_MAX_HEIGHT 1024 /**< max framebuffer width */
74
75 #define TILE_SIZE 32
76
77
78 /**
79 * The low byte of a mailbox word contains the command opcode.
80 * Remaining higher bytes are command specific.
81 */
82 #define CELL_CMD_OPCODE_MASK 0xff
83
84 #define CELL_CMD_EXIT 1
85 #define CELL_CMD_CLEAR_SURFACE 2
86 #define CELL_CMD_FINISH 3
87 #define CELL_CMD_RENDER 4
88 #define CELL_CMD_BATCH 5
89 #define CELL_CMD_RELEASE_VERTS 6
90 #define CELL_CMD_STATE_FRAMEBUFFER 10
91 #define CELL_CMD_STATE_FRAGMENT_OPS 11
92 #define CELL_CMD_STATE_SAMPLER 12
93 #define CELL_CMD_STATE_TEXTURE 13
94 #define CELL_CMD_STATE_VERTEX_INFO 14
95 #define CELL_CMD_STATE_VIEWPORT 15
96 #define CELL_CMD_STATE_UNIFORMS 16
97 #define CELL_CMD_STATE_VS_ARRAY_INFO 17
98 #define CELL_CMD_STATE_BIND_VS 18
99 #define CELL_CMD_STATE_FRAGMENT_PROGRAM 19
100 #define CELL_CMD_STATE_ATTRIB_FETCH 20
101 #define CELL_CMD_STATE_FS_CONSTANTS 21
102 #define CELL_CMD_STATE_RASTERIZER 22
103 #define CELL_CMD_VS_EXECUTE 23
104 #define CELL_CMD_FLUSH_BUFFER_RANGE 24
105 #define CELL_CMD_FENCE 25
106
107
108 /** Command/batch buffers */
109 #define CELL_NUM_BUFFERS 4
110 #define CELL_BUFFER_SIZE (4*1024) /**< 16KB would be the max */
111
112 #define CELL_BUFFER_STATUS_FREE 10
113 #define CELL_BUFFER_STATUS_USED 20
114
115 /** Debug flags */
116 #define CELL_DEBUG_CHECKER (1 << 0)
117 #define CELL_DEBUG_ASM (1 << 1)
118 #define CELL_DEBUG_SYNC (1 << 2)
119 #define CELL_DEBUG_FRAGMENT_OPS (1 << 3)
120 #define CELL_DEBUG_FRAGMENT_OP_FALLBACK (1 << 4)
121 #define CELL_DEBUG_CMD (1 << 5)
122 #define CELL_DEBUG_CACHE (1 << 6)
123
124 /** Max instructions for doing per-fragment operations */
125 #define SPU_MAX_FRAGMENT_OPS_INSTS 64
126
127
128
129 #define CELL_FENCE_IDLE 0
130 #define CELL_FENCE_EMITTED 1
131 #define CELL_FENCE_SIGNALLED 2
132
133 struct cell_fence
134 {
135 /** There's a 16-byte status qword per SPU */
136 volatile uint status[CELL_MAX_SPUS][4];
137 };
138
139
140 /**
141 * Fence command sent to SPUs. In response, the SPUs will write
142 * CELL_FENCE_STATUS_SIGNALLED back to the fence status word in main memory.
143 */
144 struct cell_command_fence
145 {
146 uint64_t opcode; /**< CELL_CMD_FENCE */
147 struct cell_fence *fence;
148 };
149
150
151 /**
152 * Command to specify per-fragment operations state and generated code.
153 * Note that the dsa, blend, blend_color fields are really only needed
154 * for the fallback/C per-pixel code. They're not used when we generate
155 * dynamic SPU fragment code (which is the normal case).
156 */
157 struct cell_command_fragment_ops
158 {
159 uint64_t opcode; /**< CELL_CMD_STATE_FRAGMENT_OPS */
160 struct pipe_depth_stencil_alpha_state dsa;
161 struct pipe_blend_state blend;
162 struct pipe_blend_color blend_color;
163 unsigned code[SPU_MAX_FRAGMENT_OPS_INSTS];
164 };
165
166
167 /** Max instructions for fragment programs */
168 #define SPU_MAX_FRAGMENT_PROGRAM_INSTS 512
169
170 /**
171 * Command to send a fragment program to SPUs.
172 */
173 struct cell_command_fragment_program
174 {
175 uint64_t opcode; /**< CELL_CMD_STATE_FRAGMENT_PROGRAM */
176 uint num_inst; /**< Number of instructions */
177 unsigned code[SPU_MAX_FRAGMENT_PROGRAM_INSTS];
178 };
179
180
181 /**
182 * Tell SPUs about the framebuffer size, location
183 */
184 struct cell_command_framebuffer
185 {
186 uint64_t opcode; /**< CELL_CMD_STATE_FRAMEBUFFER */
187 int width, height;
188 void *color_start, *depth_start;
189 enum pipe_format color_format, depth_format;
190 };
191
192
193 /**
194 * Tell SPUs about rasterizer state.
195 */
196 struct cell_command_rasterizer
197 {
198 uint64_t opcode; /**< CELL_CMD_STATE_RASTERIZER */
199 struct pipe_rasterizer_state rasterizer;
200 };
201
202
203 /**
204 * Clear framebuffer to the given value/color.
205 */
206 struct cell_command_clear_surface
207 {
208 uint64_t opcode; /**< CELL_CMD_CLEAR_SURFACE */
209 uint surface; /**< Temporary: 0=color, 1=Z */
210 uint value;
211 };
212
213
214 /**
215 * Array info used by the vertex shader's vertex puller.
216 */
217 struct cell_array_info
218 {
219 uint64_t base; /**< Base address of the 0th element. */
220 uint attr; /**< Attribute that this state is for. */
221 uint pitch; /**< Byte pitch from one entry to the next. */
222 uint size;
223 uint function_offset;
224 };
225
226
227 struct cell_attribute_fetch_code
228 {
229 uint64_t base;
230 uint size;
231 };
232
233
234 struct cell_buffer_range
235 {
236 uint64_t base;
237 unsigned size;
238 };
239
240
241 struct cell_shader_info
242 {
243 uint64_t declarations;
244 uint64_t instructions;
245 uint64_t immediates;
246
247 unsigned num_outputs;
248 unsigned num_declarations;
249 unsigned num_instructions;
250 unsigned num_immediates;
251 };
252
253
254 #define SPU_VERTS_PER_BATCH 64
255 struct cell_command_vs
256 {
257 uint64_t opcode; /**< CELL_CMD_VS_EXECUTE */
258 uint64_t vOut[SPU_VERTS_PER_BATCH];
259 unsigned num_elts;
260 unsigned elts[SPU_VERTS_PER_BATCH];
261 float plane[12][4];
262 unsigned nr_planes;
263 unsigned nr_attrs;
264 };
265
266
267 struct cell_command_render
268 {
269 uint64_t opcode; /**< CELL_CMD_RENDER */
270 uint prim_type; /**< PIPE_PRIM_x */
271 uint num_verts;
272 uint vertex_size; /**< bytes per vertex */
273 uint num_indexes;
274 uint vertex_buf; /**< which cell->buffer[] contains the vertex data */
275 float xmin, ymin, xmax, ymax; /* XXX another dummy field */
276 uint min_index;
277 boolean inline_verts;
278 };
279
280
281 struct cell_command_release_verts
282 {
283 uint64_t opcode; /**< CELL_CMD_RELEASE_VERTS */
284 uint vertex_buf; /**< in [0, CELL_NUM_BUFFERS-1] */
285 };
286
287
288 struct cell_command_sampler
289 {
290 uint64_t opcode; /**< CELL_CMD_STATE_SAMPLER */
291 uint unit;
292 struct pipe_sampler_state state;
293 };
294
295
296 struct cell_command_texture
297 {
298 uint64_t opcode; /**< CELL_CMD_STATE_TEXTURE */
299 uint target; /**< PIPE_TEXTURE_x */
300 uint unit;
301 void *start[CELL_MAX_TEXTURE_LEVELS]; /**< Address in main memory */
302 ushort width[CELL_MAX_TEXTURE_LEVELS];
303 ushort height[CELL_MAX_TEXTURE_LEVELS];
304 ushort depth[CELL_MAX_TEXTURE_LEVELS];
305 };
306
307
308 #define MAX_SPU_FUNCTIONS 12
309 /**
310 * Used to tell the PPU about the address of particular functions in the
311 * SPU's address space.
312 */
313 struct cell_spu_function_info
314 {
315 uint num;
316 char names[MAX_SPU_FUNCTIONS][16];
317 uint addrs[MAX_SPU_FUNCTIONS];
318 char pad[12]; /**< Pad struct to multiple of 16 bytes (256 currently) */
319 };
320
321
322 /** This is the object passed to spe_create_thread() */
323 struct cell_init_info
324 {
325 unsigned id;
326 unsigned num_spus;
327 unsigned debug_flags; /**< mask of CELL_DEBUG_x flags */
328 float inv_timebase; /**< 1.0/timebase, for perf measurement */
329
330 /** Buffers for command batches, vertex/index data */
331 ubyte *buffers[CELL_NUM_BUFFERS];
332 uint *buffer_status; /**< points at cell_context->buffer_status */
333
334 struct cell_spu_function_info *spu_functions;
335 } ALIGN16_ATTRIB;
336
337
338 #endif /* CELL_COMMON_H */