98554d7f5218a65eb630502fdb447505cd23cc05
[mesa.git] / src / gallium / drivers / cell / common.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /**
29 * Types and tokens which are common to the SPU and PPU code.
30 */
31
32
33 #ifndef CELL_COMMON_H
34 #define CELL_COMMON_H
35
36 #include "pipe/p_compiler.h"
37 #include "pipe/p_format.h"
38 #include "pipe/p_state.h"
39
40
41 /** The standard assert macro doesn't seem to work reliably */
42 #define ASSERT(x) \
43 if (!(x)) { \
44 ubyte *p = NULL; \
45 fprintf(stderr, "%s:%d: %s(): assertion %s failed.\n", \
46 __FILE__, __LINE__, __FUNCTION__, #x); \
47 *p = 0; \
48 exit(1); \
49 }
50
51
52 /** for sanity checking */
53 #define ASSERT_ALIGN16(ptr) \
54 ASSERT((((unsigned long) (ptr)) & 0xf) == 0);
55
56
57 /** round up value to next multiple of 4 */
58 #define ROUNDUP4(k) (((k) + 0x3) & ~0x3)
59
60 /** round up value to next multiple of 8 */
61 #define ROUNDUP8(k) (((k) + 0x7) & ~0x7)
62
63 /** round up value to next multiple of 16 */
64 #define ROUNDUP16(k) (((k) + 0xf) & ~0xf)
65
66
67 #define CELL_MAX_SPUS 8
68
69 #define CELL_MAX_SAMPLERS 4
70 #define CELL_MAX_TEXTURE_LEVELS 12 /* 2k x 2k */
71 #define CELL_MAX_CONSTANTS 32 /**< number of float[4] constants */
72 #define CELL_MAX_WIDTH 1024 /**< max framebuffer width */
73 #define CELL_MAX_HEIGHT 1024 /**< max framebuffer width */
74
75 #define TILE_SIZE 32
76
77
78 /**
79 * The low byte of a mailbox word contains the command opcode.
80 * Remaining higher bytes are command specific.
81 */
82 #define CELL_CMD_OPCODE_MASK 0xff
83
84 #define CELL_CMD_EXIT 1
85 #define CELL_CMD_CLEAR_SURFACE 2
86 #define CELL_CMD_FINISH 3
87 #define CELL_CMD_RENDER 4
88 #define CELL_CMD_BATCH 5
89 #define CELL_CMD_RELEASE_VERTS 6
90 #define CELL_CMD_STATE_FRAMEBUFFER 10
91 #define CELL_CMD_STATE_FRAGMENT_OPS 11
92 #define CELL_CMD_STATE_SAMPLER 12
93 #define CELL_CMD_STATE_TEXTURE 13
94 #define CELL_CMD_STATE_VERTEX_INFO 14
95 #define CELL_CMD_STATE_VIEWPORT 15
96 #define CELL_CMD_STATE_UNIFORMS 16
97 #define CELL_CMD_STATE_VS_ARRAY_INFO 17
98 #define CELL_CMD_STATE_BIND_VS 18
99 #define CELL_CMD_STATE_FRAGMENT_PROGRAM 19
100 #define CELL_CMD_STATE_ATTRIB_FETCH 20
101 #define CELL_CMD_STATE_FS_CONSTANTS 21
102 #define CELL_CMD_STATE_RASTERIZER 22
103 #define CELL_CMD_VS_EXECUTE 23
104 #define CELL_CMD_FLUSH_BUFFER_RANGE 24
105 #define CELL_CMD_FENCE 25
106
107
108 /** Command/batch buffers */
109 #define CELL_NUM_BUFFERS 4
110 #define CELL_BUFFER_SIZE (4*1024) /**< 16KB would be the max */
111
112 #define CELL_BUFFER_STATUS_FREE 10
113 #define CELL_BUFFER_STATUS_USED 20
114
115 /** Debug flags */
116 #define CELL_DEBUG_CHECKER (1 << 0)
117 #define CELL_DEBUG_ASM (1 << 1)
118 #define CELL_DEBUG_SYNC (1 << 2)
119 #define CELL_DEBUG_FRAGMENT_OPS (1 << 3)
120 #define CELL_DEBUG_FRAGMENT_OP_FALLBACK (1 << 4)
121 #define CELL_DEBUG_CMD (1 << 5)
122 #define CELL_DEBUG_CACHE (1 << 6)
123
124 #define CELL_FENCE_IDLE 0
125 #define CELL_FENCE_EMITTED 1
126 #define CELL_FENCE_SIGNALLED 2
127
128 #define CELL_FACING_FRONT 0
129 #define CELL_FACING_BACK 1
130
131 struct cell_fence
132 {
133 /** There's a 16-byte status qword per SPU */
134 volatile uint status[CELL_MAX_SPUS][4];
135 };
136
137
138 /**
139 * Fence command sent to SPUs. In response, the SPUs will write
140 * CELL_FENCE_STATUS_SIGNALLED back to the fence status word in main memory.
141 */
142 struct cell_command_fence
143 {
144 uint64_t opcode; /**< CELL_CMD_FENCE */
145 struct cell_fence *fence;
146 };
147
148
149 /**
150 * Command to specify per-fragment operations state and generated code.
151 * Note that this is a variant-length structure, allocated with as
152 * much memory as needed to hold the generated code; the "code"
153 * field *must* be the last field in the structure. Also, the entire
154 * length of the structure (including the variant code field) must be
155 * a multiple of 8 bytes; we require that this structure itself be
156 * a multiple of 8 bytes, and that the generated code also be a multiple
157 * of 8 bytes.
158 *
159 * Also note that the dsa, blend, blend_color fields are really only needed
160 * for the fallback/C per-pixel code. They're not used when we generate
161 * dynamic SPU fragment code (which is the normal case), and will eventually
162 * be removed from this structure.
163 */
164 struct cell_command_fragment_ops
165 {
166 uint64_t opcode; /**< CELL_CMD_STATE_FRAGMENT_OPS */
167
168 /* Fields for the fallback case */
169 struct pipe_depth_stencil_alpha_state dsa;
170 struct pipe_blend_state blend;
171 struct pipe_blend_color blend_color;
172
173 /* Fields for the generated SPU code */
174 unsigned total_code_size;
175 unsigned front_code_index;
176 unsigned back_code_index;
177 /* this field has variant length, and must be the last field in
178 * the structure
179 */
180 unsigned code[0];
181 };
182
183
184 /** Max instructions for fragment programs */
185 #define SPU_MAX_FRAGMENT_PROGRAM_INSTS 512
186
187 /**
188 * Command to send a fragment program to SPUs.
189 */
190 struct cell_command_fragment_program
191 {
192 uint64_t opcode; /**< CELL_CMD_STATE_FRAGMENT_PROGRAM */
193 uint num_inst; /**< Number of instructions */
194 unsigned code[SPU_MAX_FRAGMENT_PROGRAM_INSTS];
195 };
196
197
198 /**
199 * Tell SPUs about the framebuffer size, location
200 */
201 struct cell_command_framebuffer
202 {
203 uint64_t opcode; /**< CELL_CMD_STATE_FRAMEBUFFER */
204 int width, height;
205 void *color_start, *depth_start;
206 enum pipe_format color_format, depth_format;
207 };
208
209
210 /**
211 * Tell SPUs about rasterizer state.
212 */
213 struct cell_command_rasterizer
214 {
215 uint64_t opcode; /**< CELL_CMD_STATE_RASTERIZER */
216 struct pipe_rasterizer_state rasterizer;
217 };
218
219
220 /**
221 * Clear framebuffer to the given value/color.
222 */
223 struct cell_command_clear_surface
224 {
225 uint64_t opcode; /**< CELL_CMD_CLEAR_SURFACE */
226 uint surface; /**< Temporary: 0=color, 1=Z */
227 uint value;
228 };
229
230
231 /**
232 * Array info used by the vertex shader's vertex puller.
233 */
234 struct cell_array_info
235 {
236 uint64_t base; /**< Base address of the 0th element. */
237 uint attr; /**< Attribute that this state is for. */
238 uint pitch; /**< Byte pitch from one entry to the next. */
239 uint size;
240 uint function_offset;
241 };
242
243
244 struct cell_attribute_fetch_code
245 {
246 uint64_t base;
247 uint size;
248 };
249
250
251 struct cell_buffer_range
252 {
253 uint64_t base;
254 unsigned size;
255 };
256
257
258 struct cell_shader_info
259 {
260 uint64_t declarations;
261 uint64_t instructions;
262 uint64_t immediates;
263
264 unsigned num_outputs;
265 unsigned num_declarations;
266 unsigned num_instructions;
267 unsigned num_immediates;
268 };
269
270
271 #define SPU_VERTS_PER_BATCH 64
272 struct cell_command_vs
273 {
274 uint64_t opcode; /**< CELL_CMD_VS_EXECUTE */
275 uint64_t vOut[SPU_VERTS_PER_BATCH];
276 unsigned num_elts;
277 unsigned elts[SPU_VERTS_PER_BATCH];
278 float plane[12][4];
279 unsigned nr_planes;
280 unsigned nr_attrs;
281 };
282
283
284 struct cell_command_render
285 {
286 uint64_t opcode; /**< CELL_CMD_RENDER */
287 uint prim_type; /**< PIPE_PRIM_x */
288 uint num_verts;
289 uint vertex_size; /**< bytes per vertex */
290 uint num_indexes;
291 uint vertex_buf; /**< which cell->buffer[] contains the vertex data */
292 float xmin, ymin, xmax, ymax; /* XXX another dummy field */
293 uint min_index;
294 boolean inline_verts;
295 };
296
297
298 struct cell_command_release_verts
299 {
300 uint64_t opcode; /**< CELL_CMD_RELEASE_VERTS */
301 uint vertex_buf; /**< in [0, CELL_NUM_BUFFERS-1] */
302 };
303
304
305 struct cell_command_sampler
306 {
307 uint64_t opcode; /**< CELL_CMD_STATE_SAMPLER */
308 uint unit;
309 struct pipe_sampler_state state;
310 };
311
312
313 struct cell_command_texture
314 {
315 uint64_t opcode; /**< CELL_CMD_STATE_TEXTURE */
316 uint target; /**< PIPE_TEXTURE_x */
317 uint unit;
318 void *start[CELL_MAX_TEXTURE_LEVELS]; /**< Address in main memory */
319 ushort width[CELL_MAX_TEXTURE_LEVELS];
320 ushort height[CELL_MAX_TEXTURE_LEVELS];
321 ushort depth[CELL_MAX_TEXTURE_LEVELS];
322 };
323
324
325 #define MAX_SPU_FUNCTIONS 12
326 /**
327 * Used to tell the PPU about the address of particular functions in the
328 * SPU's address space.
329 */
330 struct cell_spu_function_info
331 {
332 uint num;
333 char names[MAX_SPU_FUNCTIONS][16];
334 uint addrs[MAX_SPU_FUNCTIONS];
335 char pad[12]; /**< Pad struct to multiple of 16 bytes (256 currently) */
336 };
337
338
339 /** This is the object passed to spe_create_thread() */
340 struct cell_init_info
341 {
342 unsigned id;
343 unsigned num_spus;
344 unsigned debug_flags; /**< mask of CELL_DEBUG_x flags */
345 float inv_timebase; /**< 1.0/timebase, for perf measurement */
346
347 /** Buffers for command batches, vertex/index data */
348 ubyte *buffers[CELL_NUM_BUFFERS];
349 uint *buffer_status; /**< points at cell_context->buffer_status */
350
351 struct cell_spu_function_info *spu_functions;
352 } ALIGN16_ATTRIB;
353
354
355 #endif /* CELL_COMMON_H */