1 /**************************************************************************
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * SPU command processing code
37 #include "pipe/p_defines.h"
39 #include "spu_command.h"
41 #include "spu_render.h"
42 #include "spu_per_fragment_op.h"
43 #include "spu_texture.h"
45 #include "spu_vertex_shader.h"
46 #include "spu_dcache.h"
47 #include "spu_debug.h"
48 #include "cell/common.h"
51 struct spu_vs_context draw
;
55 * Buffers containing dynamically generated SPU code:
57 static unsigned char attribute_fetch_code_buffer
[136 * PIPE_MAX_ATTRIBS
]
63 align(int value
, int alignment
)
65 return (value
+ alignment
- 1) & ~(alignment
- 1);
71 * Tell the PPU that this SPU has finished copying a buffer to
72 * local store and that it may be reused by the PPU.
73 * This is done by writting a 16-byte batch-buffer-status block back into
74 * main memory (in cell_context->buffer_status[]).
77 release_buffer(uint buffer
)
79 /* Evidently, using less than a 16-byte status doesn't work reliably */
80 static const uint status
[4] ALIGN16_ATTRIB
81 = {CELL_BUFFER_STATUS_FREE
, 0, 0, 0};
83 const uint index
= 4 * (spu
.init
.id
* CELL_NUM_BUFFERS
+ buffer
);
84 uint
*dst
= spu
.init
.buffer_status
+ index
;
86 ASSERT(buffer
< CELL_NUM_BUFFERS
);
88 mfc_put((void *) &status
, /* src in local memory */
89 (unsigned int) dst
, /* dst in main memory */
90 sizeof(status
), /* size */
91 TAG_MISC
, /* tag is unimportant */
98 cmd_clear_surface(const struct cell_command_clear_surface
*clear
)
100 DEBUG_PRINTF("CLEAR SURF %u to 0x%08x\n", clear
->surface
, clear
->value
);
102 if (clear
->surface
== 0) {
103 spu
.fb
.color_clear_value
= clear
->value
;
104 if (spu
.init
.debug_flags
& CELL_DEBUG_CHECKER
) {
105 uint x
= (spu
.init
.id
<< 4) | (spu
.init
.id
<< 12) |
106 (spu
.init
.id
<< 20) | (spu
.init
.id
<< 28);
107 spu
.fb
.color_clear_value
^= x
;
111 spu
.fb
.depth_clear_value
= clear
->value
;
117 /* Simply set all tiles' status to CLEAR.
118 * When we actually begin rendering into a tile, we'll initialize it to
119 * the clear value. If any tiles go untouched during the frame,
120 * really_clear_tiles() will set them to the clear value.
122 if (clear
->surface
== 0) {
123 memset(spu
.ctile_status
, TILE_STATUS_CLEAR
, sizeof(spu
.ctile_status
));
126 memset(spu
.ztile_status
, TILE_STATUS_CLEAR
, sizeof(spu
.ztile_status
));
132 * This path clears the whole framebuffer to the clear color right now.
136 printf("SPU: %s num=%d w=%d h=%d\n",
137 __FUNCTION__, num_tiles, spu.fb.width_tiles, spu.fb.height_tiles);
140 /* init a single tile to the clear value */
141 if (clear
->surface
== 0) {
142 clear_c_tile(&spu
.ctile
);
145 clear_z_tile(&spu
.ztile
);
148 /* walk over my tiles, writing the 'clear' tile's data */
150 const uint num_tiles
= spu
.fb
.width_tiles
* spu
.fb
.height_tiles
;
152 for (i
= spu
.init
.id
; i
< num_tiles
; i
+= spu
.init
.num_spus
) {
153 uint tx
= i
% spu
.fb
.width_tiles
;
154 uint ty
= i
/ spu
.fb
.width_tiles
;
155 if (clear
->surface
== 0)
156 put_tile(tx
, ty
, &spu
.ctile
, TAG_SURFACE_CLEAR
, 0);
158 put_tile(tx
, ty
, &spu
.ztile
, TAG_SURFACE_CLEAR
, 1);
162 if (spu
.init
.debug_flags
& CELL_DEBUG_SYNC
) {
163 wait_on_mask(1 << TAG_SURFACE_CLEAR
);
166 #endif /* CLEAR_OPT */
168 DEBUG_PRINTF("CLEAR SURF done\n");
173 cmd_release_verts(const struct cell_command_release_verts
*release
)
175 DEBUG_PRINTF("RELEASE VERTS %u\n", release
->vertex_buf
);
176 ASSERT(release
->vertex_buf
!= ~0U);
177 release_buffer(release
->vertex_buf
);
182 * Process a CELL_CMD_STATE_FRAGMENT_OPS command.
183 * This involves installing new fragment ops SPU code.
184 * If this function is never called, we'll use a regular C fallback function
185 * for fragment processing.
188 cmd_state_fragment_ops(const struct cell_command_fragment_ops
*fops
)
190 static int warned
= 0;
192 DEBUG_PRINTF("CMD_STATE_FRAGMENT_OPS\n");
193 /* Copy SPU code from batch buffer to spu buffer */
194 memcpy(spu
.fragment_ops_code
, fops
->code
, SPU_MAX_FRAGMENT_OPS_INSTS
* 4);
195 /* Copy state info (for fallback case only) */
196 memcpy(&spu
.depth_stencil_alpha
, &fops
->dsa
, sizeof(fops
->dsa
));
197 memcpy(&spu
.blend
, &fops
->blend
, sizeof(fops
->blend
));
199 /* Parity twist! For now, always use the fallback code by default,
200 * only switching to codegen when specifically requested. This
201 * allows us to develop freely without risking taking down the
204 * Later, the parity of this check will be reversed, so that
205 * codegen is *always* used, unless we specifically indicate that
208 * Eventually, the option will be removed completely, because in
209 * final code we'll always use codegen and won't even provide the
210 * raw state records that the fallback code requires.
212 if ((spu
.init
.debug_flags
& CELL_DEBUG_FRAGMENT_OP_FALLBACK
) == 0) {
213 spu
.fragment_ops
= (spu_fragment_ops_func
) spu
.fragment_ops_code
;
216 /* otherwise, the default fallback code remains in place */
218 fprintf(stderr
, "Cell Warning: using fallback per-fragment code\n");
223 spu
.read_depth
= spu
.depth_stencil_alpha
.depth
.enabled
;
224 spu
.read_stencil
= spu
.depth_stencil_alpha
.stencil
[0].enabled
;
229 cmd_state_fragment_program(const struct cell_command_fragment_program
*fp
)
231 DEBUG_PRINTF("CMD_STATE_FRAGMENT_PROGRAM\n");
232 /* Copy SPU code from batch buffer to spu buffer */
233 memcpy(spu
.fragment_program_code
, fp
->code
,
234 SPU_MAX_FRAGMENT_PROGRAM_INSTS
* 4);
236 /* Point function pointer at new code */
237 spu
.fragment_program
= (spu_fragment_program_func
)spu
.fragment_program_code
;
243 cmd_state_fs_constants(const uint64_t *buffer
, uint pos
)
245 const uint num_const
= buffer
[pos
+ 1];
246 const float *constants
= (const float *) &buffer
[pos
+ 2];
249 DEBUG_PRINTF("CMD_STATE_FS_CONSTANTS (%u)\n", num_const
);
251 /* Expand each float to float[4] for SOA execution */
252 for (i
= 0; i
< num_const
; i
++) {
253 spu
.constants
[i
] = spu_splats(constants
[i
]);
256 /* return new buffer pos (in 8-byte words) */
257 return pos
+ 2 + num_const
/ 2;
262 cmd_state_framebuffer(const struct cell_command_framebuffer
*cmd
)
264 DEBUG_PRINTF("FRAMEBUFFER: %d x %d at %p, cformat 0x%x zformat 0x%x\n",
271 ASSERT_ALIGN16(cmd
->color_start
);
272 ASSERT_ALIGN16(cmd
->depth_start
);
274 spu
.fb
.color_start
= cmd
->color_start
;
275 spu
.fb
.depth_start
= cmd
->depth_start
;
276 spu
.fb
.color_format
= cmd
->color_format
;
277 spu
.fb
.depth_format
= cmd
->depth_format
;
278 spu
.fb
.width
= cmd
->width
;
279 spu
.fb
.height
= cmd
->height
;
280 spu
.fb
.width_tiles
= (spu
.fb
.width
+ TILE_SIZE
- 1) / TILE_SIZE
;
281 spu
.fb
.height_tiles
= (spu
.fb
.height
+ TILE_SIZE
- 1) / TILE_SIZE
;
283 switch (spu
.fb
.depth_format
) {
284 case PIPE_FORMAT_Z32_UNORM
:
286 spu
.fb
.zscale
= (float) 0xffffffffu
;
288 case PIPE_FORMAT_Z24S8_UNORM
:
289 case PIPE_FORMAT_S8Z24_UNORM
:
290 case PIPE_FORMAT_Z24X8_UNORM
:
291 case PIPE_FORMAT_X8Z24_UNORM
:
293 spu
.fb
.zscale
= (float) 0x00ffffffu
;
295 case PIPE_FORMAT_Z16_UNORM
:
297 spu
.fb
.zscale
= (float) 0xffffu
;
307 * Tex texture mask_s/t and scale_s/t fields depend on the texture size and
308 * sampler wrap modes.
311 update_tex_masks(struct spu_texture
*texture
,
312 const struct pipe_sampler_state
*sampler
,
317 for (i
= 0; i
< CELL_MAX_TEXTURE_LEVELS
; i
++) {
318 int width
= texture
->level
[i
].width
;
319 int height
= texture
->level
[i
].height
;
321 if (sampler
->wrap_s
== PIPE_TEX_WRAP_REPEAT
)
322 texture
->level
[i
].mask_s
= spu_splats(width
- 1);
324 texture
->level
[i
].mask_s
= spu_splats(~0);
326 if (sampler
->wrap_t
== PIPE_TEX_WRAP_REPEAT
)
327 texture
->level
[i
].mask_t
= spu_splats(height
- 1);
329 texture
->level
[i
].mask_t
= spu_splats(~0);
331 if (sampler
->normalized_coords
) {
332 texture
->level
[i
].scale_s
= spu_splats((float) width
);
333 texture
->level
[i
].scale_t
= spu_splats((float) height
);
336 texture
->level
[i
].scale_s
= spu_splats(1.0f
);
337 texture
->level
[i
].scale_t
= spu_splats(1.0f
);
341 /* XXX temporary hack */
342 if (texture
->target
== PIPE_TEXTURE_CUBE
) {
343 spu
.sample_texture4
[unit
] = sample_texture4_cube
;
349 cmd_state_sampler(const struct cell_command_sampler
*sampler
)
351 uint unit
= sampler
->unit
;
353 DEBUG_PRINTF("SAMPLER [%u]\n", unit
);
355 spu
.sampler
[unit
] = sampler
->state
;
357 switch (spu
.sampler
[unit
].min_img_filter
) {
358 case PIPE_TEX_FILTER_LINEAR
:
359 spu
.min_sample_texture4
[unit
] = sample_texture4_bilinear
;
361 case PIPE_TEX_FILTER_ANISO
:
362 /* fall-through, for now */
363 case PIPE_TEX_FILTER_NEAREST
:
364 spu
.min_sample_texture4
[unit
] = sample_texture4_nearest
;
370 switch (spu
.sampler
[sampler
->unit
].mag_img_filter
) {
371 case PIPE_TEX_FILTER_LINEAR
:
372 spu
.mag_sample_texture4
[unit
] = sample_texture4_bilinear
;
374 case PIPE_TEX_FILTER_ANISO
:
375 /* fall-through, for now */
376 case PIPE_TEX_FILTER_NEAREST
:
377 spu
.mag_sample_texture4
[unit
] = sample_texture4_nearest
;
383 switch (spu
.sampler
[sampler
->unit
].min_mip_filter
) {
384 case PIPE_TEX_MIPFILTER_NEAREST
:
385 case PIPE_TEX_MIPFILTER_LINEAR
:
386 spu
.sample_texture4
[unit
] = sample_texture4_lod
;
388 case PIPE_TEX_MIPFILTER_NONE
:
389 spu
.sample_texture4
[unit
] = spu
.mag_sample_texture4
[unit
];
395 update_tex_masks(&spu
.texture
[unit
], &spu
.sampler
[unit
], unit
);
400 cmd_state_texture(const struct cell_command_texture
*texture
)
402 const uint unit
= texture
->unit
;
405 //if (spu.init.id==0) Debug=1;
407 DEBUG_PRINTF("TEXTURE [%u]\n", texture
->unit
);
409 spu
.texture
[unit
].max_level
= 0;
410 spu
.texture
[unit
].target
= texture
->target
;
412 for (i
= 0; i
< CELL_MAX_TEXTURE_LEVELS
; i
++) {
413 uint width
= texture
->width
[i
];
414 uint height
= texture
->height
[i
];
415 uint depth
= texture
->depth
[i
];
417 DEBUG_PRINTF(" LEVEL %u: at %p size[0] %u x %u\n", i
,
418 texture
->start
[i
], texture
->width
[i
], texture
->height
[i
]);
420 spu
.texture
[unit
].level
[i
].start
= texture
->start
[i
];
421 spu
.texture
[unit
].level
[i
].width
= width
;
422 spu
.texture
[unit
].level
[i
].height
= height
;
423 spu
.texture
[unit
].level
[i
].depth
= depth
;
425 spu
.texture
[unit
].level
[i
].tiles_per_row
=
426 (width
+ TILE_SIZE
- 1) / TILE_SIZE
;
428 spu
.texture
[unit
].level
[i
].bytes_per_image
=
429 4 * align(width
, TILE_SIZE
) * align(height
, TILE_SIZE
) * depth
;
431 spu
.texture
[unit
].level
[i
].max_s
= spu_splats((int) width
- 1);
432 spu
.texture
[unit
].level
[i
].max_t
= spu_splats((int) height
- 1);
434 if (texture
->start
[i
])
435 spu
.texture
[unit
].max_level
= i
;
438 update_tex_masks(&spu
.texture
[unit
], &spu
.sampler
[unit
], unit
);
445 cmd_state_vertex_info(const struct vertex_info
*vinfo
)
447 DEBUG_PRINTF("VERTEX_INFO num_attribs=%u\n", vinfo
->num_attribs
);
448 ASSERT(vinfo
->num_attribs
>= 1);
449 ASSERT(vinfo
->num_attribs
<= 8);
450 memcpy(&spu
.vertex_info
, vinfo
, sizeof(*vinfo
));
455 cmd_state_vs_array_info(const struct cell_array_info
*vs_info
)
457 const unsigned attr
= vs_info
->attr
;
459 ASSERT(attr
< PIPE_MAX_ATTRIBS
);
460 draw
.vertex_fetch
.src_ptr
[attr
] = vs_info
->base
;
461 draw
.vertex_fetch
.pitch
[attr
] = vs_info
->pitch
;
462 draw
.vertex_fetch
.size
[attr
] = vs_info
->size
;
463 draw
.vertex_fetch
.code_offset
[attr
] = vs_info
->function_offset
;
464 draw
.vertex_fetch
.dirty
= 1;
469 cmd_state_attrib_fetch(const struct cell_attribute_fetch_code
*code
)
471 mfc_get(attribute_fetch_code_buffer
,
472 (unsigned int) code
->base
, /* src */
477 wait_on_mask(1 << TAG_BATCH_BUFFER
);
479 draw
.vertex_fetch
.code
= attribute_fetch_code_buffer
;
486 DEBUG_PRINTF("FINISH\n");
487 really_clear_tiles(0);
488 /* wait for all outstanding DMAs to finish */
489 mfc_write_tag_mask(~0);
490 mfc_read_tag_status_all();
491 /* send mbox message to PPU */
492 spu_write_out_mbox(CELL_CMD_FINISH
);
497 * Execute a batch of commands which was sent to us by the PPU.
498 * See the cell_emit_state.c code to see where the commands come from.
500 * The opcode param encodes the location of the buffer and its size.
503 cmd_batch(uint opcode
)
505 const uint buf
= (opcode
>> 8) & 0xff;
506 uint size
= (opcode
>> 16);
507 uint64_t buffer
[CELL_BUFFER_SIZE
/ 8] ALIGN16_ATTRIB
;
508 const unsigned usize
= size
/ sizeof(buffer
[0]);
511 DEBUG_PRINTF("BATCH buffer %u, len %u, from %p\n",
512 buf
, size
, spu
.init
.buffers
[buf
]);
514 ASSERT((opcode
& CELL_CMD_OPCODE_MASK
) == CELL_CMD_BATCH
);
516 ASSERT_ALIGN16(spu
.init
.buffers
[buf
]);
518 size
= ROUNDUP16(size
);
520 ASSERT_ALIGN16(spu
.init
.buffers
[buf
]);
522 mfc_get(buffer
, /* dest */
523 (unsigned int) spu
.init
.buffers
[buf
], /* src */
528 wait_on_mask(1 << TAG_BATCH_BUFFER
);
530 /* Tell PPU we're done copying the buffer to local store */
531 DEBUG_PRINTF("release batch buf %u\n", buf
);
535 * Loop over commands in the batch buffer
537 for (pos
= 0; pos
< usize
; /* no incr */) {
538 switch (buffer
[pos
]) {
542 case CELL_CMD_CLEAR_SURFACE
:
544 struct cell_command_clear_surface
*clr
545 = (struct cell_command_clear_surface
*) &buffer
[pos
];
546 cmd_clear_surface(clr
);
547 pos
+= sizeof(*clr
) / 8;
550 case CELL_CMD_RENDER
:
552 struct cell_command_render
*render
553 = (struct cell_command_render
*) &buffer
[pos
];
555 cmd_render(render
, &pos_incr
);
560 * state-update commands
562 case CELL_CMD_STATE_FRAMEBUFFER
:
564 struct cell_command_framebuffer
*fb
565 = (struct cell_command_framebuffer
*) &buffer
[pos
];
566 cmd_state_framebuffer(fb
);
567 pos
+= sizeof(*fb
) / 8;
570 case CELL_CMD_STATE_FRAGMENT_OPS
:
572 struct cell_command_fragment_ops
*fops
573 = (struct cell_command_fragment_ops
*) &buffer
[pos
];
574 cmd_state_fragment_ops(fops
);
575 pos
+= sizeof(*fops
) / 8;
578 case CELL_CMD_STATE_FRAGMENT_PROGRAM
:
580 struct cell_command_fragment_program
*fp
581 = (struct cell_command_fragment_program
*) &buffer
[pos
];
582 cmd_state_fragment_program(fp
);
583 pos
+= sizeof(*fp
) / 8;
586 case CELL_CMD_STATE_FS_CONSTANTS
:
587 pos
= cmd_state_fs_constants(buffer
, pos
);
589 case CELL_CMD_STATE_SAMPLER
:
591 struct cell_command_sampler
*sampler
592 = (struct cell_command_sampler
*) &buffer
[pos
];
593 cmd_state_sampler(sampler
);
594 pos
+= sizeof(*sampler
) / 8;
597 case CELL_CMD_STATE_TEXTURE
:
599 struct cell_command_texture
*texture
600 = (struct cell_command_texture
*) &buffer
[pos
];
601 cmd_state_texture(texture
);
602 pos
+= sizeof(*texture
) / 8;
605 case CELL_CMD_STATE_VERTEX_INFO
:
606 cmd_state_vertex_info((struct vertex_info
*) &buffer
[pos
+1]);
607 pos
+= (1 + ROUNDUP8(sizeof(struct vertex_info
)) / 8);
609 case CELL_CMD_STATE_VIEWPORT
:
610 (void) memcpy(& draw
.viewport
, &buffer
[pos
+1],
611 sizeof(struct pipe_viewport_state
));
612 pos
+= (1 + ROUNDUP8(sizeof(struct pipe_viewport_state
)) / 8);
614 case CELL_CMD_STATE_UNIFORMS
:
615 draw
.constants
= (const float (*)[4]) (uintptr_t) buffer
[pos
+ 1];
618 case CELL_CMD_STATE_VS_ARRAY_INFO
:
619 cmd_state_vs_array_info((struct cell_array_info
*) &buffer
[pos
+1]);
620 pos
+= (1 + ROUNDUP8(sizeof(struct cell_array_info
)) / 8);
622 case CELL_CMD_STATE_BIND_VS
:
624 spu_bind_vertex_shader(&draw
,
625 (struct cell_shader_info
*) &buffer
[pos
+1]);
627 pos
+= (1 + ROUNDUP8(sizeof(struct cell_shader_info
)) / 8);
629 case CELL_CMD_STATE_ATTRIB_FETCH
:
630 cmd_state_attrib_fetch((struct cell_attribute_fetch_code
*)
632 pos
+= (1 + ROUNDUP8(sizeof(struct cell_attribute_fetch_code
)) / 8);
637 case CELL_CMD_FINISH
:
641 case CELL_CMD_RELEASE_VERTS
:
643 struct cell_command_release_verts
*release
644 = (struct cell_command_release_verts
*) &buffer
[pos
];
645 cmd_release_verts(release
);
646 pos
+= sizeof(*release
) / 8;
649 case CELL_CMD_FLUSH_BUFFER_RANGE
: {
650 struct cell_buffer_range
*br
= (struct cell_buffer_range
*)
653 spu_dcache_mark_dirty((unsigned) br
->base
, br
->size
);
654 pos
+= (1 + ROUNDUP8(sizeof(struct cell_buffer_range
)) / 8);
658 printf("SPU %u: bad opcode: 0x%llx\n", spu
.init
.id
, buffer
[pos
]);
664 DEBUG_PRINTF("BATCH complete\n");
670 * Main loop for SPEs: Get a command, execute it, repeat.
675 struct cell_command cmd
;
678 DEBUG_PRINTF("Enter command loop\n");
680 ASSERT((sizeof(struct cell_command
) & 0xf) == 0);
681 ASSERT_ALIGN16(&cmd
);
687 DEBUG_PRINTF("Wait for cmd...\n");
689 /* read/wait from mailbox */
690 opcode
= (unsigned int) spu_read_in_mbox();
692 DEBUG_PRINTF("got cmd 0x%x\n", opcode
);
694 /* command payload */
695 mfc_get(&cmd
, /* dest */
696 (unsigned int) spu
.init
.cmd
, /* src */
697 sizeof(struct cell_command
), /* bytes */
701 wait_on_mask( 1 << tag
);
704 * NOTE: most commands should be contained in a batch buffer
707 switch (opcode
& CELL_CMD_OPCODE_MASK
) {
709 DEBUG_PRINTF("EXIT\n");
712 case CELL_CMD_VS_EXECUTE
:
714 spu_execute_vertex_shader(&draw
, &cmd
.vs
);
721 printf("Bad opcode 0x%x!\n", opcode
& CELL_CMD_OPCODE_MASK
);
726 DEBUG_PRINTF("Exit command loop\n");