c28677ebf8764b9de6916882097954daa9494c0b
[mesa.git] / src / gallium / drivers / cell / spu / spu_command.c
1 /**************************************************************************
2 *
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28
29 /**
30 * SPU command processing code
31 */
32
33
34 #include <stdio.h>
35 #include <libmisc.h>
36
37 #include "pipe/p_defines.h"
38
39 #include "spu_command.h"
40 #include "spu_main.h"
41 #include "spu_render.h"
42 #include "spu_per_fragment_op.h"
43 #include "spu_texture.h"
44 #include "spu_tile.h"
45 #include "spu_vertex_shader.h"
46 #include "spu_dcache.h"
47 #include "spu_debug.h"
48 #include "cell/common.h"
49
50
51 struct spu_vs_context draw;
52
53
54 /**
55 * Buffers containing dynamically generated SPU code:
56 */
57 static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS]
58 ALIGN16_ATTRIB;
59
60
61
62 static INLINE int
63 align(int value, int alignment)
64 {
65 return (value + alignment - 1) & ~(alignment - 1);
66 }
67
68
69
70 /**
71 * Tell the PPU that this SPU has finished copying a buffer to
72 * local store and that it may be reused by the PPU.
73 * This is done by writting a 16-byte batch-buffer-status block back into
74 * main memory (in cell_context->buffer_status[]).
75 */
76 static void
77 release_buffer(uint buffer)
78 {
79 /* Evidently, using less than a 16-byte status doesn't work reliably */
80 static const uint status[4] ALIGN16_ATTRIB
81 = {CELL_BUFFER_STATUS_FREE, 0, 0, 0};
82
83 const uint index = 4 * (spu.init.id * CELL_NUM_BUFFERS + buffer);
84 uint *dst = spu.init.buffer_status + index;
85
86 ASSERT(buffer < CELL_NUM_BUFFERS);
87
88 mfc_put((void *) &status, /* src in local memory */
89 (unsigned int) dst, /* dst in main memory */
90 sizeof(status), /* size */
91 TAG_MISC, /* tag is unimportant */
92 0, /* tid */
93 0 /* rid */);
94 }
95
96
97 static void
98 cmd_clear_surface(const struct cell_command_clear_surface *clear)
99 {
100 DEBUG_PRINTF("CLEAR SURF %u to 0x%08x\n", clear->surface, clear->value);
101
102 if (clear->surface == 0) {
103 spu.fb.color_clear_value = clear->value;
104 if (spu.init.debug_flags & CELL_DEBUG_CHECKER) {
105 uint x = (spu.init.id << 4) | (spu.init.id << 12) |
106 (spu.init.id << 20) | (spu.init.id << 28);
107 spu.fb.color_clear_value ^= x;
108 }
109 }
110 else {
111 spu.fb.depth_clear_value = clear->value;
112 }
113
114 #define CLEAR_OPT 1
115 #if CLEAR_OPT
116
117 /* Simply set all tiles' status to CLEAR.
118 * When we actually begin rendering into a tile, we'll initialize it to
119 * the clear value. If any tiles go untouched during the frame,
120 * really_clear_tiles() will set them to the clear value.
121 */
122 if (clear->surface == 0) {
123 memset(spu.ctile_status, TILE_STATUS_CLEAR, sizeof(spu.ctile_status));
124 }
125 else {
126 memset(spu.ztile_status, TILE_STATUS_CLEAR, sizeof(spu.ztile_status));
127 }
128
129 #else
130
131 /*
132 * This path clears the whole framebuffer to the clear color right now.
133 */
134
135 /*
136 printf("SPU: %s num=%d w=%d h=%d\n",
137 __FUNCTION__, num_tiles, spu.fb.width_tiles, spu.fb.height_tiles);
138 */
139
140 /* init a single tile to the clear value */
141 if (clear->surface == 0) {
142 clear_c_tile(&spu.ctile);
143 }
144 else {
145 clear_z_tile(&spu.ztile);
146 }
147
148 /* walk over my tiles, writing the 'clear' tile's data */
149 {
150 const uint num_tiles = spu.fb.width_tiles * spu.fb.height_tiles;
151 uint i;
152 for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) {
153 uint tx = i % spu.fb.width_tiles;
154 uint ty = i / spu.fb.width_tiles;
155 if (clear->surface == 0)
156 put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 0);
157 else
158 put_tile(tx, ty, &spu.ztile, TAG_SURFACE_CLEAR, 1);
159 }
160 }
161
162 if (spu.init.debug_flags & CELL_DEBUG_SYNC) {
163 wait_on_mask(1 << TAG_SURFACE_CLEAR);
164 }
165
166 #endif /* CLEAR_OPT */
167
168 DEBUG_PRINTF("CLEAR SURF done\n");
169 }
170
171
172 static void
173 cmd_release_verts(const struct cell_command_release_verts *release)
174 {
175 DEBUG_PRINTF("RELEASE VERTS %u\n", release->vertex_buf);
176 ASSERT(release->vertex_buf != ~0U);
177 release_buffer(release->vertex_buf);
178 }
179
180
181 /**
182 * Process a CELL_CMD_STATE_FRAGMENT_OPS command.
183 * This involves installing new fragment ops SPU code.
184 * If this function is never called, we'll use a regular C fallback function
185 * for fragment processing.
186 */
187 static void
188 cmd_state_fragment_ops(const struct cell_command_fragment_ops *fops)
189 {
190 static int warned = 0;
191
192 DEBUG_PRINTF("CMD_STATE_FRAGMENT_OPS\n");
193 /* Copy SPU code from batch buffer to spu buffer */
194 memcpy(spu.fragment_ops_code, fops->code, SPU_MAX_FRAGMENT_OPS_INSTS * 4);
195 /* Copy state info (for fallback case only) */
196 memcpy(&spu.depth_stencil_alpha, &fops->dsa, sizeof(fops->dsa));
197 memcpy(&spu.blend, &fops->blend, sizeof(fops->blend));
198
199 /* Parity twist! For now, always use the fallback code by default,
200 * only switching to codegen when specifically requested. This
201 * allows us to develop freely without risking taking down the
202 * branch.
203 *
204 * Later, the parity of this check will be reversed, so that
205 * codegen is *always* used, unless we specifically indicate that
206 * we don't want it.
207 *
208 * Eventually, the option will be removed completely, because in
209 * final code we'll always use codegen and won't even provide the
210 * raw state records that the fallback code requires.
211 */
212 if ((spu.init.debug_flags & CELL_DEBUG_FRAGMENT_OP_FALLBACK) == 0) {
213 spu.fragment_ops = (spu_fragment_ops_func) spu.fragment_ops_code;
214 }
215 else {
216 /* otherwise, the default fallback code remains in place */
217 if (!warned) {
218 fprintf(stderr, "Cell Warning: using fallback per-fragment code\n");
219 warned = 1;
220 }
221 }
222
223 spu.read_depth = spu.depth_stencil_alpha.depth.enabled;
224 spu.read_stencil = spu.depth_stencil_alpha.stencil[0].enabled;
225 }
226
227
228 static void
229 cmd_state_fragment_program(const struct cell_command_fragment_program *fp)
230 {
231 DEBUG_PRINTF("CMD_STATE_FRAGMENT_PROGRAM\n");
232 /* Copy SPU code from batch buffer to spu buffer */
233 memcpy(spu.fragment_program_code, fp->code,
234 SPU_MAX_FRAGMENT_PROGRAM_INSTS * 4);
235 #if 01
236 /* Point function pointer at new code */
237 spu.fragment_program = (spu_fragment_program_func)spu.fragment_program_code;
238 #endif
239 }
240
241
242 static uint
243 cmd_state_fs_constants(const uint64_t *buffer, uint pos)
244 {
245 const uint num_const = buffer[pos + 1];
246 const float *constants = (const float *) &buffer[pos + 2];
247 uint i;
248
249 DEBUG_PRINTF("CMD_STATE_FS_CONSTANTS (%u)\n", num_const);
250
251 /* Expand each float to float[4] for SOA execution */
252 for (i = 0; i < num_const; i++) {
253 spu.constants[i] = spu_splats(constants[i]);
254 }
255
256 /* return new buffer pos (in 8-byte words) */
257 return pos + 2 + num_const / 2;
258 }
259
260
261 static void
262 cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
263 {
264 DEBUG_PRINTF("FRAMEBUFFER: %d x %d at %p, cformat 0x%x zformat 0x%x\n",
265 cmd->width,
266 cmd->height,
267 cmd->color_start,
268 cmd->color_format,
269 cmd->depth_format);
270
271 ASSERT_ALIGN16(cmd->color_start);
272 ASSERT_ALIGN16(cmd->depth_start);
273
274 spu.fb.color_start = cmd->color_start;
275 spu.fb.depth_start = cmd->depth_start;
276 spu.fb.color_format = cmd->color_format;
277 spu.fb.depth_format = cmd->depth_format;
278 spu.fb.width = cmd->width;
279 spu.fb.height = cmd->height;
280 spu.fb.width_tiles = (spu.fb.width + TILE_SIZE - 1) / TILE_SIZE;
281 spu.fb.height_tiles = (spu.fb.height + TILE_SIZE - 1) / TILE_SIZE;
282
283 switch (spu.fb.depth_format) {
284 case PIPE_FORMAT_Z32_UNORM:
285 spu.fb.zsize = 4;
286 spu.fb.zscale = (float) 0xffffffffu;
287 break;
288 case PIPE_FORMAT_Z24S8_UNORM:
289 case PIPE_FORMAT_S8Z24_UNORM:
290 case PIPE_FORMAT_Z24X8_UNORM:
291 case PIPE_FORMAT_X8Z24_UNORM:
292 spu.fb.zsize = 4;
293 spu.fb.zscale = (float) 0x00ffffffu;
294 break;
295 case PIPE_FORMAT_Z16_UNORM:
296 spu.fb.zsize = 2;
297 spu.fb.zscale = (float) 0xffffu;
298 break;
299 default:
300 spu.fb.zsize = 0;
301 break;
302 }
303 }
304
305
306 /**
307 * Tex texture mask_s/t and scale_s/t fields depend on the texture size and
308 * sampler wrap modes.
309 */
310 static void
311 update_tex_masks(struct spu_texture *texture,
312 const struct pipe_sampler_state *sampler,
313 uint unit)
314 {
315 uint i;
316
317 for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
318 int width = texture->level[i].width;
319 int height = texture->level[i].height;
320
321 if (sampler->wrap_s == PIPE_TEX_WRAP_REPEAT)
322 texture->level[i].mask_s = spu_splats(width - 1);
323 else
324 texture->level[i].mask_s = spu_splats(~0);
325
326 if (sampler->wrap_t == PIPE_TEX_WRAP_REPEAT)
327 texture->level[i].mask_t = spu_splats(height - 1);
328 else
329 texture->level[i].mask_t = spu_splats(~0);
330
331 if (sampler->normalized_coords) {
332 texture->level[i].scale_s = spu_splats((float) width);
333 texture->level[i].scale_t = spu_splats((float) height);
334 }
335 else {
336 texture->level[i].scale_s = spu_splats(1.0f);
337 texture->level[i].scale_t = spu_splats(1.0f);
338 }
339 }
340
341 /* XXX temporary hack */
342 if (texture->target == PIPE_TEXTURE_CUBE) {
343 spu.sample_texture4[unit] = sample_texture4_cube;
344 }
345 }
346
347
348 static void
349 cmd_state_sampler(const struct cell_command_sampler *sampler)
350 {
351 uint unit = sampler->unit;
352
353 DEBUG_PRINTF("SAMPLER [%u]\n", unit);
354
355 spu.sampler[unit] = sampler->state;
356
357 switch (spu.sampler[unit].min_img_filter) {
358 case PIPE_TEX_FILTER_LINEAR:
359 spu.min_sample_texture4[unit] = sample_texture4_bilinear;
360 break;
361 case PIPE_TEX_FILTER_ANISO:
362 /* fall-through, for now */
363 case PIPE_TEX_FILTER_NEAREST:
364 spu.min_sample_texture4[unit] = sample_texture4_nearest;
365 break;
366 default:
367 ASSERT(0);
368 }
369
370 switch (spu.sampler[sampler->unit].mag_img_filter) {
371 case PIPE_TEX_FILTER_LINEAR:
372 spu.mag_sample_texture4[unit] = sample_texture4_bilinear;
373 break;
374 case PIPE_TEX_FILTER_ANISO:
375 /* fall-through, for now */
376 case PIPE_TEX_FILTER_NEAREST:
377 spu.mag_sample_texture4[unit] = sample_texture4_nearest;
378 break;
379 default:
380 ASSERT(0);
381 }
382
383 switch (spu.sampler[sampler->unit].min_mip_filter) {
384 case PIPE_TEX_MIPFILTER_NEAREST:
385 case PIPE_TEX_MIPFILTER_LINEAR:
386 spu.sample_texture4[unit] = sample_texture4_lod;
387 break;
388 case PIPE_TEX_MIPFILTER_NONE:
389 spu.sample_texture4[unit] = spu.mag_sample_texture4[unit];
390 break;
391 default:
392 ASSERT(0);
393 }
394
395 update_tex_masks(&spu.texture[unit], &spu.sampler[unit], unit);
396 }
397
398
399 static void
400 cmd_state_texture(const struct cell_command_texture *texture)
401 {
402 const uint unit = texture->unit;
403 uint i;
404
405 //if (spu.init.id==0) Debug=1;
406
407 DEBUG_PRINTF("TEXTURE [%u]\n", texture->unit);
408
409 spu.texture[unit].max_level = 0;
410 spu.texture[unit].target = texture->target;
411
412 for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
413 uint width = texture->width[i];
414 uint height = texture->height[i];
415 uint depth = texture->depth[i];
416
417 DEBUG_PRINTF(" LEVEL %u: at %p size[0] %u x %u\n", i,
418 texture->start[i], texture->width[i], texture->height[i]);
419
420 spu.texture[unit].level[i].start = texture->start[i];
421 spu.texture[unit].level[i].width = width;
422 spu.texture[unit].level[i].height = height;
423 spu.texture[unit].level[i].depth = depth;
424
425 spu.texture[unit].level[i].tiles_per_row =
426 (width + TILE_SIZE - 1) / TILE_SIZE;
427
428 spu.texture[unit].level[i].bytes_per_image =
429 4 * align(width, TILE_SIZE) * align(height, TILE_SIZE) * depth;
430
431 spu.texture[unit].level[i].max_s = spu_splats((int) width - 1);
432 spu.texture[unit].level[i].max_t = spu_splats((int) height - 1);
433
434 if (texture->start[i])
435 spu.texture[unit].max_level = i;
436 }
437
438 update_tex_masks(&spu.texture[unit], &spu.sampler[unit], unit);
439
440 //Debug=0;
441 }
442
443
444 static void
445 cmd_state_vertex_info(const struct vertex_info *vinfo)
446 {
447 DEBUG_PRINTF("VERTEX_INFO num_attribs=%u\n", vinfo->num_attribs);
448 ASSERT(vinfo->num_attribs >= 1);
449 ASSERT(vinfo->num_attribs <= 8);
450 memcpy(&spu.vertex_info, vinfo, sizeof(*vinfo));
451 }
452
453
454 static void
455 cmd_state_vs_array_info(const struct cell_array_info *vs_info)
456 {
457 const unsigned attr = vs_info->attr;
458
459 ASSERT(attr < PIPE_MAX_ATTRIBS);
460 draw.vertex_fetch.src_ptr[attr] = vs_info->base;
461 draw.vertex_fetch.pitch[attr] = vs_info->pitch;
462 draw.vertex_fetch.size[attr] = vs_info->size;
463 draw.vertex_fetch.code_offset[attr] = vs_info->function_offset;
464 draw.vertex_fetch.dirty = 1;
465 }
466
467
468 static void
469 cmd_state_attrib_fetch(const struct cell_attribute_fetch_code *code)
470 {
471 mfc_get(attribute_fetch_code_buffer,
472 (unsigned int) code->base, /* src */
473 code->size,
474 TAG_BATCH_BUFFER,
475 0, /* tid */
476 0 /* rid */);
477 wait_on_mask(1 << TAG_BATCH_BUFFER);
478
479 draw.vertex_fetch.code = attribute_fetch_code_buffer;
480 }
481
482
483 static void
484 cmd_finish(void)
485 {
486 DEBUG_PRINTF("FINISH\n");
487 really_clear_tiles(0);
488 /* wait for all outstanding DMAs to finish */
489 mfc_write_tag_mask(~0);
490 mfc_read_tag_status_all();
491 /* send mbox message to PPU */
492 spu_write_out_mbox(CELL_CMD_FINISH);
493 }
494
495
496 /**
497 * Execute a batch of commands which was sent to us by the PPU.
498 * See the cell_emit_state.c code to see where the commands come from.
499 *
500 * The opcode param encodes the location of the buffer and its size.
501 */
502 static void
503 cmd_batch(uint opcode)
504 {
505 const uint buf = (opcode >> 8) & 0xff;
506 uint size = (opcode >> 16);
507 uint64_t buffer[CELL_BUFFER_SIZE / 8] ALIGN16_ATTRIB;
508 const unsigned usize = size / sizeof(buffer[0]);
509 uint pos;
510
511 DEBUG_PRINTF("BATCH buffer %u, len %u, from %p\n",
512 buf, size, spu.init.buffers[buf]);
513
514 ASSERT((opcode & CELL_CMD_OPCODE_MASK) == CELL_CMD_BATCH);
515
516 ASSERT_ALIGN16(spu.init.buffers[buf]);
517
518 size = ROUNDUP16(size);
519
520 ASSERT_ALIGN16(spu.init.buffers[buf]);
521
522 mfc_get(buffer, /* dest */
523 (unsigned int) spu.init.buffers[buf], /* src */
524 size,
525 TAG_BATCH_BUFFER,
526 0, /* tid */
527 0 /* rid */);
528 wait_on_mask(1 << TAG_BATCH_BUFFER);
529
530 /* Tell PPU we're done copying the buffer to local store */
531 DEBUG_PRINTF("release batch buf %u\n", buf);
532 release_buffer(buf);
533
534 /*
535 * Loop over commands in the batch buffer
536 */
537 for (pos = 0; pos < usize; /* no incr */) {
538 switch (buffer[pos]) {
539 /*
540 * rendering commands
541 */
542 case CELL_CMD_CLEAR_SURFACE:
543 {
544 struct cell_command_clear_surface *clr
545 = (struct cell_command_clear_surface *) &buffer[pos];
546 cmd_clear_surface(clr);
547 pos += sizeof(*clr) / 8;
548 }
549 break;
550 case CELL_CMD_RENDER:
551 {
552 struct cell_command_render *render
553 = (struct cell_command_render *) &buffer[pos];
554 uint pos_incr;
555 cmd_render(render, &pos_incr);
556 pos += pos_incr;
557 }
558 break;
559 /*
560 * state-update commands
561 */
562 case CELL_CMD_STATE_FRAMEBUFFER:
563 {
564 struct cell_command_framebuffer *fb
565 = (struct cell_command_framebuffer *) &buffer[pos];
566 cmd_state_framebuffer(fb);
567 pos += sizeof(*fb) / 8;
568 }
569 break;
570 case CELL_CMD_STATE_FRAGMENT_OPS:
571 {
572 struct cell_command_fragment_ops *fops
573 = (struct cell_command_fragment_ops *) &buffer[pos];
574 cmd_state_fragment_ops(fops);
575 pos += sizeof(*fops) / 8;
576 }
577 break;
578 case CELL_CMD_STATE_FRAGMENT_PROGRAM:
579 {
580 struct cell_command_fragment_program *fp
581 = (struct cell_command_fragment_program *) &buffer[pos];
582 cmd_state_fragment_program(fp);
583 pos += sizeof(*fp) / 8;
584 }
585 break;
586 case CELL_CMD_STATE_FS_CONSTANTS:
587 pos = cmd_state_fs_constants(buffer, pos);
588 break;
589 case CELL_CMD_STATE_SAMPLER:
590 {
591 struct cell_command_sampler *sampler
592 = (struct cell_command_sampler *) &buffer[pos];
593 cmd_state_sampler(sampler);
594 pos += sizeof(*sampler) / 8;
595 }
596 break;
597 case CELL_CMD_STATE_TEXTURE:
598 {
599 struct cell_command_texture *texture
600 = (struct cell_command_texture *) &buffer[pos];
601 cmd_state_texture(texture);
602 pos += sizeof(*texture) / 8;
603 }
604 break;
605 case CELL_CMD_STATE_VERTEX_INFO:
606 cmd_state_vertex_info((struct vertex_info *) &buffer[pos+1]);
607 pos += (1 + ROUNDUP8(sizeof(struct vertex_info)) / 8);
608 break;
609 case CELL_CMD_STATE_VIEWPORT:
610 (void) memcpy(& draw.viewport, &buffer[pos+1],
611 sizeof(struct pipe_viewport_state));
612 pos += (1 + ROUNDUP8(sizeof(struct pipe_viewport_state)) / 8);
613 break;
614 case CELL_CMD_STATE_UNIFORMS:
615 draw.constants = (const float (*)[4]) (uintptr_t) buffer[pos + 1];
616 pos += 2;
617 break;
618 case CELL_CMD_STATE_VS_ARRAY_INFO:
619 cmd_state_vs_array_info((struct cell_array_info *) &buffer[pos+1]);
620 pos += (1 + ROUNDUP8(sizeof(struct cell_array_info)) / 8);
621 break;
622 case CELL_CMD_STATE_BIND_VS:
623 #if 0
624 spu_bind_vertex_shader(&draw,
625 (struct cell_shader_info *) &buffer[pos+1]);
626 #endif
627 pos += (1 + ROUNDUP8(sizeof(struct cell_shader_info)) / 8);
628 break;
629 case CELL_CMD_STATE_ATTRIB_FETCH:
630 cmd_state_attrib_fetch((struct cell_attribute_fetch_code *)
631 &buffer[pos+1]);
632 pos += (1 + ROUNDUP8(sizeof(struct cell_attribute_fetch_code)) / 8);
633 break;
634 /*
635 * misc commands
636 */
637 case CELL_CMD_FINISH:
638 cmd_finish();
639 pos += 1;
640 break;
641 case CELL_CMD_RELEASE_VERTS:
642 {
643 struct cell_command_release_verts *release
644 = (struct cell_command_release_verts *) &buffer[pos];
645 cmd_release_verts(release);
646 pos += sizeof(*release) / 8;
647 }
648 break;
649 case CELL_CMD_FLUSH_BUFFER_RANGE: {
650 struct cell_buffer_range *br = (struct cell_buffer_range *)
651 &buffer[pos+1];
652
653 spu_dcache_mark_dirty((unsigned) br->base, br->size);
654 pos += (1 + ROUNDUP8(sizeof(struct cell_buffer_range)) / 8);
655 break;
656 }
657 default:
658 printf("SPU %u: bad opcode: 0x%llx\n", spu.init.id, buffer[pos]);
659 ASSERT(0);
660 break;
661 }
662 }
663
664 DEBUG_PRINTF("BATCH complete\n");
665 }
666
667
668
669 /**
670 * Main loop for SPEs: Get a command, execute it, repeat.
671 */
672 void
673 command_loop(void)
674 {
675 struct cell_command cmd;
676 int exitFlag = 0;
677
678 DEBUG_PRINTF("Enter command loop\n");
679
680 ASSERT((sizeof(struct cell_command) & 0xf) == 0);
681 ASSERT_ALIGN16(&cmd);
682
683 while (!exitFlag) {
684 unsigned opcode;
685 int tag = 0;
686
687 DEBUG_PRINTF("Wait for cmd...\n");
688
689 /* read/wait from mailbox */
690 opcode = (unsigned int) spu_read_in_mbox();
691
692 DEBUG_PRINTF("got cmd 0x%x\n", opcode);
693
694 /* command payload */
695 mfc_get(&cmd, /* dest */
696 (unsigned int) spu.init.cmd, /* src */
697 sizeof(struct cell_command), /* bytes */
698 tag,
699 0, /* tid */
700 0 /* rid */);
701 wait_on_mask( 1 << tag );
702
703 /*
704 * NOTE: most commands should be contained in a batch buffer
705 */
706
707 switch (opcode & CELL_CMD_OPCODE_MASK) {
708 case CELL_CMD_EXIT:
709 DEBUG_PRINTF("EXIT\n");
710 exitFlag = 1;
711 break;
712 case CELL_CMD_VS_EXECUTE:
713 #if 0
714 spu_execute_vertex_shader(&draw, &cmd.vs);
715 #endif
716 break;
717 case CELL_CMD_BATCH:
718 cmd_batch(opcode);
719 break;
720 default:
721 printf("Bad opcode 0x%x!\n", opcode & CELL_CMD_OPCODE_MASK);
722 }
723
724 }
725
726 DEBUG_PRINTF("Exit command loop\n");
727
728 spu_dcache_report();
729 }