1 /**************************************************************************
3 * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
30 * SPU command processing code
37 #include "pipe/p_defines.h"
39 #include "spu_command.h"
41 #include "spu_render.h"
42 #include "spu_per_fragment_op.h"
43 #include "spu_texture.h"
45 #include "spu_vertex_shader.h"
46 #include "spu_dcache.h"
47 #include "cell/common.h"
50 struct spu_vs_context draw
;
54 * Buffers containing dynamically generated SPU code:
56 static unsigned char attribute_fetch_code_buffer
[136 * PIPE_MAX_ATTRIBS
]
62 align(int value
, int alignment
)
64 return (value
+ alignment
- 1) & ~(alignment
- 1);
70 * Tell the PPU that this SPU has finished copying a buffer to
71 * local store and that it may be reused by the PPU.
72 * This is done by writting a 16-byte batch-buffer-status block back into
73 * main memory (in cell_context->buffer_status[]).
76 release_buffer(uint buffer
)
78 /* Evidently, using less than a 16-byte status doesn't work reliably */
79 static const vector
unsigned int status
= {CELL_BUFFER_STATUS_FREE
,
80 CELL_BUFFER_STATUS_FREE
,
81 CELL_BUFFER_STATUS_FREE
,
82 CELL_BUFFER_STATUS_FREE
};
83 const uint index
= 4 * (spu
.init
.id
* CELL_NUM_BUFFERS
+ buffer
);
84 uint
*dst
= spu
.init
.buffer_status
+ index
;
86 ASSERT(buffer
< CELL_NUM_BUFFERS
);
88 mfc_put((void *) &status
, /* src in local memory */
89 (unsigned int) dst
, /* dst in main memory */
90 sizeof(status
), /* size */
91 TAG_MISC
, /* tag is unimportant */
98 * Write CELL_FENCE_SIGNALLED back to the fence status qword in main memory.
99 * There's a qword of status per SPU.
102 cmd_fence(struct cell_command_fence
*fence_cmd
)
104 static const vector
unsigned int status
= {CELL_FENCE_SIGNALLED
,
105 CELL_FENCE_SIGNALLED
,
106 CELL_FENCE_SIGNALLED
,
107 CELL_FENCE_SIGNALLED
};
108 uint
*dst
= (uint
*) fence_cmd
->fence
;
109 dst
+= 4 * spu
.init
.id
; /* main store/memory address, not local store */
111 mfc_put((void *) &status
, /* src in local memory */
112 (unsigned int) dst
, /* dst in main memory */
113 sizeof(status
), /* size */
121 cmd_clear_surface(const struct cell_command_clear_surface
*clear
)
123 D_PRINTF(CELL_DEBUG_CMD
, "CLEAR SURF %u to 0x%08x\n", clear
->surface
, clear
->value
);
125 if (clear
->surface
== 0) {
126 spu
.fb
.color_clear_value
= clear
->value
;
127 if (spu
.init
.debug_flags
& CELL_DEBUG_CHECKER
) {
128 uint x
= (spu
.init
.id
<< 4) | (spu
.init
.id
<< 12) |
129 (spu
.init
.id
<< 20) | (spu
.init
.id
<< 28);
130 spu
.fb
.color_clear_value
^= x
;
134 spu
.fb
.depth_clear_value
= clear
->value
;
140 /* Simply set all tiles' status to CLEAR.
141 * When we actually begin rendering into a tile, we'll initialize it to
142 * the clear value. If any tiles go untouched during the frame,
143 * really_clear_tiles() will set them to the clear value.
145 if (clear
->surface
== 0) {
146 memset(spu
.ctile_status
, TILE_STATUS_CLEAR
, sizeof(spu
.ctile_status
));
149 memset(spu
.ztile_status
, TILE_STATUS_CLEAR
, sizeof(spu
.ztile_status
));
155 * This path clears the whole framebuffer to the clear color right now.
159 printf("SPU: %s num=%d w=%d h=%d\n",
160 __FUNCTION__, num_tiles, spu.fb.width_tiles, spu.fb.height_tiles);
163 /* init a single tile to the clear value */
164 if (clear
->surface
== 0) {
165 clear_c_tile(&spu
.ctile
);
168 clear_z_tile(&spu
.ztile
);
171 /* walk over my tiles, writing the 'clear' tile's data */
173 const uint num_tiles
= spu
.fb
.width_tiles
* spu
.fb
.height_tiles
;
175 for (i
= spu
.init
.id
; i
< num_tiles
; i
+= spu
.init
.num_spus
) {
176 uint tx
= i
% spu
.fb
.width_tiles
;
177 uint ty
= i
/ spu
.fb
.width_tiles
;
178 if (clear
->surface
== 0)
179 put_tile(tx
, ty
, &spu
.ctile
, TAG_SURFACE_CLEAR
, 0);
181 put_tile(tx
, ty
, &spu
.ztile
, TAG_SURFACE_CLEAR
, 1);
185 if (spu
.init
.debug_flags
& CELL_DEBUG_SYNC
) {
186 wait_on_mask(1 << TAG_SURFACE_CLEAR
);
189 #endif /* CLEAR_OPT */
191 D_PRINTF(CELL_DEBUG_CMD
, "CLEAR SURF done\n");
196 cmd_release_verts(const struct cell_command_release_verts
*release
)
198 D_PRINTF(CELL_DEBUG_CMD
, "RELEASE VERTS %u\n", release
->vertex_buf
);
199 ASSERT(release
->vertex_buf
!= ~0U);
200 release_buffer(release
->vertex_buf
);
205 * Process a CELL_CMD_STATE_FRAGMENT_OPS command.
206 * This involves installing new fragment ops SPU code.
207 * If this function is never called, we'll use a regular C fallback function
208 * for fragment processing.
211 cmd_state_fragment_ops(const struct cell_command_fragment_ops
*fops
)
213 static int warned
= 0;
215 D_PRINTF(CELL_DEBUG_CMD
, "CMD_STATE_FRAGMENT_OPS\n");
216 /* Copy SPU code from batch buffer to spu buffer */
217 memcpy(spu
.fragment_ops_code
, fops
->code
, SPU_MAX_FRAGMENT_OPS_INSTS
* 4);
218 /* Copy state info (for fallback case only) */
219 memcpy(&spu
.depth_stencil_alpha
, &fops
->dsa
, sizeof(fops
->dsa
));
220 memcpy(&spu
.blend
, &fops
->blend
, sizeof(fops
->blend
));
221 memcpy(&spu
.blend_color
, &fops
->blend_color
, sizeof(fops
->blend_color
));
223 /* Parity twist! For now, always use the fallback code by default,
224 * only switching to codegen when specifically requested. This
225 * allows us to develop freely without risking taking down the
228 * Later, the parity of this check will be reversed, so that
229 * codegen is *always* used, unless we specifically indicate that
232 * Eventually, the option will be removed completely, because in
233 * final code we'll always use codegen and won't even provide the
234 * raw state records that the fallback code requires.
236 if ((spu
.init
.debug_flags
& CELL_DEBUG_FRAGMENT_OP_FALLBACK
) == 0) {
237 spu
.fragment_ops
= (spu_fragment_ops_func
) spu
.fragment_ops_code
;
240 /* otherwise, the default fallback code remains in place */
242 fprintf(stderr
, "Cell Warning: using fallback per-fragment code\n");
247 spu
.read_depth
= spu
.depth_stencil_alpha
.depth
.enabled
;
248 spu
.read_stencil
= spu
.depth_stencil_alpha
.stencil
[0].enabled
;
253 cmd_state_fragment_program(const struct cell_command_fragment_program
*fp
)
255 D_PRINTF(CELL_DEBUG_CMD
, "CMD_STATE_FRAGMENT_PROGRAM\n");
256 /* Copy SPU code from batch buffer to spu buffer */
257 memcpy(spu
.fragment_program_code
, fp
->code
,
258 SPU_MAX_FRAGMENT_PROGRAM_INSTS
* 4);
260 /* Point function pointer at new code */
261 spu
.fragment_program
= (spu_fragment_program_func
)spu
.fragment_program_code
;
267 cmd_state_fs_constants(const uint64_t *buffer
, uint pos
)
269 const uint num_const
= buffer
[pos
+ 1];
270 const float *constants
= (const float *) &buffer
[pos
+ 2];
273 D_PRINTF(CELL_DEBUG_CMD
, "CMD_STATE_FS_CONSTANTS (%u)\n", num_const
);
275 /* Expand each float to float[4] for SOA execution */
276 for (i
= 0; i
< num_const
; i
++) {
277 D_PRINTF(CELL_DEBUG_CMD
, " const[%u] = %f\n", i
, constants
[i
]);
278 spu
.constants
[i
] = spu_splats(constants
[i
]);
281 /* return new buffer pos (in 8-byte words) */
282 return pos
+ 2 + num_const
/ 2;
287 cmd_state_framebuffer(const struct cell_command_framebuffer
*cmd
)
289 D_PRINTF(CELL_DEBUG_CMD
, "FRAMEBUFFER: %d x %d at %p, cformat 0x%x zformat 0x%x\n",
296 ASSERT_ALIGN16(cmd
->color_start
);
297 ASSERT_ALIGN16(cmd
->depth_start
);
299 spu
.fb
.color_start
= cmd
->color_start
;
300 spu
.fb
.depth_start
= cmd
->depth_start
;
301 spu
.fb
.color_format
= cmd
->color_format
;
302 spu
.fb
.depth_format
= cmd
->depth_format
;
303 spu
.fb
.width
= cmd
->width
;
304 spu
.fb
.height
= cmd
->height
;
305 spu
.fb
.width_tiles
= (spu
.fb
.width
+ TILE_SIZE
- 1) / TILE_SIZE
;
306 spu
.fb
.height_tiles
= (spu
.fb
.height
+ TILE_SIZE
- 1) / TILE_SIZE
;
308 switch (spu
.fb
.depth_format
) {
309 case PIPE_FORMAT_Z32_UNORM
:
311 spu
.fb
.zscale
= (float) 0xffffffffu
;
313 case PIPE_FORMAT_Z24S8_UNORM
:
314 case PIPE_FORMAT_S8Z24_UNORM
:
315 case PIPE_FORMAT_Z24X8_UNORM
:
316 case PIPE_FORMAT_X8Z24_UNORM
:
318 spu
.fb
.zscale
= (float) 0x00ffffffu
;
320 case PIPE_FORMAT_Z16_UNORM
:
322 spu
.fb
.zscale
= (float) 0xffffu
;
332 * Tex texture mask_s/t and scale_s/t fields depend on the texture size and
333 * sampler wrap modes.
336 update_tex_masks(struct spu_texture
*texture
,
337 const struct pipe_sampler_state
*sampler
)
341 for (i
= 0; i
< CELL_MAX_TEXTURE_LEVELS
; i
++) {
342 int width
= texture
->level
[i
].width
;
343 int height
= texture
->level
[i
].height
;
345 if (sampler
->wrap_s
== PIPE_TEX_WRAP_REPEAT
)
346 texture
->level
[i
].mask_s
= spu_splats(width
- 1);
348 texture
->level
[i
].mask_s
= spu_splats(~0);
350 if (sampler
->wrap_t
== PIPE_TEX_WRAP_REPEAT
)
351 texture
->level
[i
].mask_t
= spu_splats(height
- 1);
353 texture
->level
[i
].mask_t
= spu_splats(~0);
355 if (sampler
->normalized_coords
) {
356 texture
->level
[i
].scale_s
= spu_splats((float) width
);
357 texture
->level
[i
].scale_t
= spu_splats((float) height
);
360 texture
->level
[i
].scale_s
= spu_splats(1.0f
);
361 texture
->level
[i
].scale_t
= spu_splats(1.0f
);
368 cmd_state_sampler(const struct cell_command_sampler
*sampler
)
370 uint unit
= sampler
->unit
;
372 D_PRINTF(CELL_DEBUG_CMD
, "SAMPLER [%u]\n", unit
);
374 spu
.sampler
[unit
] = sampler
->state
;
376 switch (spu
.sampler
[unit
].min_img_filter
) {
377 case PIPE_TEX_FILTER_LINEAR
:
378 spu
.min_sample_texture_2d
[unit
] = sample_texture_2d_bilinear
;
380 case PIPE_TEX_FILTER_ANISO
:
381 /* fall-through, for now */
382 case PIPE_TEX_FILTER_NEAREST
:
383 spu
.min_sample_texture_2d
[unit
] = sample_texture_2d_nearest
;
389 switch (spu
.sampler
[sampler
->unit
].mag_img_filter
) {
390 case PIPE_TEX_FILTER_LINEAR
:
391 spu
.mag_sample_texture_2d
[unit
] = sample_texture_2d_bilinear
;
393 case PIPE_TEX_FILTER_ANISO
:
394 /* fall-through, for now */
395 case PIPE_TEX_FILTER_NEAREST
:
396 spu
.mag_sample_texture_2d
[unit
] = sample_texture_2d_nearest
;
402 switch (spu
.sampler
[sampler
->unit
].min_mip_filter
) {
403 case PIPE_TEX_MIPFILTER_NEAREST
:
404 case PIPE_TEX_MIPFILTER_LINEAR
:
405 spu
.sample_texture_2d
[unit
] = sample_texture_2d_lod
;
407 case PIPE_TEX_MIPFILTER_NONE
:
408 spu
.sample_texture_2d
[unit
] = spu
.mag_sample_texture_2d
[unit
];
414 update_tex_masks(&spu
.texture
[unit
], &spu
.sampler
[unit
]);
419 cmd_state_texture(const struct cell_command_texture
*texture
)
421 const uint unit
= texture
->unit
;
424 D_PRINTF(CELL_DEBUG_CMD
, "TEXTURE [%u]\n", texture
->unit
);
426 spu
.texture
[unit
].max_level
= 0;
427 spu
.texture
[unit
].target
= texture
->target
;
429 for (i
= 0; i
< CELL_MAX_TEXTURE_LEVELS
; i
++) {
430 uint width
= texture
->width
[i
];
431 uint height
= texture
->height
[i
];
432 uint depth
= texture
->depth
[i
];
434 D_PRINTF(CELL_DEBUG_CMD
, " LEVEL %u: at %p size[0] %u x %u\n", i
,
435 texture
->start
[i
], texture
->width
[i
], texture
->height
[i
]);
437 spu
.texture
[unit
].level
[i
].start
= texture
->start
[i
];
438 spu
.texture
[unit
].level
[i
].width
= width
;
439 spu
.texture
[unit
].level
[i
].height
= height
;
440 spu
.texture
[unit
].level
[i
].depth
= depth
;
442 spu
.texture
[unit
].level
[i
].tiles_per_row
=
443 (width
+ TILE_SIZE
- 1) / TILE_SIZE
;
445 spu
.texture
[unit
].level
[i
].bytes_per_image
=
446 4 * align(width
, TILE_SIZE
) * align(height
, TILE_SIZE
) * depth
;
448 spu
.texture
[unit
].level
[i
].max_s
= spu_splats((int) width
- 1);
449 spu
.texture
[unit
].level
[i
].max_t
= spu_splats((int) height
- 1);
451 if (texture
->start
[i
])
452 spu
.texture
[unit
].max_level
= i
;
455 update_tex_masks(&spu
.texture
[unit
], &spu
.sampler
[unit
]);
460 cmd_state_vertex_info(const struct vertex_info
*vinfo
)
462 D_PRINTF(CELL_DEBUG_CMD
, "VERTEX_INFO num_attribs=%u\n", vinfo
->num_attribs
);
463 ASSERT(vinfo
->num_attribs
>= 1);
464 ASSERT(vinfo
->num_attribs
<= 8);
465 memcpy(&spu
.vertex_info
, vinfo
, sizeof(*vinfo
));
470 cmd_state_vs_array_info(const struct cell_array_info
*vs_info
)
472 const unsigned attr
= vs_info
->attr
;
474 ASSERT(attr
< PIPE_MAX_ATTRIBS
);
475 draw
.vertex_fetch
.src_ptr
[attr
] = vs_info
->base
;
476 draw
.vertex_fetch
.pitch
[attr
] = vs_info
->pitch
;
477 draw
.vertex_fetch
.size
[attr
] = vs_info
->size
;
478 draw
.vertex_fetch
.code_offset
[attr
] = vs_info
->function_offset
;
479 draw
.vertex_fetch
.dirty
= 1;
484 cmd_state_attrib_fetch(const struct cell_attribute_fetch_code
*code
)
486 mfc_get(attribute_fetch_code_buffer
,
487 (unsigned int) code
->base
, /* src */
492 wait_on_mask(1 << TAG_BATCH_BUFFER
);
494 draw
.vertex_fetch
.code
= attribute_fetch_code_buffer
;
501 D_PRINTF(CELL_DEBUG_CMD
, "FINISH\n");
502 really_clear_tiles(0);
503 /* wait for all outstanding DMAs to finish */
504 mfc_write_tag_mask(~0);
505 mfc_read_tag_status_all();
506 /* send mbox message to PPU */
507 spu_write_out_mbox(CELL_CMD_FINISH
);
512 * Execute a batch of commands which was sent to us by the PPU.
513 * See the cell_emit_state.c code to see where the commands come from.
515 * The opcode param encodes the location of the buffer and its size.
518 cmd_batch(uint opcode
)
520 const uint buf
= (opcode
>> 8) & 0xff;
521 uint size
= (opcode
>> 16);
522 uint64_t buffer
[CELL_BUFFER_SIZE
/ 8] ALIGN16_ATTRIB
;
523 const unsigned usize
= size
/ sizeof(buffer
[0]);
526 D_PRINTF(CELL_DEBUG_CMD
, "BATCH buffer %u, len %u, from %p\n",
527 buf
, size
, spu
.init
.buffers
[buf
]);
529 ASSERT((opcode
& CELL_CMD_OPCODE_MASK
) == CELL_CMD_BATCH
);
531 ASSERT_ALIGN16(spu
.init
.buffers
[buf
]);
533 size
= ROUNDUP16(size
);
535 ASSERT_ALIGN16(spu
.init
.buffers
[buf
]);
537 mfc_get(buffer
, /* dest */
538 (unsigned int) spu
.init
.buffers
[buf
], /* src */
543 wait_on_mask(1 << TAG_BATCH_BUFFER
);
545 /* Tell PPU we're done copying the buffer to local store */
546 D_PRINTF(CELL_DEBUG_CMD
, "release batch buf %u\n", buf
);
550 * Loop over commands in the batch buffer
552 for (pos
= 0; pos
< usize
; /* no incr */) {
553 switch (buffer
[pos
]) {
557 case CELL_CMD_CLEAR_SURFACE
:
559 struct cell_command_clear_surface
*clr
560 = (struct cell_command_clear_surface
*) &buffer
[pos
];
561 cmd_clear_surface(clr
);
562 pos
+= sizeof(*clr
) / 8;
565 case CELL_CMD_RENDER
:
567 struct cell_command_render
*render
568 = (struct cell_command_render
*) &buffer
[pos
];
570 cmd_render(render
, &pos_incr
);
575 * state-update commands
577 case CELL_CMD_STATE_FRAMEBUFFER
:
579 struct cell_command_framebuffer
*fb
580 = (struct cell_command_framebuffer
*) &buffer
[pos
];
581 cmd_state_framebuffer(fb
);
582 pos
+= sizeof(*fb
) / 8;
585 case CELL_CMD_STATE_FRAGMENT_OPS
:
587 struct cell_command_fragment_ops
*fops
588 = (struct cell_command_fragment_ops
*) &buffer
[pos
];
589 cmd_state_fragment_ops(fops
);
590 pos
+= sizeof(*fops
) / 8;
593 case CELL_CMD_STATE_FRAGMENT_PROGRAM
:
595 struct cell_command_fragment_program
*fp
596 = (struct cell_command_fragment_program
*) &buffer
[pos
];
597 cmd_state_fragment_program(fp
);
598 pos
+= sizeof(*fp
) / 8;
601 case CELL_CMD_STATE_FS_CONSTANTS
:
602 pos
= cmd_state_fs_constants(buffer
, pos
);
604 case CELL_CMD_STATE_RASTERIZER
:
606 struct cell_command_rasterizer
*rast
=
607 (struct cell_command_rasterizer
*) &buffer
[pos
];
608 spu
.rasterizer
= rast
->rasterizer
;
609 pos
+= sizeof(*rast
) / 8;
612 case CELL_CMD_STATE_SAMPLER
:
614 struct cell_command_sampler
*sampler
615 = (struct cell_command_sampler
*) &buffer
[pos
];
616 cmd_state_sampler(sampler
);
617 pos
+= sizeof(*sampler
) / 8;
620 case CELL_CMD_STATE_TEXTURE
:
622 struct cell_command_texture
*texture
623 = (struct cell_command_texture
*) &buffer
[pos
];
624 cmd_state_texture(texture
);
625 pos
+= sizeof(*texture
) / 8;
628 case CELL_CMD_STATE_VERTEX_INFO
:
629 cmd_state_vertex_info((struct vertex_info
*) &buffer
[pos
+1]);
630 pos
+= (1 + ROUNDUP8(sizeof(struct vertex_info
)) / 8);
632 case CELL_CMD_STATE_VIEWPORT
:
633 (void) memcpy(& draw
.viewport
, &buffer
[pos
+1],
634 sizeof(struct pipe_viewport_state
));
635 pos
+= (1 + ROUNDUP8(sizeof(struct pipe_viewport_state
)) / 8);
637 case CELL_CMD_STATE_UNIFORMS
:
638 draw
.constants
= (const float (*)[4]) (uintptr_t) buffer
[pos
+ 1];
641 case CELL_CMD_STATE_VS_ARRAY_INFO
:
642 cmd_state_vs_array_info((struct cell_array_info
*) &buffer
[pos
+1]);
643 pos
+= (1 + ROUNDUP8(sizeof(struct cell_array_info
)) / 8);
645 case CELL_CMD_STATE_BIND_VS
:
647 spu_bind_vertex_shader(&draw
,
648 (struct cell_shader_info
*) &buffer
[pos
+1]);
650 pos
+= (1 + ROUNDUP8(sizeof(struct cell_shader_info
)) / 8);
652 case CELL_CMD_STATE_ATTRIB_FETCH
:
653 cmd_state_attrib_fetch((struct cell_attribute_fetch_code
*)
655 pos
+= (1 + ROUNDUP8(sizeof(struct cell_attribute_fetch_code
)) / 8);
660 case CELL_CMD_FINISH
:
666 struct cell_command_fence
*fence_cmd
=
667 (struct cell_command_fence
*) &buffer
[pos
];
668 cmd_fence(fence_cmd
);
669 pos
+= sizeof(*fence_cmd
) / 8;
672 case CELL_CMD_RELEASE_VERTS
:
674 struct cell_command_release_verts
*release
675 = (struct cell_command_release_verts
*) &buffer
[pos
];
676 cmd_release_verts(release
);
677 pos
+= sizeof(*release
) / 8;
680 case CELL_CMD_FLUSH_BUFFER_RANGE
: {
681 struct cell_buffer_range
*br
= (struct cell_buffer_range
*)
684 spu_dcache_mark_dirty((unsigned) br
->base
, br
->size
);
685 pos
+= (1 + ROUNDUP8(sizeof(struct cell_buffer_range
)) / 8);
689 printf("SPU %u: bad opcode: 0x%llx\n", spu
.init
.id
, buffer
[pos
]);
695 D_PRINTF(CELL_DEBUG_CMD
, "BATCH complete\n");
703 * Main loop for SPEs: Get a command, execute it, repeat.
711 D_PRINTF(CELL_DEBUG_CMD
, "Enter command loop\n");
716 D_PRINTF(CELL_DEBUG_CMD
, "Wait for cmd...\n");
719 spu_write_decrementer(~0);
721 /* read/wait from mailbox */
722 opcode
= (unsigned int) spu_read_in_mbox();
723 D_PRINTF(CELL_DEBUG_CMD
, "got cmd 0x%x\n", opcode
);
726 t0
= spu_read_decrementer();
728 switch (opcode
& CELL_CMD_OPCODE_MASK
) {
730 D_PRINTF(CELL_DEBUG_CMD
, "EXIT\n");
733 case CELL_CMD_VS_EXECUTE
:
735 spu_execute_vertex_shader(&draw
, &cmd
.vs
);
742 printf("Bad opcode 0x%x!\n", opcode
& CELL_CMD_OPCODE_MASK
);
746 t1
= spu_read_decrementer();
747 printf("wait mbox time: %gms batch time: %gms\n",
748 (~0u - t0
) * spu
.init
.inv_timebase
,
749 (t0
- t1
) * spu
.init
.inv_timebase
);
753 D_PRINTF(CELL_DEBUG_CMD
, "Exit command loop\n");
755 if (spu
.init
.debug_flags
& CELL_DEBUG_CACHE
)