src/gallium/drivers/cell/spu/spu_command.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2008 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28
  29 /**
  30  * SPU command processing code
  31  */
  32
  33
  34 #include <stdio.h>
  35 #include <libmisc.h>
  36
  37 #include "pipe/p_defines.h"
  38
  39 #include "spu_command.h"
  40 #include "spu_main.h"
  41 #include "spu_render.h"
  42 #include "spu_per_fragment_op.h"
  43 #include "spu_texture.h"
  44 #include "spu_tile.h"
  45 #include "spu_vertex_shader.h"
  46 #include "spu_dcache.h"
  47 #include "spu_debug.h"
  48 #include "cell/common.h"
  49
  50
  51 struct spu_vs_context draw;
  52
  53
  54 /**
  55  * Buffers containing dynamically generated SPU code:
  56  */
  57 static unsigned char attribute_fetch_code_buffer[136 * PIPE_MAX_ATTRIBS]
  58     ALIGN16_ATTRIB;
  59
  60
  61
  62 static INLINE int
  63 align(int value, int alignment)
  64 {
  65    return (value + alignment - 1) & ~(alignment - 1);
  66 }
  67
  68
  69
  70 /**
  71  * Tell the PPU that this SPU has finished copying a buffer to
  72  * local store and that it may be reused by the PPU.
  73  * This is done by writting a 16-byte batch-buffer-status block back into
  74  * main memory (in cell_context->buffer_status[]).
  75  */
  76 static void
  77 release_buffer(uint buffer)
  78 {
  79    /* Evidently, using less than a 16-byte status doesn't work reliably */
  80    static const uint status[4] ALIGN16_ATTRIB
  81       = {CELL_BUFFER_STATUS_FREE, 0, 0, 0};
  82
  83    const uint index = 4 * (spu.init.id * CELL_NUM_BUFFERS + buffer);
  84    uint *dst = spu.init.buffer_status + index;
  85
  86    ASSERT(buffer < CELL_NUM_BUFFERS);
  87
  88    mfc_put((void *) &status,    /* src in local memory */
  89            (unsigned int) dst,  /* dst in main memory */
  90            sizeof(status),      /* size */
  91            TAG_MISC,            /* tag is unimportant */
  92            0, /* tid */
  93            0  /* rid */);
  94 }
  95
  96
  97 static void
  98 cmd_clear_surface(const struct cell_command_clear_surface *clear)
  99 {
 100    DEBUG_PRINTF("CLEAR SURF %u to 0x%08x\n", clear->surface, clear->value);
 101
 102    if (clear->surface == 0) {
 103       spu.fb.color_clear_value = clear->value;
 104       if (spu.init.debug_flags & CELL_DEBUG_CHECKER) {
 105          uint x = (spu.init.id << 4) | (spu.init.id << 12) |
 106             (spu.init.id << 20) | (spu.init.id << 28);
 107          spu.fb.color_clear_value ^= x;
 108       }
 109    }
 110    else {
 111       spu.fb.depth_clear_value = clear->value;
 112    }
 113
 114 #define CLEAR_OPT 1
 115 #if CLEAR_OPT
 116
 117    /* Simply set all tiles' status to CLEAR.
 118     * When we actually begin rendering into a tile, we'll initialize it to
 119     * the clear value.  If any tiles go untouched during the frame,
 120     * really_clear_tiles() will set them to the clear value.
 121     */
 122    if (clear->surface == 0) {
 123       memset(spu.ctile_status, TILE_STATUS_CLEAR, sizeof(spu.ctile_status));
 124    }
 125    else {
 126       memset(spu.ztile_status, TILE_STATUS_CLEAR, sizeof(spu.ztile_status));
 127    }
 128
 129 #else
 130
 131    /*
 132     * This path clears the whole framebuffer to the clear color right now.
 133     */
 134
 135    /*
 136    printf("SPU: %s num=%d w=%d h=%d\n",
 137           __FUNCTION__, num_tiles, spu.fb.width_tiles, spu.fb.height_tiles);
 138    */
 139
 140    /* init a single tile to the clear value */
 141    if (clear->surface == 0) {
 142       clear_c_tile(&spu.ctile);
 143    }
 144    else {
 145       clear_z_tile(&spu.ztile);
 146    }
 147
 148    /* walk over my tiles, writing the 'clear' tile's data */
 149    {
 150       const uint num_tiles = spu.fb.width_tiles * spu.fb.height_tiles;
 151       uint i;
 152       for (i = spu.init.id; i < num_tiles; i += spu.init.num_spus) {
 153          uint tx = i % spu.fb.width_tiles;
 154          uint ty = i / spu.fb.width_tiles;
 155          if (clear->surface == 0)
 156             put_tile(tx, ty, &spu.ctile, TAG_SURFACE_CLEAR, 0);
 157          else
 158             put_tile(tx, ty, &spu.ztile, TAG_SURFACE_CLEAR, 1);
 159       }
 160    }
 161
 162    if (spu.init.debug_flags & CELL_DEBUG_SYNC) {
 163       wait_on_mask(1 << TAG_SURFACE_CLEAR);
 164    }
 165
 166 #endif /* CLEAR_OPT */
 167
 168    DEBUG_PRINTF("CLEAR SURF done\n");
 169 }
 170
 171
 172 static void
 173 cmd_release_verts(const struct cell_command_release_verts *release)
 174 {
 175    DEBUG_PRINTF("RELEASE VERTS %u\n", release->vertex_buf);
 176    ASSERT(release->vertex_buf != ~0U);
 177    release_buffer(release->vertex_buf);
 178 }
 179
 180
 181 /**
 182  * Process a CELL_CMD_STATE_FRAGMENT_OPS command.
 183  * This involves installing new fragment ops SPU code.
 184  * If this function is never called, we'll use a regular C fallback function
 185  * for fragment processing.
 186  */
 187 static void
 188 cmd_state_fragment_ops(const struct cell_command_fragment_ops *fops)
 189 {
 190    static int warned = 0;
 191
 192    DEBUG_PRINTF("CMD_STATE_FRAGMENT_OPS\n");
 193    /* Copy SPU code from batch buffer to spu buffer */
 194    memcpy(spu.fragment_ops_code, fops->code, SPU_MAX_FRAGMENT_OPS_INSTS * 4);
 195    /* Copy state info (for fallback case only) */
 196    memcpy(&spu.depth_stencil_alpha, &fops->dsa, sizeof(fops->dsa));
 197    memcpy(&spu.blend, &fops->blend, sizeof(fops->blend));
 198
 199    /* Parity twist!  For now, always use the fallback code by default,
 200     * only switching to codegen when specifically requested.  This
 201     * allows us to develop freely without risking taking down the
 202     * branch.
 203     *
 204     * Later, the parity of this check will be reversed, so that
 205     * codegen is *always* used, unless we specifically indicate that
 206     * we don't want it.
 207     *
 208     * Eventually, the option will be removed completely, because in
 209     * final code we'll always use codegen and won't even provide the
 210     * raw state records that the fallback code requires.
 211     */
 212    if ((spu.init.debug_flags & CELL_DEBUG_FRAGMENT_OP_FALLBACK) == 0) {
 213       spu.fragment_ops = (spu_fragment_ops_func) spu.fragment_ops_code;
 214    }
 215    else {
 216       /* otherwise, the default fallback code remains in place */
 217       if (!warned) {
 218          fprintf(stderr, "Cell Warning: using fallback per-fragment code\n");
 219          warned = 1;
 220       }
 221    }
 222
 223    spu.read_depth = spu.depth_stencil_alpha.depth.enabled;
 224    spu.read_stencil = spu.depth_stencil_alpha.stencil[0].enabled;
 225 }
 226
 227
 228 static void
 229 cmd_state_fragment_program(const struct cell_command_fragment_program *fp)
 230 {
 231    DEBUG_PRINTF("CMD_STATE_FRAGMENT_PROGRAM\n");
 232    /* Copy SPU code from batch buffer to spu buffer */
 233    memcpy(spu.fragment_program_code, fp->code,
 234           SPU_MAX_FRAGMENT_PROGRAM_INSTS * 4);
 235 #if 01
 236    /* Point function pointer at new code */
 237    spu.fragment_program = (spu_fragment_program_func)spu.fragment_program_code;
 238 #endif
 239 }
 240
 241
 242 static uint
 243 cmd_state_fs_constants(const uint64_t *buffer, uint pos)
 244 {
 245    const uint num_const = buffer[pos + 1];
 246    const float *constants = (const float *) &buffer[pos + 2];
 247    uint i;
 248
 249    DEBUG_PRINTF("CMD_STATE_FS_CONSTANTS (%u)\n", num_const);
 250
 251    /* Expand each float to float[4] for SOA execution */
 252    for (i = 0; i < num_const; i++) {
 253       DEBUG_PRINTF("  const[%u] = %f\n", i, constants[i]);
 254       spu.constants[i] = spu_splats(constants[i]);
 255    }
 256
 257    /* return new buffer pos (in 8-byte words) */
 258    return pos + 2 + num_const / 2;
 259 }
 260
 261
 262 static void
 263 cmd_state_framebuffer(const struct cell_command_framebuffer *cmd)
 264 {
 265    DEBUG_PRINTF("FRAMEBUFFER: %d x %d at %p, cformat 0x%x  zformat 0x%x\n",
 266              cmd->width,
 267              cmd->height,
 268              cmd->color_start,
 269              cmd->color_format,
 270              cmd->depth_format);
 271
 272    ASSERT_ALIGN16(cmd->color_start);
 273    ASSERT_ALIGN16(cmd->depth_start);
 274
 275    spu.fb.color_start = cmd->color_start;
 276    spu.fb.depth_start = cmd->depth_start;
 277    spu.fb.color_format = cmd->color_format;
 278    spu.fb.depth_format = cmd->depth_format;
 279    spu.fb.width = cmd->width;
 280    spu.fb.height = cmd->height;
 281    spu.fb.width_tiles = (spu.fb.width + TILE_SIZE - 1) / TILE_SIZE;
 282    spu.fb.height_tiles = (spu.fb.height + TILE_SIZE - 1) / TILE_SIZE;
 283
 284    switch (spu.fb.depth_format) {
 285    case PIPE_FORMAT_Z32_UNORM:
 286       spu.fb.zsize = 4;
 287       spu.fb.zscale = (float) 0xffffffffu;
 288       break;
 289    case PIPE_FORMAT_Z24S8_UNORM:
 290    case PIPE_FORMAT_S8Z24_UNORM:
 291    case PIPE_FORMAT_Z24X8_UNORM:
 292    case PIPE_FORMAT_X8Z24_UNORM:
 293       spu.fb.zsize = 4;
 294       spu.fb.zscale = (float) 0x00ffffffu;
 295       break;
 296    case PIPE_FORMAT_Z16_UNORM:
 297       spu.fb.zsize = 2;
 298       spu.fb.zscale = (float) 0xffffu;
 299       break;
 300    default:
 301       spu.fb.zsize = 0;
 302       break;
 303    }
 304 }
 305
 306
 307 /**
 308  * Tex texture mask_s/t and scale_s/t fields depend on the texture size and
 309  * sampler wrap modes.
 310  */
 311 static void
 312 update_tex_masks(struct spu_texture *texture,
 313                  const struct pipe_sampler_state *sampler,
 314                  uint unit)
 315 {
 316    uint i;
 317
 318    for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
 319       int width = texture->level[i].width;
 320       int height = texture->level[i].height;
 321
 322       if (sampler->wrap_s == PIPE_TEX_WRAP_REPEAT)
 323          texture->level[i].mask_s = spu_splats(width - 1);
 324       else
 325          texture->level[i].mask_s = spu_splats(~0);
 326
 327       if (sampler->wrap_t == PIPE_TEX_WRAP_REPEAT)
 328          texture->level[i].mask_t = spu_splats(height - 1);
 329       else
 330          texture->level[i].mask_t = spu_splats(~0);
 331
 332       if (sampler->normalized_coords) {
 333          texture->level[i].scale_s = spu_splats((float) width);
 334          texture->level[i].scale_t = spu_splats((float) height);
 335       }
 336       else {
 337          texture->level[i].scale_s = spu_splats(1.0f);
 338          texture->level[i].scale_t = spu_splats(1.0f);
 339       }
 340    }
 341
 342    /* XXX temporary hack */
 343    if (texture->target == PIPE_TEXTURE_CUBE) {
 344       spu.sample_texture4[unit] = sample_texture4_cube;
 345    }
 346 }
 347
 348
 349 static void
 350 cmd_state_sampler(const struct cell_command_sampler *sampler)
 351 {
 352    uint unit = sampler->unit;
 353
 354    DEBUG_PRINTF("SAMPLER [%u]\n", unit);
 355
 356    spu.sampler[unit] = sampler->state;
 357
 358    switch (spu.sampler[unit].min_img_filter) {
 359    case PIPE_TEX_FILTER_LINEAR:
 360       spu.min_sample_texture4[unit] = sample_texture4_bilinear;
 361       break;
 362    case PIPE_TEX_FILTER_ANISO:
 363       /* fall-through, for now */
 364    case PIPE_TEX_FILTER_NEAREST:
 365       spu.min_sample_texture4[unit] = sample_texture4_nearest;
 366       break;
 367    default:
 368       ASSERT(0);
 369    }
 370
 371    switch (spu.sampler[sampler->unit].mag_img_filter) {
 372    case PIPE_TEX_FILTER_LINEAR:
 373       spu.mag_sample_texture4[unit] = sample_texture4_bilinear;
 374       break;
 375    case PIPE_TEX_FILTER_ANISO:
 376       /* fall-through, for now */
 377    case PIPE_TEX_FILTER_NEAREST:
 378       spu.mag_sample_texture4[unit] = sample_texture4_nearest;
 379       break;
 380    default:
 381       ASSERT(0);
 382    }
 383
 384    switch (spu.sampler[sampler->unit].min_mip_filter) {
 385    case PIPE_TEX_MIPFILTER_NEAREST:
 386    case PIPE_TEX_MIPFILTER_LINEAR:
 387       spu.sample_texture4[unit] = sample_texture4_lod;
 388       break;
 389    case PIPE_TEX_MIPFILTER_NONE:
 390       spu.sample_texture4[unit] = spu.mag_sample_texture4[unit];
 391       break;
 392    default:
 393       ASSERT(0);
 394    }
 395
 396    update_tex_masks(&spu.texture[unit], &spu.sampler[unit], unit);
 397 }
 398
 399
 400 static void
 401 cmd_state_texture(const struct cell_command_texture *texture)
 402 {
 403    const uint unit = texture->unit;
 404    uint i;
 405
 406    //if (spu.init.id==0) Debug=1;
 407
 408    DEBUG_PRINTF("TEXTURE [%u]\n", texture->unit);
 409
 410    spu.texture[unit].max_level = 0;
 411    spu.texture[unit].target = texture->target;
 412
 413    for (i = 0; i < CELL_MAX_TEXTURE_LEVELS; i++) {
 414       uint width = texture->width[i];
 415       uint height = texture->height[i];
 416       uint depth = texture->depth[i];
 417
 418       DEBUG_PRINTF("  LEVEL %u: at %p  size[0] %u x %u\n", i,
 419              texture->start[i], texture->width[i], texture->height[i]);
 420
 421       spu.texture[unit].level[i].start = texture->start[i];
 422       spu.texture[unit].level[i].width = width;
 423       spu.texture[unit].level[i].height = height;
 424       spu.texture[unit].level[i].depth = depth;
 425
 426       spu.texture[unit].level[i].tiles_per_row =
 427          (width + TILE_SIZE - 1) / TILE_SIZE;
 428
 429       spu.texture[unit].level[i].bytes_per_image =
 430          4 * align(width, TILE_SIZE) * align(height, TILE_SIZE) * depth;
 431
 432       spu.texture[unit].level[i].max_s = spu_splats((int) width - 1);
 433       spu.texture[unit].level[i].max_t = spu_splats((int) height - 1);
 434
 435       if (texture->start[i])
 436          spu.texture[unit].max_level = i;
 437    }
 438
 439    update_tex_masks(&spu.texture[unit], &spu.sampler[unit], unit);
 440
 441    //Debug=0;
 442 }
 443
 444
 445 static void
 446 cmd_state_vertex_info(const struct vertex_info *vinfo)
 447 {
 448    DEBUG_PRINTF("VERTEX_INFO num_attribs=%u\n", vinfo->num_attribs);
 449    ASSERT(vinfo->num_attribs >= 1);
 450    ASSERT(vinfo->num_attribs <= 8);
 451    memcpy(&spu.vertex_info, vinfo, sizeof(*vinfo));
 452 }
 453
 454
 455 static void
 456 cmd_state_vs_array_info(const struct cell_array_info *vs_info)
 457 {
 458    const unsigned attr = vs_info->attr;
 459
 460    ASSERT(attr < PIPE_MAX_ATTRIBS);
 461    draw.vertex_fetch.src_ptr[attr] = vs_info->base;
 462    draw.vertex_fetch.pitch[attr] = vs_info->pitch;
 463    draw.vertex_fetch.size[attr] = vs_info->size;
 464    draw.vertex_fetch.code_offset[attr] = vs_info->function_offset;
 465    draw.vertex_fetch.dirty = 1;
 466 }
 467
 468
 469 static void
 470 cmd_state_attrib_fetch(const struct cell_attribute_fetch_code *code)
 471 {
 472    mfc_get(attribute_fetch_code_buffer,
 473            (unsigned int) code->base,  /* src */
 474            code->size,
 475            TAG_BATCH_BUFFER,
 476            0, /* tid */
 477            0  /* rid */);
 478    wait_on_mask(1 << TAG_BATCH_BUFFER);
 479
 480    draw.vertex_fetch.code = attribute_fetch_code_buffer;
 481 }
 482
 483
 484 static void
 485 cmd_finish(void)
 486 {
 487    DEBUG_PRINTF("FINISH\n");
 488    really_clear_tiles(0);
 489    /* wait for all outstanding DMAs to finish */
 490    mfc_write_tag_mask(~0);
 491    mfc_read_tag_status_all();
 492    /* send mbox message to PPU */
 493    spu_write_out_mbox(CELL_CMD_FINISH);
 494 }
 495
 496
 497 /**
 498  * Execute a batch of commands which was sent to us by the PPU.
 499  * See the cell_emit_state.c code to see where the commands come from.
 500  *
 501  * The opcode param encodes the location of the buffer and its size.
 502  */
 503 static void
 504 cmd_batch(uint opcode)
 505 {
 506    const uint buf = (opcode >> 8) & 0xff;
 507    uint size = (opcode >> 16);
 508    uint64_t buffer[CELL_BUFFER_SIZE / 8] ALIGN16_ATTRIB;
 509    const unsigned usize = size / sizeof(buffer[0]);
 510    uint pos;
 511
 512    DEBUG_PRINTF("BATCH buffer %u, len %u, from %p\n",
 513              buf, size, spu.init.buffers[buf]);
 514
 515    ASSERT((opcode & CELL_CMD_OPCODE_MASK) == CELL_CMD_BATCH);
 516
 517    ASSERT_ALIGN16(spu.init.buffers[buf]);
 518
 519    size = ROUNDUP16(size);
 520
 521    ASSERT_ALIGN16(spu.init.buffers[buf]);
 522
 523    mfc_get(buffer,  /* dest */
 524            (unsigned int) spu.init.buffers[buf],  /* src */
 525            size,
 526            TAG_BATCH_BUFFER,
 527            0, /* tid */
 528            0  /* rid */);
 529    wait_on_mask(1 << TAG_BATCH_BUFFER);
 530
 531    /* Tell PPU we're done copying the buffer to local store */
 532    DEBUG_PRINTF("release batch buf %u\n", buf);
 533    release_buffer(buf);
 534
 535    /*
 536     * Loop over commands in the batch buffer
 537     */
 538    for (pos = 0; pos < usize; /* no incr */) {
 539       switch (buffer[pos]) {
 540       /*
 541        * rendering commands
 542        */
 543       case CELL_CMD_CLEAR_SURFACE:
 544          {
 545             struct cell_command_clear_surface *clr
 546                = (struct cell_command_clear_surface *) &buffer[pos];
 547             cmd_clear_surface(clr);
 548             pos += sizeof(*clr) / 8;
 549          }
 550          break;
 551       case CELL_CMD_RENDER:
 552          {
 553             struct cell_command_render *render
 554                = (struct cell_command_render *) &buffer[pos];
 555             uint pos_incr;
 556             cmd_render(render, &pos_incr);
 557             pos += pos_incr;
 558          }
 559          break;
 560       /*
 561        * state-update commands
 562        */
 563       case CELL_CMD_STATE_FRAMEBUFFER:
 564          {
 565             struct cell_command_framebuffer *fb
 566                = (struct cell_command_framebuffer *) &buffer[pos];
 567             cmd_state_framebuffer(fb);
 568             pos += sizeof(*fb) / 8;
 569          }
 570          break;
 571       case CELL_CMD_STATE_FRAGMENT_OPS:
 572          {
 573             struct cell_command_fragment_ops *fops
 574                = (struct cell_command_fragment_ops *) &buffer[pos];
 575             cmd_state_fragment_ops(fops);
 576             pos += sizeof(*fops) / 8;
 577          }
 578          break;
 579       case CELL_CMD_STATE_FRAGMENT_PROGRAM:
 580          {
 581             struct cell_command_fragment_program *fp
 582                = (struct cell_command_fragment_program *) &buffer[pos];
 583             cmd_state_fragment_program(fp);
 584             pos += sizeof(*fp) / 8;
 585          }
 586          break;
 587       case CELL_CMD_STATE_FS_CONSTANTS:
 588          pos = cmd_state_fs_constants(buffer, pos);
 589          break;
 590       case CELL_CMD_STATE_SAMPLER:
 591          {
 592             struct cell_command_sampler *sampler
 593                = (struct cell_command_sampler *) &buffer[pos];
 594             cmd_state_sampler(sampler);
 595             pos += sizeof(*sampler) / 8;
 596          }
 597          break;
 598       case CELL_CMD_STATE_TEXTURE:
 599          {
 600             struct cell_command_texture *texture
 601                = (struct cell_command_texture *) &buffer[pos];
 602             cmd_state_texture(texture);
 603             pos += sizeof(*texture) / 8;
 604          }
 605          break;
 606       case CELL_CMD_STATE_VERTEX_INFO:
 607          cmd_state_vertex_info((struct vertex_info *) &buffer[pos+1]);
 608          pos += (1 + ROUNDUP8(sizeof(struct vertex_info)) / 8);
 609          break;
 610       case CELL_CMD_STATE_VIEWPORT:
 611          (void) memcpy(& draw.viewport, &buffer[pos+1],
 612                        sizeof(struct pipe_viewport_state));
 613          pos += (1 + ROUNDUP8(sizeof(struct pipe_viewport_state)) / 8);
 614          break;
 615       case CELL_CMD_STATE_UNIFORMS:
 616          draw.constants = (const float (*)[4]) (uintptr_t) buffer[pos + 1];
 617          pos += 2;
 618          break;
 619       case CELL_CMD_STATE_VS_ARRAY_INFO:
 620          cmd_state_vs_array_info((struct cell_array_info *) &buffer[pos+1]);
 621          pos += (1 + ROUNDUP8(sizeof(struct cell_array_info)) / 8);
 622          break;
 623       case CELL_CMD_STATE_BIND_VS:
 624 #if 0
 625          spu_bind_vertex_shader(&draw,
 626                                 (struct cell_shader_info *) &buffer[pos+1]);
 627 #endif
 628          pos += (1 + ROUNDUP8(sizeof(struct cell_shader_info)) / 8);
 629          break;
 630       case CELL_CMD_STATE_ATTRIB_FETCH:
 631          cmd_state_attrib_fetch((struct cell_attribute_fetch_code *)
 632                                 &buffer[pos+1]);
 633          pos += (1 + ROUNDUP8(sizeof(struct cell_attribute_fetch_code)) / 8);
 634          break;
 635       /*
 636        * misc commands
 637        */
 638       case CELL_CMD_FINISH:
 639          cmd_finish();
 640          pos += 1;
 641          break;
 642       case CELL_CMD_RELEASE_VERTS:
 643          {
 644             struct cell_command_release_verts *release
 645                = (struct cell_command_release_verts *) &buffer[pos];
 646             cmd_release_verts(release);
 647             pos += sizeof(*release) / 8;
 648          }
 649          break;
 650       case CELL_CMD_FLUSH_BUFFER_RANGE: {
 651          struct cell_buffer_range *br = (struct cell_buffer_range *)
 652              &buffer[pos+1];
 653
 654          spu_dcache_mark_dirty((unsigned) br->base, br->size);
 655          pos += (1 + ROUNDUP8(sizeof(struct cell_buffer_range)) / 8);
 656          break;
 657       }
 658       default:
 659          printf("SPU %u: bad opcode: 0x%llx\n", spu.init.id, buffer[pos]);
 660          ASSERT(0);
 661          break;
 662       }
 663    }
 664
 665    DEBUG_PRINTF("BATCH complete\n");
 666 }
 667
 668
 669
 670 /**
 671  * Main loop for SPEs: Get a command, execute it, repeat.
 672  */
 673 void
 674 command_loop(void)
 675 {
 676    struct cell_command cmd;
 677    int exitFlag = 0;
 678
 679    DEBUG_PRINTF("Enter command loop\n");
 680
 681    ASSERT((sizeof(struct cell_command) & 0xf) == 0);
 682    ASSERT_ALIGN16(&cmd);
 683
 684    while (!exitFlag) {
 685       unsigned opcode;
 686       int tag = 0;
 687
 688       DEBUG_PRINTF("Wait for cmd...\n");
 689
 690       /* read/wait from mailbox */
 691       opcode = (unsigned int) spu_read_in_mbox();
 692
 693       DEBUG_PRINTF("got cmd 0x%x\n", opcode);
 694
 695       /* command payload */
 696       mfc_get(&cmd,  /* dest */
 697               (unsigned int) spu.init.cmd, /* src */
 698               sizeof(struct cell_command), /* bytes */
 699               tag,
 700               0, /* tid */
 701               0  /* rid */);
 702       wait_on_mask( 1 << tag );
 703
 704       /*
 705        * NOTE: most commands should be contained in a batch buffer
 706        */
 707
 708       switch (opcode & CELL_CMD_OPCODE_MASK) {
 709       case CELL_CMD_EXIT:
 710          DEBUG_PRINTF("EXIT\n");
 711          exitFlag = 1;
 712          break;
 713       case CELL_CMD_VS_EXECUTE:
 714 #if 0
 715          spu_execute_vertex_shader(&draw, &cmd.vs);
 716 #endif
 717          break;
 718       case CELL_CMD_BATCH:
 719          cmd_batch(opcode);
 720          break;
 721       default:
 722          printf("Bad opcode 0x%x!\n", opcode & CELL_CMD_OPCODE_MASK);
 723       }
 724
 725    }
 726
 727    DEBUG_PRINTF("Exit command loop\n");
 728
 729    spu_dcache_report();
 730 }