Cell: trivial clean-ups
[mesa.git] / src / gallium / drivers / cell / spu / spu_main.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef SPU_MAIN_H
29 #define SPU_MAIN_H
30
31
32 #include <spu_mfcio.h>
33
34 #include "cell/common.h"
35 #include "draw/draw_vertex.h"
36 #include "pipe/p_state.h"
37
38
39
40 #define MAX_WIDTH 1024
41 #define MAX_HEIGHT 1024
42
43
44 typedef union {
45 ushort us[TILE_SIZE][TILE_SIZE];
46 uint ui[TILE_SIZE][TILE_SIZE];
47 vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4];
48 vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2];
49 } tile_t;
50
51
52 #define TILE_STATUS_CLEAR 1
53 #define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */
54 #define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */
55 #define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */
56 #define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */
57
58
59 struct spu_framebuffer {
60 void *color_start; /**< addr of color surface in main memory */
61 void *depth_start; /**< addr of depth surface in main memory */
62 enum pipe_format color_format;
63 enum pipe_format depth_format;
64 uint width, height; /**< size in pixels */
65 uint width_tiles, height_tiles; /**< width and height in tiles */
66
67 uint color_clear_value;
68 uint depth_clear_value;
69
70 uint zsize; /**< 0, 2 or 4 bytes per Z */
71 } ALIGN16_ATTRIB;
72
73
74 /**
75 * All SPU global/context state will be in singleton object of this type:
76 */
77 struct spu_global
78 {
79 struct cell_init_info init;
80
81 struct spu_framebuffer fb;
82 struct pipe_blend_state blend_stencil;
83 struct pipe_depth_stencil_alpha_state depth_stencil;
84 struct pipe_blend_state blend;
85 struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
86 struct cell_command_texture texture;
87
88 struct vertex_info vertex_info;
89
90 /* XXX more state to come */
91
92
93 /** current color and Z tiles */
94 tile_t ctile ALIGN16_ATTRIB;
95 tile_t ztile ALIGN16_ATTRIB;
96
97 /** Current tiles' status */
98 ubyte cur_ctile_status, cur_ztile_status;
99
100 /** Status of all tiles in framebuffer */
101 ubyte ctile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
102 ubyte ztile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
103
104
105 /** for converting RGBA to PIPE_FORMAT_x colors */
106 vector unsigned char color_shuffle;
107
108 vector float tex_size;
109 vector unsigned int tex_size_mask; /**< == int(size - 1) */
110
111 vector float (*sample_texture)(vector float texcoord);
112
113 } ALIGN16_ATTRIB;
114
115
116 extern struct spu_global spu;
117 extern boolean Debug;
118
119
120
121
122 /* DMA TAGS */
123
124 #define TAG_SURFACE_CLEAR 10
125 #define TAG_VERTEX_BUFFER 11
126 #define TAG_READ_TILE_COLOR 12
127 #define TAG_READ_TILE_Z 13
128 #define TAG_WRITE_TILE_COLOR 14
129 #define TAG_WRITE_TILE_Z 15
130 #define TAG_INDEX_BUFFER 16
131 #define TAG_BATCH_BUFFER 17
132 #define TAG_MISC 18
133 #define TAG_TEXTURE_TILE 19
134 #define TAG_INSTRUCTION_FETCH 20
135
136
137
138 static INLINE void
139 wait_on_mask(unsigned tagMask)
140 {
141 mfc_write_tag_mask( tagMask );
142 /* wait for completion of _any_ DMAs specified by tagMask */
143 mfc_read_tag_status_any();
144 }
145
146
147 static INLINE void
148 wait_on_mask_all(unsigned tagMask)
149 {
150 mfc_write_tag_mask( tagMask );
151 /* wait for completion of _any_ DMAs specified by tagMask */
152 mfc_read_tag_status_all();
153 }
154
155
156
157
158
159 static INLINE void
160 memset16(ushort *d, ushort value, uint count)
161 {
162 uint i;
163 for (i = 0; i < count; i++)
164 d[i] = value;
165 }
166
167
168 static INLINE void
169 memset32(uint *d, uint value, uint count)
170 {
171 uint i;
172 for (i = 0; i < count; i++)
173 d[i] = value;
174 }
175
176
177 #endif /* SPU_MAIN_H */