1 /**************************************************************************
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
26 **************************************************************************/
32 #include <spu_mfcio.h>
34 #include "cell/common.h"
35 #include "draw/draw_vertex.h"
36 #include "pipe/p_state.h"
40 #define MAX_WIDTH 1024
41 #define MAX_HEIGHT 1024
45 ushort us
[TILE_SIZE
][TILE_SIZE
];
46 uint ui
[TILE_SIZE
][TILE_SIZE
];
47 vector
unsigned short us8
[TILE_SIZE
/2][TILE_SIZE
/4];
48 vector
unsigned int ui4
[TILE_SIZE
/2][TILE_SIZE
/2];
52 #define TILE_STATUS_CLEAR 1
53 #define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */
54 #define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */
55 #define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */
56 #define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */
59 struct spu_framebuffer
{
60 void *color_start
; /**< addr of color surface in main memory */
61 void *depth_start
; /**< addr of depth surface in main memory */
62 enum pipe_format color_format
;
63 enum pipe_format depth_format
;
64 uint width
, height
; /**< size in pixels */
65 uint width_tiles
, height_tiles
; /**< width and height in tiles */
67 uint color_clear_value
;
68 uint depth_clear_value
;
70 uint zsize
; /**< 0, 2 or 4 bytes per Z */
75 * All SPU global/context state will be in singleton object of this type:
79 struct cell_init_info init
;
81 struct spu_framebuffer fb
;
82 struct pipe_blend_state blend_stencil
;
83 struct pipe_depth_stencil_alpha_state depth_stencil
;
84 struct pipe_blend_state blend
;
85 struct pipe_sampler_state sampler
[PIPE_MAX_SAMPLERS
];
86 struct cell_command_texture texture
;
88 struct vertex_info vertex_info
;
90 /* XXX more state to come */
93 /** current color and Z tiles */
94 tile_t ctile ALIGN16_ATTRIB
;
95 tile_t ztile ALIGN16_ATTRIB
;
97 /** Current tiles' status */
98 ubyte cur_ctile_status
, cur_ztile_status
;
100 /** Status of all tiles in framebuffer */
101 ubyte ctile_status
[MAX_HEIGHT
/TILE_SIZE
][MAX_WIDTH
/TILE_SIZE
] ALIGN16_ATTRIB
;
102 ubyte ztile_status
[MAX_HEIGHT
/TILE_SIZE
][MAX_WIDTH
/TILE_SIZE
] ALIGN16_ATTRIB
;
105 /** for converting RGBA to PIPE_FORMAT_x colors */
106 vector
unsigned char color_shuffle
;
108 vector
float tex_size
;
109 vector
unsigned int tex_size_mask
; /**< == int(size - 1) */
111 vector
float (*sample_texture
)(vector
float texcoord
);
116 extern struct spu_global spu
;
117 extern boolean Debug
;
124 #define TAG_SURFACE_CLEAR 10
125 #define TAG_VERTEX_BUFFER 11
126 #define TAG_READ_TILE_COLOR 12
127 #define TAG_READ_TILE_Z 13
128 #define TAG_WRITE_TILE_COLOR 14
129 #define TAG_WRITE_TILE_Z 15
130 #define TAG_INDEX_BUFFER 16
131 #define TAG_BATCH_BUFFER 17
133 #define TAG_TEXTURE_TILE 19
134 #define TAG_INSTRUCTION_FETCH 20
139 wait_on_mask(unsigned tagMask
)
141 mfc_write_tag_mask( tagMask
);
142 /* wait for completion of _any_ DMAs specified by tagMask */
143 mfc_read_tag_status_any();
148 wait_on_mask_all(unsigned tagMask
)
150 mfc_write_tag_mask( tagMask
);
151 /* wait for completion of _any_ DMAs specified by tagMask */
152 mfc_read_tag_status_all();
160 memset16(ushort
*d
, ushort value
, uint count
)
163 for (i
= 0; i
< count
; i
++)
169 memset32(uint
*d
, uint value
, uint count
)
172 for (i
= 0; i
< count
; i
++)
177 #endif /* SPU_MAIN_H */