e3960dbe8b6990ee01ec1ad02f0380a39924ea28
[mesa.git] / src / gallium / drivers / cell / spu / spu_main.h
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef SPU_MAIN_H
29 #define SPU_MAIN_H
30
31
32 #include <spu_mfcio.h>
33
34 #include "cell/common.h"
35 #include "draw/draw_vertex.h"
36 #include "pipe/p_state.h"
37
38
39
40 #define MAX_WIDTH 1024
41 #define MAX_HEIGHT 1024
42
43
44 #define CELL_MAX_CONSTANTS 32 /**< number of float[4] constants */
45
46
47 /**
48 * A tile is basically a TILE_SIZE x TILE_SIZE block of 4-byte pixels.
49 * The data may be addressed through several different types.
50 */
51 typedef union {
52 ushort us[TILE_SIZE][TILE_SIZE];
53 uint ui[TILE_SIZE][TILE_SIZE];
54 vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4];
55 vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2];
56 } tile_t;
57
58
59 #define TILE_STATUS_CLEAR 1
60 #define TILE_STATUS_DEFINED 2 /**< defined in FB, but not in local store */
61 #define TILE_STATUS_CLEAN 3 /**< in local store, but not changed */
62 #define TILE_STATUS_DIRTY 4 /**< modified locally, but not put back yet */
63 #define TILE_STATUS_GETTING 5 /**< mfc_get() called but not yet arrived */
64
65
66 /** Function for sampling textures */
67 typedef void (*spu_sample_texture4_func)(vector float s,
68 vector float t,
69 vector float r,
70 vector float q,
71 uint unit,
72 vector float colors[4]);
73
74
75 /** Function for performing per-fragment ops */
76 typedef void (*spu_fragment_ops_func)(uint x, uint y,
77 tile_t *colorTile,
78 tile_t *depthStencilTile,
79 vector float fragZ,
80 vector float fragRed,
81 vector float fragGreen,
82 vector float fragBlue,
83 vector float fragAlpha,
84 vector unsigned int mask,
85 uint facing);
86
87 /** Function for running fragment program */
88 typedef void (*spu_fragment_program_func)(vector float *inputs,
89 vector float *outputs,
90 vector float *constants);
91
92
93 struct spu_framebuffer
94 {
95 void *color_start; /**< addr of color surface in main memory */
96 void *depth_start; /**< addr of depth surface in main memory */
97 enum pipe_format color_format;
98 enum pipe_format depth_format;
99 uint width, height; /**< size in pixels */
100 uint width_tiles, height_tiles; /**< width and height in tiles */
101
102 uint color_clear_value;
103 uint depth_clear_value;
104
105 uint zsize; /**< 0, 2 or 4 bytes per Z */
106 float zscale; /**< 65535.0, 2^24-1 or 2^32-1 */
107 } ALIGN16_ATTRIB;
108
109
110 struct spu_texture
111 {
112 void *start;
113 ushort width, height;
114 ushort tiles_per_row;
115 vector float width4; /**< == {width, width, width, width} */
116 vector float height4; /**< == {height, height, height, height} */
117 vector unsigned int tex_size_x_mask; /**< splat(width-1) */
118 vector unsigned int tex_size_y_mask; /**< splat(height-1) */
119 } ALIGN16_ATTRIB;
120
121
122 /**
123 * All SPU global/context state will be in a singleton object of this type:
124 */
125 struct spu_global
126 {
127 /** One-time init/constant info */
128 struct cell_init_info init;
129
130 /*
131 * Current state
132 */
133 struct spu_framebuffer fb;
134 struct pipe_depth_stencil_alpha_state depth_stencil_alpha;
135 struct pipe_blend_state blend;
136 struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
137 struct spu_texture texture[PIPE_MAX_SAMPLERS];
138 struct vertex_info vertex_info;
139
140 /** Current color and Z tiles */
141 tile_t ctile ALIGN16_ATTRIB;
142 tile_t ztile ALIGN16_ATTRIB;
143
144 /** Read depth/stencil tiles? */
145 boolean read_depth;
146 boolean read_stencil;
147
148 /** Current tiles' status */
149 ubyte cur_ctile_status, cur_ztile_status;
150
151 /** Status of all tiles in framebuffer */
152 ubyte ctile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
153 ubyte ztile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
154
155 /** Current fragment ops machine code, at 8-byte boundary */
156 uint fragment_ops_code[SPU_MAX_FRAGMENT_OPS_INSTS] ALIGN8_ATTRIB;
157 /** Current fragment ops function */
158 spu_fragment_ops_func fragment_ops;
159
160 /** Current fragment program machine code, at 8-byte boundary */
161 uint fragment_program_code[SPU_MAX_FRAGMENT_PROGRAM_INSTS] ALIGN8_ATTRIB;
162 /** Current fragment ops function */
163 spu_fragment_program_func fragment_program;
164
165 /** Current texture sampler function */
166 spu_sample_texture4_func sample_texture4[CELL_MAX_SAMPLERS];
167
168 /** Fragment program constants */
169 vector float constants[4 * CELL_MAX_CONSTANTS];
170
171 } ALIGN16_ATTRIB;
172
173
174 extern struct spu_global spu;
175 extern boolean Debug;
176
177
178
179
180 /* DMA TAGS */
181
182 #define TAG_SURFACE_CLEAR 10
183 #define TAG_VERTEX_BUFFER 11
184 #define TAG_READ_TILE_COLOR 12
185 #define TAG_READ_TILE_Z 13
186 #define TAG_WRITE_TILE_COLOR 14
187 #define TAG_WRITE_TILE_Z 15
188 #define TAG_INDEX_BUFFER 16
189 #define TAG_BATCH_BUFFER 17
190 #define TAG_MISC 18
191 #define TAG_DCACHE0 20
192 #define TAG_DCACHE1 21
193 #define TAG_DCACHE2 22
194 #define TAG_DCACHE3 23
195
196
197
198 static INLINE void
199 wait_on_mask(unsigned tagMask)
200 {
201 mfc_write_tag_mask( tagMask );
202 /* wait for completion of _any_ DMAs specified by tagMask */
203 mfc_read_tag_status_any();
204 }
205
206
207 static INLINE void
208 wait_on_mask_all(unsigned tagMask)
209 {
210 mfc_write_tag_mask( tagMask );
211 /* wait for completion of _any_ DMAs specified by tagMask */
212 mfc_read_tag_status_all();
213 }
214
215
216
217
218
219 static INLINE void
220 memset16(ushort *d, ushort value, uint count)
221 {
222 uint i;
223 for (i = 0; i < count; i++)
224 d[i] = value;
225 }
226
227
228 static INLINE void
229 memset32(uint *d, uint value, uint count)
230 {
231 uint i;
232 for (i = 0; i < count; i++)
233 d[i] = value;
234 }
235
236
237 #endif /* SPU_MAIN_H */