src/gallium/drivers/cell/spu/spu_main.h

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28 #ifndef SPU_MAIN_H
  29 #define SPU_MAIN_H
  30
  31
  32 #include <spu_mfcio.h>
  33
  34 #include "cell/common.h"
  35 #include "draw/draw_vertex.h"
  36 #include "pipe/p_state.h"
  37
  38
  39
  40 #define MAX_WIDTH 1024
  41 #define MAX_HEIGHT 1024
  42
  43
  44 typedef union {
  45    ushort us[TILE_SIZE][TILE_SIZE];
  46    uint   ui[TILE_SIZE][TILE_SIZE];
  47    vector unsigned short us8[TILE_SIZE/2][TILE_SIZE/4];
  48    vector unsigned int ui4[TILE_SIZE/2][TILE_SIZE/2];
  49 } tile_t;
  50
  51
  52 #define TILE_STATUS_CLEAR   1
  53 #define TILE_STATUS_DEFINED 2  /**< defined in FB, but not in local store */
  54 #define TILE_STATUS_CLEAN   3  /**< in local store, but not changed */
  55 #define TILE_STATUS_DIRTY   4  /**< modified locally, but not put back yet */
  56 #define TILE_STATUS_GETTING 5  /**< mfc_get() called but not yet arrived */
  57
  58
  59 struct spu_frag_test_results {
  60    qword mask;
  61    qword depth;
  62    qword stencil;
  63 };
  64
  65 typedef struct spu_frag_test_results (*frag_test_func)(qword frag_mask,
  66     qword pixel_depth, qword pixel_stencil, qword frag_depth,
  67     qword frag_alpha, qword facing);
  68
  69
  70 struct spu_blend_results {
  71    qword r;
  72    qword g;
  73    qword b;
  74    qword a;
  75 };
  76
  77 typedef struct spu_blend_results (*blend_func)(
  78     qword frag_r, qword frag_g, qword frag_b, qword frag_a,
  79     qword pixel_r, qword pixel_g, qword pixel_b, qword pixel_a,
  80     qword frag_mask);
  81
  82 struct spu_framebuffer {
  83    void *color_start;              /**< addr of color surface in main memory */
  84    void *depth_start;              /**< addr of depth surface in main memory */
  85    enum pipe_format color_format;
  86    enum pipe_format depth_format;
  87    uint width, height;             /**< size in pixels */
  88    uint width_tiles, height_tiles; /**< width and height in tiles */
  89
  90    uint color_clear_value;
  91    uint depth_clear_value;
  92
  93    uint zsize;                     /**< 0, 2 or 4 bytes per Z */
  94 } ALIGN16_ATTRIB;
  95
  96
  97 /**
  98  * All SPU global/context state will be in singleton object of this type:
  99  */
 100 struct spu_global
 101 {
 102    struct cell_init_info init;
 103
 104    struct spu_framebuffer fb;
 105    boolean read_depth;
 106    boolean read_stencil;
 107    frag_test_func frag_test;
 108
 109    boolean read_fb;
 110    blend_func blend;
 111
 112    struct pipe_sampler_state sampler[PIPE_MAX_SAMPLERS];
 113    struct cell_command_texture texture;
 114
 115    struct vertex_info vertex_info;
 116
 117    /* XXX more state to come */
 118
 119
 120    /** current color and Z tiles */
 121    tile_t ctile ALIGN16_ATTRIB;
 122    tile_t ztile ALIGN16_ATTRIB;
 123
 124    /** Current tiles' status */
 125    ubyte cur_ctile_status, cur_ztile_status;
 126
 127    /** Status of all tiles in framebuffer */
 128    ubyte ctile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
 129    ubyte ztile_status[MAX_HEIGHT/TILE_SIZE][MAX_WIDTH/TILE_SIZE] ALIGN16_ATTRIB;
 130
 131
 132    /** for converting RGBA to PIPE_FORMAT_x colors */
 133    vector unsigned char color_shuffle;
 134
 135    vector float tex_size;
 136    vector unsigned int tex_size_mask; /**< == int(size - 1) */
 137    vector unsigned int tex_size_x_mask; /**< == int(size - 1) */
 138    vector unsigned int tex_size_y_mask; /**< == int(size - 1) */
 139
 140    vector float (*sample_texture)(vector float texcoord);
 141
 142 } ALIGN16_ATTRIB;
 143
 144
 145 extern struct spu_global spu;
 146 extern boolean Debug;
 147
 148
 149
 150
 151 /* DMA TAGS */
 152
 153 #define TAG_SURFACE_CLEAR     10
 154 #define TAG_VERTEX_BUFFER     11
 155 #define TAG_READ_TILE_COLOR   12
 156 #define TAG_READ_TILE_Z       13
 157 #define TAG_WRITE_TILE_COLOR  14
 158 #define TAG_WRITE_TILE_Z      15
 159 #define TAG_INDEX_BUFFER      16
 160 #define TAG_BATCH_BUFFER      17
 161 #define TAG_MISC              18
 162 #define TAG_DCACHE0           20
 163 #define TAG_DCACHE1           21
 164 #define TAG_DCACHE2           22
 165 #define TAG_DCACHE3           23
 166
 167
 168
 169 static INLINE void
 170 wait_on_mask(unsigned tagMask)
 171 {
 172    mfc_write_tag_mask( tagMask );
 173    /* wait for completion of _any_ DMAs specified by tagMask */
 174    mfc_read_tag_status_any();
 175 }
 176
 177
 178 static INLINE void
 179 wait_on_mask_all(unsigned tagMask)
 180 {
 181    mfc_write_tag_mask( tagMask );
 182    /* wait for completion of _any_ DMAs specified by tagMask */
 183    mfc_read_tag_status_all();
 184 }
 185
 186
 187
 188
 189
 190 static INLINE void
 191 memset16(ushort *d, ushort value, uint count)
 192 {
 193    uint i;
 194    for (i = 0; i < count; i++)
 195       d[i] = value;
 196 }
 197
 198
 199 static INLINE void
 200 memset32(uint *d, uint value, uint count)
 201 {
 202    uint i;
 203    for (i = 0; i < count; i++)
 204       d[i] = value;
 205 }
 206
 207
 208 #endif /* SPU_MAIN_H */