cell: minor texture improvements
[mesa.git] / src / gallium / drivers / cell / spu / spu_vertex_shader.c
1 /**************************************************************************
2 *
3 * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
4 * All Rights Reserved.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the
8 * "Software"), to deal in the Software without restriction, including
9 * without limitation the rights to use, copy, modify, merge, publish,
10 * distribute, sub license, and/or sell copies of the Software, and to
11 * permit persons to whom the Software is furnished to do so, subject to
12 * the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the
15 * next paragraph) shall be included in all copies or substantial portions
16 * of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
19 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
20 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
21 * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
22 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
23 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
24 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 /*
29 * Authors:
30 * Keith Whitwell <keith@tungstengraphics.com>
31 * Brian Paul
32 * Ian Romanick <idr@us.ibm.com>
33 */
34
35 #include <spu_mfcio.h>
36
37 #include "pipe/p_util.h"
38 #include "pipe/p_state.h"
39 #include "pipe/p_shader_tokens.h"
40 #include "spu_vertex_shader.h"
41 #include "spu_exec.h"
42 #include "draw/draw_private.h"
43 #include "draw/draw_context.h"
44 #include "cell/common.h"
45 #include "spu_main.h"
46
47 static INLINE unsigned
48 compute_clipmask(const float *clip, /*const*/ float plane[][4], unsigned nr)
49 {
50 unsigned mask = 0;
51 unsigned i;
52
53 /* Do the hardwired planes first:
54 */
55 if (-clip[0] + clip[3] < 0) mask |= CLIP_RIGHT_BIT;
56 if ( clip[0] + clip[3] < 0) mask |= CLIP_LEFT_BIT;
57 if (-clip[1] + clip[3] < 0) mask |= CLIP_TOP_BIT;
58 if ( clip[1] + clip[3] < 0) mask |= CLIP_BOTTOM_BIT;
59 if (-clip[2] + clip[3] < 0) mask |= CLIP_FAR_BIT;
60 if ( clip[2] + clip[3] < 0) mask |= CLIP_NEAR_BIT;
61
62 /* Followed by any remaining ones:
63 */
64 for (i = 6; i < nr; i++) {
65 if (dot4(clip, plane[i]) < 0)
66 mask |= (1<<i);
67 }
68
69 return mask;
70 }
71
72
73 /**
74 * Transform vertices with the current vertex program/shader
75 * Up to four vertices can be shaded at a time.
76 * \param vbuffer the input vertex data
77 * \param elts indexes of four input vertices
78 * \param count number of vertices to shade [1..4]
79 * \param vOut array of pointers to four output vertices
80 */
81 static void
82 run_vertex_program(struct spu_vs_context *draw,
83 unsigned elts[4], unsigned count,
84 const uint64_t *vOut)
85 {
86 struct spu_exec_machine *machine = &draw->machine;
87 unsigned int j;
88
89 ALIGN16_DECL(struct spu_exec_vector, inputs, PIPE_MAX_ATTRIBS);
90 ALIGN16_DECL(struct spu_exec_vector, outputs, PIPE_MAX_ATTRIBS);
91 const float *scale = draw->viewport.scale;
92 const float *trans = draw->viewport.translate;
93
94 assert(count <= 4);
95
96 machine->Processor = TGSI_PROCESSOR_VERTEX;
97
98 ASSERT_ALIGN16(draw->constants);
99 machine->Consts = (float (*)[4]) draw->constants;
100
101 machine->Inputs = ALIGN16_ASSIGN(inputs);
102 machine->Outputs = ALIGN16_ASSIGN(outputs);
103
104 spu_vertex_fetch( draw, machine, elts, count );
105
106 /* run shader */
107 spu_exec_machine_run( machine );
108
109
110 /* store machine results */
111 for (j = 0; j < count; j++) {
112 unsigned slot;
113 float x, y, z, w;
114 unsigned char buffer[sizeof(struct vertex_header)
115 + MAX_VERTEX_SIZE] ALIGN16_ATTRIB;
116 struct vertex_header *const tmpOut =
117 (struct vertex_header *) buffer;
118 const unsigned vert_size = ROUNDUP16(sizeof(struct vertex_header)
119 + (sizeof(float) * 4
120 * draw->num_vs_outputs));
121
122 mfc_get(tmpOut, vOut[j], vert_size, TAG_VERTEX_BUFFER, 0, 0);
123 wait_on_mask(1 << TAG_VERTEX_BUFFER);
124
125
126 /* Handle attr[0] (position) specially:
127 *
128 * XXX: Computing the clipmask should be done in the vertex
129 * program as a set of DP4 instructions appended to the
130 * user-provided code.
131 */
132 x = tmpOut->clip[0] = machine->Outputs[0].xyzw[0].f[j];
133 y = tmpOut->clip[1] = machine->Outputs[0].xyzw[1].f[j];
134 z = tmpOut->clip[2] = machine->Outputs[0].xyzw[2].f[j];
135 w = tmpOut->clip[3] = machine->Outputs[0].xyzw[3].f[j];
136
137 tmpOut->clipmask = compute_clipmask(tmpOut->clip, draw->plane,
138 draw->nr_planes);
139 tmpOut->edgeflag = 1;
140
141 /* divide by w */
142 w = 1.0f / w;
143 x *= w;
144 y *= w;
145 z *= w;
146
147 /* Viewport mapping */
148 tmpOut->data[0][0] = x * scale[0] + trans[0];
149 tmpOut->data[0][1] = y * scale[1] + trans[1];
150 tmpOut->data[0][2] = z * scale[2] + trans[2];
151 tmpOut->data[0][3] = w;
152
153 /* Remaining attributes are packed into sequential post-transform
154 * vertex attrib slots.
155 */
156 for (slot = 1; slot < draw->num_vs_outputs; slot++) {
157 tmpOut->data[slot][0] = machine->Outputs[slot].xyzw[0].f[j];
158 tmpOut->data[slot][1] = machine->Outputs[slot].xyzw[1].f[j];
159 tmpOut->data[slot][2] = machine->Outputs[slot].xyzw[2].f[j];
160 tmpOut->data[slot][3] = machine->Outputs[slot].xyzw[3].f[j];
161 }
162
163 mfc_put(tmpOut, vOut[j], vert_size, TAG_VERTEX_BUFFER, 0, 0);
164 } /* loop over vertices */
165 }
166
167
168 unsigned char immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]
169 ALIGN16_ATTRIB;
170
171
172 void
173 spu_bind_vertex_shader(struct spu_vs_context *draw,
174 struct cell_shader_info *vs)
175 {
176 const unsigned immediate_addr = vs->immediates;
177 const unsigned immediate_size =
178 ROUNDUP16((sizeof(float) * 4 * vs->num_immediates)
179 + (immediate_addr & 0x0f));
180
181
182 mfc_get(immediates, immediate_addr & ~0x0f, immediate_size,
183 TAG_VERTEX_BUFFER, 0, 0);
184
185 draw->machine.Instructions = (struct tgsi_full_instruction *)
186 vs->instructions;
187 draw->machine.NumInstructions = vs->num_instructions;
188
189 draw->machine.Declarations = (struct tgsi_full_declaration *)
190 vs->declarations;
191 draw->machine.NumDeclarations = vs->num_declarations;
192
193 draw->num_vs_outputs = vs->num_outputs;
194
195 /* specify the shader to interpret/execute */
196 spu_exec_machine_init(&draw->machine,
197 PIPE_MAX_SAMPLERS,
198 NULL /*samplers*/,
199 PIPE_SHADER_VERTEX);
200
201 wait_on_mask(1 << TAG_VERTEX_BUFFER);
202
203 (void) memcpy(& draw->machine.Imms, &immediates[immediate_addr & 0x0f],
204 sizeof(float) * 4 * vs->num_immediates);
205 }
206
207
208 void
209 spu_execute_vertex_shader(struct spu_vs_context *draw,
210 const struct cell_command_vs *vs)
211 {
212 unsigned i;
213
214 (void) memcpy(draw->plane, vs->plane, sizeof(float) * 4 * vs->nr_planes);
215 draw->nr_planes = vs->nr_planes;
216 draw->vertex_fetch.nr_attrs = vs->nr_attrs;
217
218 for (i = 0; i < vs->num_elts; i += 4) {
219 const unsigned batch_size = MIN2(vs->num_elts - i, 4);
220
221 run_vertex_program(draw, & vs->elts[i], batch_size, &vs->vOut[i]);
222 }
223 }