src/gallium/drivers/cell/spu/spu_vertex_shader.c

   1 /**************************************************************************
   2  *
   3  * Copyright 2007 Tungsten Graphics, Inc., Cedar Park, Texas.
   4  * All Rights Reserved.
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the
   8  * "Software"), to deal in the Software without restriction, including
   9  * without limitation the rights to use, copy, modify, merge, publish,
  10  * distribute, sub license, and/or sell copies of the Software, and to
  11  * permit persons to whom the Software is furnished to do so, subject to
  12  * the following conditions:
  13  *
  14  * The above copyright notice and this permission notice (including the
  15  * next paragraph) shall be included in all copies or substantial portions
  16  * of the Software.
  17  *
  18  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  19  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  20  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
  21  * IN NO EVENT SHALL TUNGSTEN GRAPHICS AND/OR ITS SUPPLIERS BE LIABLE FOR
  22  * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
  23  * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
  24  * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  25  *
  26  **************************************************************************/
  27
  28  /*
  29   * Authors:
  30   *   Keith Whitwell <keith@tungstengraphics.com>
  31   *   Brian Paul
  32   *   Ian Romanick <idr@us.ibm.com>
  33   */
  34
  35 #include <spu_mfcio.h>
  36
  37 #include "pipe/p_state.h"
  38 #include "pipe/p_shader_tokens.h"
  39 #include "util/u_math.h"
  40 #include "draw/draw_private.h"
  41 #include "draw/draw_context.h"
  42 #include "cell/common.h"
  43 #include "spu_vertex_shader.h"
  44 #include "spu_exec.h"
  45 #include "spu_main.h"
  46
  47
  48 #define MAX_VERTEX_SIZE ((2 + PIPE_MAX_SHADER_OUTPUTS) * 4 * sizeof(float))
  49
  50
  51 #define CLIP_RIGHT_BIT 0x01
  52 #define CLIP_LEFT_BIT 0x02
  53 #define CLIP_TOP_BIT 0x04
  54 #define CLIP_BOTTOM_BIT 0x08
  55 #define CLIP_FAR_BIT 0x10
  56 #define CLIP_NEAR_BIT 0x20
  57
  58
  59 static INLINE float
  60 dot4(const float *a, const float *b)
  61 {
  62    return (a[0]*b[0] +
  63            a[1]*b[1] +
  64            a[2]*b[2] +
  65            a[3]*b[3]);
  66 }
  67
  68 static INLINE unsigned
  69 compute_clipmask(const float *clip, /*const*/ float plane[][4], unsigned nr)
  70 {
  71    unsigned mask = 0;
  72    unsigned i;
  73
  74    /* Do the hardwired planes first:
  75     */
  76    if (-clip[0] + clip[3] < 0) mask |= CLIP_RIGHT_BIT;
  77    if ( clip[0] + clip[3] < 0) mask |= CLIP_LEFT_BIT;
  78    if (-clip[1] + clip[3] < 0) mask |= CLIP_TOP_BIT;
  79    if ( clip[1] + clip[3] < 0) mask |= CLIP_BOTTOM_BIT;
  80    if (-clip[2] + clip[3] < 0) mask |= CLIP_FAR_BIT;
  81    if ( clip[2] + clip[3] < 0) mask |= CLIP_NEAR_BIT;
  82
  83    /* Followed by any remaining ones:
  84     */
  85    for (i = 6; i < nr; i++) {
  86       if (dot4(clip, plane[i]) < 0)
  87          mask |= (1<<i);
  88    }
  89
  90    return mask;
  91 }
  92
  93
  94 /**
  95  * Transform vertices with the current vertex program/shader
  96  * Up to four vertices can be shaded at a time.
  97  * \param vbuffer  the input vertex data
  98  * \param elts  indexes of four input vertices
  99  * \param count  number of vertices to shade [1..4]
 100  * \param vOut  array of pointers to four output vertices
 101  */
 102 static void
 103 run_vertex_program(struct spu_vs_context *draw,
 104                    unsigned elts[4], unsigned count,
 105                    const uint64_t *vOut)
 106 {
 107    struct spu_exec_machine *machine = &draw->machine;
 108    unsigned int j;
 109
 110    ALIGN16_DECL(struct spu_exec_vector, inputs, PIPE_MAX_ATTRIBS);
 111    ALIGN16_DECL(struct spu_exec_vector, outputs, PIPE_MAX_ATTRIBS);
 112    const float *scale = draw->viewport.scale;
 113    const float *trans = draw->viewport.translate;
 114
 115    ASSERT(count <= 4);
 116
 117    machine->Processor = TGSI_PROCESSOR_VERTEX;
 118
 119    ASSERT_ALIGN16(draw->constants);
 120    machine->Consts = (float (*)[4]) draw->constants;
 121
 122    machine->Inputs = ALIGN16_ASSIGN(inputs);
 123    machine->Outputs = ALIGN16_ASSIGN(outputs);
 124
 125    spu_vertex_fetch( draw, machine, elts, count );
 126
 127    /* run shader */
 128    spu_exec_machine_run( machine );
 129
 130
 131    /* store machine results */
 132    for (j = 0; j < count; j++) {
 133       unsigned slot;
 134       float x, y, z, w;
 135       unsigned char buffer[sizeof(struct vertex_header)
 136           + MAX_VERTEX_SIZE] ALIGN16_ATTRIB;
 137       struct vertex_header *const tmpOut =
 138           (struct vertex_header *) buffer;
 139       const unsigned vert_size = ROUNDUP16(sizeof(struct vertex_header)
 140                                            + (sizeof(float) * 4
 141                                               * draw->num_vs_outputs));
 142
 143       mfc_get(tmpOut, vOut[j], vert_size, TAG_VERTEX_BUFFER, 0, 0);
 144       wait_on_mask(1 << TAG_VERTEX_BUFFER);
 145
 146
 147       /* Handle attr[0] (position) specially:
 148        *
 149        * XXX: Computing the clipmask should be done in the vertex
 150        * program as a set of DP4 instructions appended to the
 151        * user-provided code.
 152        */
 153       x = tmpOut->clip[0] = machine->Outputs[0].xyzw[0].f[j];
 154       y = tmpOut->clip[1] = machine->Outputs[0].xyzw[1].f[j];
 155       z = tmpOut->clip[2] = machine->Outputs[0].xyzw[2].f[j];
 156       w = tmpOut->clip[3] = machine->Outputs[0].xyzw[3].f[j];
 157
 158       tmpOut->clipmask = compute_clipmask(tmpOut->clip, draw->plane,
 159                                            draw->nr_planes);
 160       tmpOut->edgeflag = 1;
 161
 162       /* divide by w */
 163       w = 1.0f / w;
 164       x *= w;
 165       y *= w;
 166       z *= w;
 167
 168       /* Viewport mapping */
 169       tmpOut->data[0][0] = x * scale[0] + trans[0];
 170       tmpOut->data[0][1] = y * scale[1] + trans[1];
 171       tmpOut->data[0][2] = z * scale[2] + trans[2];
 172       tmpOut->data[0][3] = w;
 173
 174       /* Remaining attributes are packed into sequential post-transform
 175        * vertex attrib slots.
 176        */
 177       for (slot = 1; slot < draw->num_vs_outputs; slot++) {
 178          tmpOut->data[slot][0] = machine->Outputs[slot].xyzw[0].f[j];
 179          tmpOut->data[slot][1] = machine->Outputs[slot].xyzw[1].f[j];
 180          tmpOut->data[slot][2] = machine->Outputs[slot].xyzw[2].f[j];
 181          tmpOut->data[slot][3] = machine->Outputs[slot].xyzw[3].f[j];
 182       }
 183
 184       mfc_put(tmpOut, vOut[j], vert_size, TAG_VERTEX_BUFFER, 0, 0);
 185    } /* loop over vertices */
 186 }
 187
 188
 189 unsigned char immediates[(sizeof(float) * 4 * TGSI_EXEC_NUM_IMMEDIATES) + 32]
 190     ALIGN16_ATTRIB;
 191
 192
 193 void
 194 spu_bind_vertex_shader(struct spu_vs_context *draw,
 195                        struct cell_shader_info *vs)
 196 {
 197    const unsigned immediate_addr = vs->immediates;
 198    const unsigned immediate_size =
 199        ROUNDUP16((sizeof(float) * 4 * vs->num_immediates)
 200                  + (immediate_addr & 0x0f));
 201
 202
 203    mfc_get(immediates, immediate_addr & ~0x0f, immediate_size,
 204            TAG_VERTEX_BUFFER, 0, 0);
 205
 206    draw->machine.Instructions = (struct tgsi_full_instruction *)
 207        vs->instructions;
 208    draw->machine.NumInstructions = vs->num_instructions;
 209
 210    draw->machine.Declarations = (struct tgsi_full_declaration *)
 211        vs->declarations;
 212    draw->machine.NumDeclarations = vs->num_declarations;
 213
 214    draw->num_vs_outputs = vs->num_outputs;
 215
 216    /* specify the shader to interpret/execute */
 217    spu_exec_machine_init(&draw->machine,
 218                          PIPE_MAX_SAMPLERS,
 219                          NULL /*samplers*/,
 220                          PIPE_SHADER_VERTEX);
 221
 222    wait_on_mask(1 << TAG_VERTEX_BUFFER);
 223
 224    (void) memcpy(& draw->machine.Imms, &immediates[immediate_addr & 0x0f],
 225                  sizeof(float) * 4 * vs->num_immediates);
 226 }
 227
 228
 229 void
 230 spu_execute_vertex_shader(struct spu_vs_context *draw,
 231                           const struct cell_command_vs *vs)
 232 {
 233    unsigned i;
 234
 235    (void) memcpy(draw->plane, vs->plane, sizeof(float) * 4 * vs->nr_planes);
 236    draw->nr_planes = vs->nr_planes;
 237    draw->vertex_fetch.nr_attrs = vs->nr_attrs;
 238
 239    for (i = 0; i < vs->num_elts; i += 4) {
 240       const unsigned batch_size = MIN2(vs->num_elts - i, 4);
 241
 242       run_vertex_program(draw, & vs->elts[i], batch_size, &vs->vOut[i]);
 243    }
 244 }