ddebug: implement clear_texture
[mesa.git] / src / gallium / drivers / ddebug / dd_pipe.h
1 /**************************************************************************
2 *
3 * Copyright 2015 Advanced Micro Devices, Inc.
4 * Copyright 2008 VMware, Inc.
5 * All Rights Reserved.
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a
8 * copy of this software and associated documentation files (the "Software"),
9 * to deal in the Software without restriction, including without limitation
10 * on the rights to use, copy, modify, merge, publish, distribute, sub
11 * license, and/or sell copies of the Software, and to permit persons to whom
12 * the Software is furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice (including the next
15 * paragraph) shall be included in all copies or substantial portions of the
16 * Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHOR(S) AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM,
22 * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
23 * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
24 * USE OR OTHER DEALINGS IN THE SOFTWARE.
25 *
26 **************************************************************************/
27
28 #ifndef DD_H_
29 #define DD_H_
30
31 #include "pipe/p_context.h"
32 #include "pipe/p_state.h"
33 #include "pipe/p_screen.h"
34 #include "dd_util.h"
35 #include "os/os_thread.h"
36
37 enum dd_mode {
38 DD_DETECT_HANGS,
39 DD_DETECT_HANGS_PIPELINED,
40 DD_DUMP_ALL_CALLS,
41 DD_DUMP_APITRACE_CALL,
42 };
43
44 struct dd_screen
45 {
46 struct pipe_screen base;
47 struct pipe_screen *screen;
48 unsigned timeout_ms;
49 enum dd_mode mode;
50 bool no_flush;
51 bool verbose;
52 unsigned skip_count;
53 unsigned apitrace_dump_call;
54 };
55
56 enum call_type
57 {
58 CALL_DRAW_VBO,
59 CALL_LAUNCH_GRID,
60 CALL_RESOURCE_COPY_REGION,
61 CALL_BLIT,
62 CALL_FLUSH_RESOURCE,
63 CALL_CLEAR,
64 CALL_CLEAR_BUFFER,
65 CALL_CLEAR_TEXTURE,
66 CALL_CLEAR_RENDER_TARGET,
67 CALL_CLEAR_DEPTH_STENCIL,
68 CALL_GENERATE_MIPMAP,
69 };
70
71 struct call_resource_copy_region
72 {
73 struct pipe_resource *dst;
74 unsigned dst_level;
75 unsigned dstx, dsty, dstz;
76 struct pipe_resource *src;
77 unsigned src_level;
78 struct pipe_box src_box;
79 };
80
81 struct call_clear
82 {
83 unsigned buffers;
84 union pipe_color_union color;
85 double depth;
86 unsigned stencil;
87 };
88
89 struct call_clear_buffer
90 {
91 struct pipe_resource *res;
92 unsigned offset;
93 unsigned size;
94 const void *clear_value;
95 int clear_value_size;
96 };
97
98 struct call_generate_mipmap {
99 struct pipe_resource *res;
100 enum pipe_format format;
101 unsigned base_level;
102 unsigned last_level;
103 unsigned first_layer;
104 unsigned last_layer;
105 };
106
107 struct dd_call
108 {
109 enum call_type type;
110
111 union {
112 struct pipe_draw_info draw_vbo;
113 struct pipe_grid_info launch_grid;
114 struct call_resource_copy_region resource_copy_region;
115 struct pipe_blit_info blit;
116 struct pipe_resource *flush_resource;
117 struct call_clear clear;
118 struct call_clear_buffer clear_buffer;
119 struct call_generate_mipmap generate_mipmap;
120 } info;
121 };
122
123 struct dd_query
124 {
125 unsigned type;
126 struct pipe_query *query;
127 };
128
129 struct dd_state
130 {
131 void *cso;
132
133 union {
134 struct pipe_blend_state blend;
135 struct pipe_depth_stencil_alpha_state dsa;
136 struct pipe_rasterizer_state rs;
137 struct pipe_sampler_state sampler;
138 struct {
139 struct pipe_vertex_element velems[PIPE_MAX_ATTRIBS];
140 unsigned count;
141 } velems;
142 struct pipe_shader_state shader;
143 } state;
144 };
145
146 struct dd_draw_state
147 {
148 struct {
149 struct dd_query *query;
150 bool condition;
151 unsigned mode;
152 } render_cond;
153
154 struct pipe_index_buffer index_buffer;
155 struct pipe_vertex_buffer vertex_buffers[PIPE_MAX_ATTRIBS];
156
157 unsigned num_so_targets;
158 struct pipe_stream_output_target *so_targets[PIPE_MAX_SO_BUFFERS];
159 unsigned so_offsets[PIPE_MAX_SO_BUFFERS];
160
161 struct dd_state *shaders[PIPE_SHADER_TYPES];
162 struct pipe_constant_buffer constant_buffers[PIPE_SHADER_TYPES][PIPE_MAX_CONSTANT_BUFFERS];
163 struct pipe_sampler_view *sampler_views[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
164 struct dd_state *sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
165 struct pipe_image_view shader_images[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_IMAGES];
166 struct pipe_shader_buffer shader_buffers[PIPE_SHADER_TYPES][PIPE_MAX_SHADER_BUFFERS];
167
168 struct dd_state *velems;
169 struct dd_state *rs;
170 struct dd_state *dsa;
171 struct dd_state *blend;
172
173 struct pipe_blend_color blend_color;
174 struct pipe_stencil_ref stencil_ref;
175 unsigned sample_mask;
176 unsigned min_samples;
177 struct pipe_clip_state clip_state;
178 struct pipe_framebuffer_state framebuffer_state;
179 struct pipe_poly_stipple polygon_stipple;
180 struct pipe_scissor_state scissors[PIPE_MAX_VIEWPORTS];
181 struct pipe_viewport_state viewports[PIPE_MAX_VIEWPORTS];
182 float tess_default_levels[6];
183
184 unsigned apitrace_call_number;
185 };
186
187 struct dd_draw_state_copy
188 {
189 struct dd_draw_state base;
190
191 /* dd_draw_state_copy does not reference real CSOs. Instead, it points to
192 * these variables, which serve as storage.
193 */
194 struct dd_query render_cond;
195 struct dd_state shaders[PIPE_SHADER_TYPES];
196 struct dd_state sampler_states[PIPE_SHADER_TYPES][PIPE_MAX_SAMPLERS];
197 struct dd_state velems;
198 struct dd_state rs;
199 struct dd_state dsa;
200 struct dd_state blend;
201 };
202
203 struct dd_draw_record {
204 struct dd_draw_record *next;
205
206 int64_t timestamp;
207 uint32_t sequence_no;
208
209 struct dd_call call;
210 struct dd_draw_state_copy draw_state;
211 char *driver_state_log;
212 };
213
214 struct dd_context
215 {
216 struct pipe_context base;
217 struct pipe_context *pipe;
218
219 struct dd_draw_state draw_state;
220 unsigned num_draw_calls;
221
222 /* Pipelined hang detection.
223 *
224 * This is without unnecessary flushes and waits. There is a memory-based
225 * fence that is incremented by clear_buffer every draw call. Driver fences
226 * are not used.
227 *
228 * After each draw call, a new dd_draw_record is created that contains
229 * a copy of all states, the output of pipe_context::dump_debug_state,
230 * and it has a fence number assigned. That's done without knowing whether
231 * that draw call is problematic or not. The record is added into the list
232 * of all records.
233 *
234 * An independent, separate thread loops over the list of records and checks
235 * their fences. Records with signalled fences are freed. On fence timeout,
236 * the thread dumps the record of the oldest unsignalled fence.
237 */
238 thrd_t thread;
239 mtx_t mutex;
240 int kill_thread;
241 struct pipe_resource *fence;
242 struct pipe_transfer *fence_transfer;
243 uint32_t *mapped_fence;
244 uint32_t sequence_no;
245 struct dd_draw_record *records;
246 int max_log_buffer_size;
247 };
248
249
250 struct pipe_context *
251 dd_context_create(struct dd_screen *dscreen, struct pipe_context *pipe);
252
253 void
254 dd_init_draw_functions(struct dd_context *dctx);
255 int
256 dd_thread_pipelined_hang_detect(void *input);
257
258
259 static inline struct dd_context *
260 dd_context(struct pipe_context *pipe)
261 {
262 return (struct dd_context *)pipe;
263 }
264
265 static inline struct dd_screen *
266 dd_screen(struct pipe_screen *screen)
267 {
268 return (struct dd_screen*)screen;
269 }
270
271
272 #define CTX_INIT(_member) \
273 dctx->base._member = dctx->pipe->_member ? dd_context_##_member : NULL
274
275 #endif /* DD_H_ */