etnaviv: asm: new features
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_asm.h
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #ifndef H_ETNAVIV_ASM
28 #define H_ETNAVIV_ASM
29
30 #include <stdint.h>
31 #include <stdbool.h>
32 #include "hw/isa.xml.h"
33
34 /* Size of an instruction in 32-bit words */
35 #define ETNA_INST_SIZE (4)
36 /* Number of source operands per instruction */
37 #define ETNA_NUM_SRC (3)
38
39 /* Broadcast swizzle to all four components */
40 #define INST_SWIZ_BROADCAST(x) \
41 (INST_SWIZ_X(x) | INST_SWIZ_Y(x) | INST_SWIZ_Z(x) | INST_SWIZ_W(x))
42 /* Identity (NOP) swizzle */
43 #define INST_SWIZ_IDENTITY \
44 (INST_SWIZ_X(0) | INST_SWIZ_Y(1) | INST_SWIZ_Z(2) | INST_SWIZ_W(3))
45 /* Fully specified swizzle */
46 #define INST_SWIZ(x,y,z,w) \
47 (INST_SWIZ_X(x) | INST_SWIZ_Y(y) | INST_SWIZ_Z(z) | INST_SWIZ_W(w))
48 #define SWIZZLE(c0,c1,c2,c3) \
49 INST_SWIZ(INST_SWIZ_COMP_##c0, \
50 INST_SWIZ_COMP_##c1, \
51 INST_SWIZ_COMP_##c2, \
52 INST_SWIZ_COMP_##c3)
53
54 /*** operands ***/
55
56 /* destination operand */
57 struct etna_inst_dst {
58 unsigned use:1; /* 0: not in use, 1: in use */
59 unsigned amode:3; /* INST_AMODE_* */
60 unsigned reg:7; /* register number 0..127 */
61 unsigned write_mask:4; /* INST_COMPS_* */
62 };
63
64 /* texture operand */
65 struct etna_inst_tex {
66 unsigned id:5; /* sampler id */
67 unsigned amode:3; /* INST_AMODE_* */
68 unsigned swiz:8; /* INST_SWIZ */
69 };
70
71 /* source operand */
72 struct etna_inst_src {
73 unsigned use:1; /* 0: not in use, 1: in use */
74 unsigned rgroup:3; /* INST_RGROUP_* */
75 union {
76 struct __attribute__((__packed__)) {
77 unsigned reg:9; /* register or uniform number 0..511 */
78 unsigned swiz:8; /* INST_SWIZ */
79 unsigned neg:1; /* negate (flip sign) if set */
80 unsigned abs:1; /* absolute (remove sign) if set */
81 unsigned amode:3; /* INST_AMODE_* */
82 };
83 struct __attribute__((__packed__)) {
84 unsigned imm_val : 20;
85 unsigned imm_type : 2;
86 };
87 };
88 };
89
90 /*** instruction ***/
91 struct etna_inst {
92 uint8_t opcode; /* INST_OPCODE_* */
93 uint8_t type; /* INST_TYPE_* */
94 unsigned cond:5; /* INST_CONDITION_* */
95 unsigned sat:1; /* saturate result between 0..1 */
96 unsigned sel_bit0:1; /* select low half mediump */
97 unsigned sel_bit1:1; /* select high half mediump */
98 unsigned dst_full:1; /* write to highp register */
99 unsigned halti5:1; /* allow multiple different uniform sources */
100 struct etna_inst_dst dst; /* destination operand */
101 struct etna_inst_tex tex; /* texture operand */
102 struct etna_inst_src src[ETNA_NUM_SRC]; /* source operand */
103 unsigned imm; /* takes place of src[2] for BRANCH/CALL */
104 };
105
106 /* Compose two swizzles (computes swz1.swz2) */
107 static inline uint32_t inst_swiz_compose(uint32_t swz1, uint32_t swz2)
108 {
109 return INST_SWIZ_X((swz1 >> (((swz2 >> 0)&3)*2))&3) |
110 INST_SWIZ_Y((swz1 >> (((swz2 >> 2)&3)*2))&3) |
111 INST_SWIZ_Z((swz1 >> (((swz2 >> 4)&3)*2))&3) |
112 INST_SWIZ_W((swz1 >> (((swz2 >> 6)&3)*2))&3);
113 };
114
115 /* Compose two write_masks (computes wm1.wm2) */
116 static inline uint32_t inst_write_mask_compose(uint32_t wm1, uint32_t wm2)
117 {
118 unsigned wm = 0;
119 for (unsigned i = 0, j = 0; i < 4; i++) {
120 if (wm2 & (1 << i)) {
121 if (wm1 & (1 << j))
122 wm |= (1 << i);
123 j++;
124 }
125 }
126 return wm;
127 };
128
129 /* Return whether the rgroup is one of the uniforms */
130 static inline int
131 etna_rgroup_is_uniform(unsigned rgroup)
132 {
133 return rgroup == INST_RGROUP_UNIFORM_0 ||
134 rgroup == INST_RGROUP_UNIFORM_1;
135 }
136
137 static inline struct etna_inst_src
138 etna_immediate_src(unsigned type, uint32_t bits)
139 {
140 return (struct etna_inst_src) {
141 .use = 1,
142 .rgroup = INST_RGROUP_IMMEDIATE,
143 .imm_val = bits,
144 .imm_type = type
145 };
146 }
147
148 /**
149 * Build vivante instruction from structure with
150 * opcode, cond, sat, dst_use, dst_amode,
151 * dst_reg, dst_comps, tex_id, tex_amode, tex_swiz,
152 * src[0-2]_reg, use, swiz, neg, abs, amode, rgroup,
153 * imm
154 *
155 * Return 0 if successful, and a non-zero
156 * value otherwise.
157 */
158 int
159 etna_assemble(uint32_t *out, const struct etna_inst *inst);
160
161 /**
162 * Set field imm of already-assembled instruction.
163 * This is used for filling in jump destinations in a separate pass.
164 */
165 static inline void
166 etna_assemble_set_imm(uint32_t *out, uint32_t imm)
167 {
168 out[3] |= VIV_ISA_WORD_3_SRC2_IMM(imm);
169 }
170
171 #endif