2 * Copyright (c) 2017 Etnaviv Project
3 * Copyright (C) 2017 Zodiac Inflight Innovations
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Wladimir J. van der Laan <laanwj@gmail.com>
27 #include "etnaviv_blt.h"
29 #include "etnaviv_emit.h"
30 #include "etnaviv_clear_blit.h"
31 #include "etnaviv_context.h"
32 #include "etnaviv_emit.h"
33 #include "etnaviv_format.h"
34 #include "etnaviv_resource.h"
35 #include "etnaviv_surface.h"
36 #include "etnaviv_translate.h"
38 #include "util/u_math.h"
39 #include "pipe/p_defines.h"
40 #include "pipe/p_state.h"
41 #include "util/u_blitter.h"
42 #include "util/u_inlines.h"
43 #include "util/u_memory.h"
44 #include "util/u_surface.h"
46 #include "hw/common_3d.xml.h"
47 #include "hw/state_blt.xml.h"
48 #include "hw/common.xml.h"
52 /* Currently, used BLT formats overlap 100% with RS formats */
53 #define translate_blt_format translate_rs_format
55 static inline uint32_t
56 blt_compute_stride_bits(const struct blt_imginfo
*img
)
58 return VIVS_BLT_DEST_STRIDE_TILING(img
->tiling
== ETNA_LAYOUT_LINEAR
? 0 : 3) | /* 1/3? */
59 VIVS_BLT_DEST_STRIDE_FORMAT(img
->format
) |
60 VIVS_BLT_DEST_STRIDE_STRIDE(img
->stride
);
63 static inline uint32_t
64 blt_compute_img_config_bits(const struct blt_imginfo
*img
, bool for_dest
)
66 uint32_t tiling_bits
= 0;
67 if (img
->tiling
== ETNA_LAYOUT_SUPER_TILED
) {
68 tiling_bits
|= for_dest
? BLT_IMAGE_CONFIG_TO_SUPER_TILED
: BLT_IMAGE_CONFIG_FROM_SUPER_TILED
;
71 return BLT_IMAGE_CONFIG_TS_MODE(img
->ts_mode
) |
72 COND(img
->use_ts
, BLT_IMAGE_CONFIG_TS
) |
73 COND(img
->use_ts
&& img
->ts_compress_fmt
>= 0, BLT_IMAGE_CONFIG_COMPRESSION
) |
74 BLT_IMAGE_CONFIG_COMPRESSION_FORMAT(img
->ts_compress_fmt
) |
75 COND(for_dest
, BLT_IMAGE_CONFIG_UNK22
) |
76 BLT_IMAGE_CONFIG_SWIZ_R(0) | /* not used? */
77 BLT_IMAGE_CONFIG_SWIZ_G(1) |
78 BLT_IMAGE_CONFIG_SWIZ_B(2) |
79 BLT_IMAGE_CONFIG_SWIZ_A(3) |
83 static inline uint32_t
84 blt_compute_swizzle_bits(const struct blt_imginfo
*img
, bool for_dest
)
86 uint32_t swiz
= VIVS_BLT_SWIZZLE_SRC_R(img
->swizzle
[0]) |
87 VIVS_BLT_SWIZZLE_SRC_G(img
->swizzle
[1]) |
88 VIVS_BLT_SWIZZLE_SRC_B(img
->swizzle
[2]) |
89 VIVS_BLT_SWIZZLE_SRC_A(img
->swizzle
[3]);
90 return for_dest
? (swiz
<< 12) : swiz
;
93 /* Clear (part of) an image */
95 emit_blt_clearimage(struct etna_cmd_stream
*stream
, const struct blt_clear_op
*op
)
97 etna_cmd_stream_reserve(stream
, 64*2); /* Make sure BLT op doesn't get broken up */
99 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000001);
100 assert(op
->dest
.bpp
);
101 etna_set_state(stream
, VIVS_BLT_CONFIG
, VIVS_BLT_CONFIG_CLEAR_BPP(op
->dest
.bpp
-1));
102 /* NB: blob sets format to 1 in dest/src config for clear, and the swizzle to RRRR.
103 * does this matter? It seems to just be ignored. But if we run into issues with BLT
104 * behaving stragely, it's something to look at.
106 etna_set_state(stream
, VIVS_BLT_DEST_STRIDE
, blt_compute_stride_bits(&op
->dest
));
107 etna_set_state(stream
, VIVS_BLT_DEST_CONFIG
, blt_compute_img_config_bits(&op
->dest
, true));
108 etna_set_state_reloc(stream
, VIVS_BLT_DEST_ADDR
, &op
->dest
.addr
);
109 etna_set_state(stream
, VIVS_BLT_SRC_STRIDE
, blt_compute_stride_bits(&op
->dest
));
110 etna_set_state(stream
, VIVS_BLT_SRC_CONFIG
, blt_compute_img_config_bits(&op
->dest
, false));
111 etna_set_state_reloc(stream
, VIVS_BLT_SRC_ADDR
, &op
->dest
.addr
);
112 etna_set_state(stream
, VIVS_BLT_DEST_POS
, VIVS_BLT_DEST_POS_X(op
->rect_x
) | VIVS_BLT_DEST_POS_Y(op
->rect_y
));
113 etna_set_state(stream
, VIVS_BLT_IMAGE_SIZE
, VIVS_BLT_IMAGE_SIZE_WIDTH(op
->rect_w
) | VIVS_BLT_IMAGE_SIZE_HEIGHT(op
->rect_h
));
114 etna_set_state(stream
, VIVS_BLT_CLEAR_COLOR0
, op
->clear_value
[0]);
115 etna_set_state(stream
, VIVS_BLT_CLEAR_COLOR1
, op
->clear_value
[1]);
116 etna_set_state(stream
, VIVS_BLT_CLEAR_BITS0
, op
->clear_bits
[0]);
117 etna_set_state(stream
, VIVS_BLT_CLEAR_BITS1
, op
->clear_bits
[1]);
118 if (op
->dest
.use_ts
) {
119 etna_set_state_reloc(stream
, VIVS_BLT_DEST_TS
, &op
->dest
.ts_addr
);
120 etna_set_state_reloc(stream
, VIVS_BLT_SRC_TS
, &op
->dest
.ts_addr
);
121 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE0
, op
->dest
.ts_clear_value
[0]);
122 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE1
, op
->dest
.ts_clear_value
[1]);
123 etna_set_state(stream
, VIVS_BLT_SRC_TS_CLEAR_VALUE0
, op
->dest
.ts_clear_value
[0]);
124 etna_set_state(stream
, VIVS_BLT_SRC_TS_CLEAR_VALUE1
, op
->dest
.ts_clear_value
[1]);
126 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
127 etna_set_state(stream
, VIVS_BLT_COMMAND
, VIVS_BLT_COMMAND_COMMAND_CLEAR_IMAGE
);
128 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
129 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000000);
132 /* Copy (a subset of) an image to another image. */
134 emit_blt_copyimage(struct etna_cmd_stream
*stream
, const struct blt_imgcopy_op
*op
)
136 etna_cmd_stream_reserve(stream
, 64*2); /* Never allow BLT sequences to be broken up */
138 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000001);
139 etna_set_state(stream
, VIVS_BLT_CONFIG
,
140 VIVS_BLT_CONFIG_SRC_ENDIAN(op
->src
.endian_mode
) |
141 VIVS_BLT_CONFIG_DEST_ENDIAN(op
->dest
.endian_mode
));
142 etna_set_state(stream
, VIVS_BLT_SRC_STRIDE
, blt_compute_stride_bits(&op
->src
));
143 etna_set_state(stream
, VIVS_BLT_SRC_CONFIG
, blt_compute_img_config_bits(&op
->src
, false));
144 etna_set_state(stream
, VIVS_BLT_SWIZZLE
,
145 blt_compute_swizzle_bits(&op
->src
, false) |
146 blt_compute_swizzle_bits(&op
->dest
, true));
147 etna_set_state(stream
, VIVS_BLT_UNK140A0
, 0x00040004);
148 etna_set_state(stream
, VIVS_BLT_UNK1409C
, 0x00400040);
149 if (op
->src
.use_ts
) {
150 etna_set_state_reloc(stream
, VIVS_BLT_SRC_TS
, &op
->src
.ts_addr
);
151 etna_set_state(stream
, VIVS_BLT_SRC_TS_CLEAR_VALUE0
, op
->src
.ts_clear_value
[0]);
152 etna_set_state(stream
, VIVS_BLT_SRC_TS_CLEAR_VALUE1
, op
->src
.ts_clear_value
[1]);
154 etna_set_state_reloc(stream
, VIVS_BLT_SRC_ADDR
, &op
->src
.addr
);
155 etna_set_state(stream
, VIVS_BLT_DEST_STRIDE
, blt_compute_stride_bits(&op
->dest
));
156 etna_set_state(stream
, VIVS_BLT_DEST_CONFIG
,
157 blt_compute_img_config_bits(&op
->dest
, true) |
158 COND(op
->flip_y
, BLT_IMAGE_CONFIG_FLIP_Y
));
159 assert(!op
->dest
.use_ts
); /* Dest TS path doesn't work for copies? */
160 if (op
->dest
.use_ts
) {
161 etna_set_state_reloc(stream
, VIVS_BLT_DEST_TS
, &op
->dest
.ts_addr
);
162 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE0
, op
->dest
.ts_clear_value
[0]);
163 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE1
, op
->dest
.ts_clear_value
[1]);
165 etna_set_state_reloc(stream
, VIVS_BLT_DEST_ADDR
, &op
->dest
.addr
);
166 etna_set_state(stream
, VIVS_BLT_SRC_POS
, VIVS_BLT_DEST_POS_X(op
->src_x
) | VIVS_BLT_DEST_POS_Y(op
->src_y
));
167 etna_set_state(stream
, VIVS_BLT_DEST_POS
, VIVS_BLT_DEST_POS_X(op
->dest_x
) | VIVS_BLT_DEST_POS_Y(op
->dest_y
));
168 etna_set_state(stream
, VIVS_BLT_IMAGE_SIZE
, VIVS_BLT_IMAGE_SIZE_WIDTH(op
->rect_w
) | VIVS_BLT_IMAGE_SIZE_HEIGHT(op
->rect_h
));
169 etna_set_state(stream
, VIVS_BLT_UNK14058
, 0xffffffff);
170 etna_set_state(stream
, VIVS_BLT_UNK1405C
, 0xffffffff);
171 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
172 etna_set_state(stream
, VIVS_BLT_COMMAND
, VIVS_BLT_COMMAND_COMMAND_COPY_IMAGE
);
173 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
174 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000000);
177 /* Emit in-place resolve using BLT. */
179 emit_blt_inplace(struct etna_cmd_stream
*stream
, const struct blt_inplace_op
*op
)
181 assert(op
->bpp
> 0 && util_is_power_of_two_nonzero(op
->bpp
));
182 etna_cmd_stream_reserve(stream
, 64*2); /* Never allow BLT sequences to be broken up */
183 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000001);
184 etna_set_state(stream
, VIVS_BLT_CONFIG
,
185 VIVS_BLT_CONFIG_INPLACE_TS_MODE(op
->ts_mode
) |
186 VIVS_BLT_CONFIG_INPLACE_BOTH
|
187 (util_logbase2(op
->bpp
) << VIVS_BLT_CONFIG_INPLACE_BPP__SHIFT
));
188 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE0
, op
->ts_clear_value
[0]);
189 etna_set_state(stream
, VIVS_BLT_DEST_TS_CLEAR_VALUE1
, op
->ts_clear_value
[1]);
190 etna_set_state_reloc(stream
, VIVS_BLT_DEST_ADDR
, &op
->addr
);
191 etna_set_state_reloc(stream
, VIVS_BLT_DEST_TS
, &op
->ts_addr
);
192 etna_set_state(stream
, 0x14068, op
->num_tiles
);
193 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
194 etna_set_state(stream
, VIVS_BLT_COMMAND
, 0x00000004);
195 etna_set_state(stream
, VIVS_BLT_SET_COMMAND
, 0x00000003);
196 etna_set_state(stream
, VIVS_BLT_ENABLE
, 0x00000000);
200 etna_blit_clear_color_blt(struct pipe_context
*pctx
, struct pipe_surface
*dst
,
201 const union pipe_color_union
*color
)
203 struct etna_context
*ctx
= etna_context(pctx
);
204 struct etna_surface
*surf
= etna_surface(dst
);
205 uint32_t new_clear_value
= etna_clear_blit_pack_rgba(surf
->base
.format
, color
->f
);
207 struct etna_resource
*res
= etna_resource(surf
->base
.texture
);
208 struct blt_clear_op clr
= {};
209 clr
.dest
.addr
.bo
= res
->bo
;
210 clr
.dest
.addr
.offset
= surf
->surf
.offset
;
211 clr
.dest
.addr
.flags
= ETNA_RELOC_WRITE
;
212 clr
.dest
.bpp
= util_format_get_blocksize(surf
->base
.format
);
213 clr
.dest
.stride
= surf
->surf
.stride
;
214 clr
.dest
.tiling
= res
->layout
;
216 if (surf
->surf
.ts_size
) {
218 clr
.dest
.ts_addr
.bo
= res
->ts_bo
;
219 clr
.dest
.ts_addr
.offset
= 0;
220 clr
.dest
.ts_addr
.flags
= ETNA_RELOC_WRITE
;
221 clr
.dest
.ts_clear_value
[0] = new_clear_value
;
222 clr
.dest
.ts_clear_value
[1] = new_clear_value
;
223 clr
.dest
.ts_mode
= surf
->level
->ts_mode
;
224 clr
.dest
.ts_compress_fmt
= surf
->level
->ts_compress_fmt
;
227 clr
.clear_value
[0] = new_clear_value
;
228 clr
.clear_value
[1] = new_clear_value
;
229 clr
.clear_bits
[0] = 0xffffffff; /* TODO: Might want to clear only specific channels? */
230 clr
.clear_bits
[1] = 0xffffffff;
231 clr
.rect_x
= 0; /* What about scissors? */
233 clr
.rect_w
= surf
->surf
.width
;
234 clr
.rect_h
= surf
->surf
.height
;
236 emit_blt_clearimage(ctx
->stream
, &clr
);
238 /* This made the TS valid */
239 if (surf
->surf
.ts_size
) {
240 ctx
->framebuffer
.TS_COLOR_CLEAR_VALUE
= new_clear_value
;
241 surf
->level
->ts_valid
= true;
244 surf
->level
->clear_value
= new_clear_value
;
245 resource_written(ctx
, surf
->base
.texture
);
246 etna_resource(surf
->base
.texture
)->seqno
++;
250 etna_blit_clear_zs_blt(struct pipe_context
*pctx
, struct pipe_surface
*dst
,
251 unsigned buffers
, double depth
, unsigned stencil
)
253 struct etna_context
*ctx
= etna_context(pctx
);
254 struct etna_surface
*surf
= etna_surface(dst
);
255 uint32_t new_clear_value
= translate_clear_depth_stencil(surf
->base
.format
, depth
, stencil
);
256 uint32_t new_clear_bits
= 0, clear_bits_depth
, clear_bits_stencil
;
258 /* Get the channels to clear */
259 switch (surf
->base
.format
) {
260 case PIPE_FORMAT_Z16_UNORM
:
261 case PIPE_FORMAT_X8Z24_UNORM
:
262 clear_bits_depth
= 0xffffffff;
263 clear_bits_stencil
= 0x00000000;
265 case PIPE_FORMAT_S8_UINT_Z24_UNORM
:
266 clear_bits_depth
= 0xffffff00;
267 clear_bits_stencil
= 0x000000ff;
270 clear_bits_depth
= clear_bits_stencil
= 0xffffffff;
274 if (buffers
& PIPE_CLEAR_DEPTH
)
275 new_clear_bits
|= clear_bits_depth
;
276 if (buffers
& PIPE_CLEAR_STENCIL
)
277 new_clear_bits
|= clear_bits_stencil
;
279 /* TODO unduplicate this */
280 struct etna_resource
*res
= etna_resource(surf
->base
.texture
);
281 struct blt_clear_op clr
= {};
282 clr
.dest
.addr
.bo
= res
->bo
;
283 clr
.dest
.addr
.offset
= surf
->surf
.offset
;
284 clr
.dest
.addr
.flags
= ETNA_RELOC_WRITE
;
285 clr
.dest
.bpp
= util_format_get_blocksize(surf
->base
.format
);
286 clr
.dest
.stride
= surf
->surf
.stride
;
287 clr
.dest
.tiling
= res
->layout
;
289 if (surf
->surf
.ts_size
) {
291 clr
.dest
.ts_addr
.bo
= res
->ts_bo
;
292 clr
.dest
.ts_addr
.offset
= 0;
293 clr
.dest
.ts_addr
.flags
= ETNA_RELOC_WRITE
;
294 clr
.dest
.ts_clear_value
[0] = new_clear_value
;
295 clr
.dest
.ts_clear_value
[1] = new_clear_value
;
296 clr
.dest
.ts_mode
= surf
->level
->ts_mode
;
297 clr
.dest
.ts_compress_fmt
= surf
->level
->ts_compress_fmt
;
300 clr
.clear_value
[0] = new_clear_value
;
301 clr
.clear_value
[1] = new_clear_value
;
302 clr
.clear_bits
[0] = new_clear_bits
;
303 clr
.clear_bits
[1] = new_clear_bits
;
304 clr
.rect_x
= 0; /* What about scissors? */
306 clr
.rect_w
= surf
->surf
.width
;
307 clr
.rect_h
= surf
->surf
.height
;
309 emit_blt_clearimage(ctx
->stream
, &clr
);
311 /* This made the TS valid */
312 if (surf
->surf
.ts_size
) {
313 ctx
->framebuffer
.TS_DEPTH_CLEAR_VALUE
= new_clear_value
;
314 surf
->level
->ts_valid
= true;
317 surf
->level
->clear_value
= new_clear_value
;
318 resource_written(ctx
, surf
->base
.texture
);
319 etna_resource(surf
->base
.texture
)->seqno
++;
323 etna_clear_blt(struct pipe_context
*pctx
, unsigned buffers
,
324 const union pipe_color_union
*color
, double depth
, unsigned stencil
)
326 struct etna_context
*ctx
= etna_context(pctx
);
328 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000c23);
329 etna_set_state(ctx
->stream
, VIVS_TS_FLUSH_CACHE
, VIVS_TS_FLUSH_CACHE_FLUSH
);
331 if (buffers
& PIPE_CLEAR_COLOR
) {
332 for (int idx
= 0; idx
< ctx
->framebuffer_s
.nr_cbufs
; ++idx
) {
333 etna_blit_clear_color_blt(pctx
, ctx
->framebuffer_s
.cbufs
[idx
],
338 if ((buffers
& PIPE_CLEAR_DEPTHSTENCIL
) && ctx
->framebuffer_s
.zsbuf
!= NULL
)
339 etna_blit_clear_zs_blt(pctx
, ctx
->framebuffer_s
.zsbuf
, buffers
, depth
, stencil
);
341 etna_stall(ctx
->stream
, SYNC_RECIPIENT_RA
, SYNC_RECIPIENT_BLT
);
343 if ((buffers
& PIPE_CLEAR_COLOR
) && (buffers
& PIPE_CLEAR_DEPTH
))
344 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000c23);
346 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000002);
351 etna_try_blt_blit(struct pipe_context
*pctx
,
352 const struct pipe_blit_info
*blit_info
)
354 struct etna_context
*ctx
= etna_context(pctx
);
355 struct etna_resource
*src
= etna_resource(blit_info
->src
.resource
);
356 struct etna_resource
*dst
= etna_resource(blit_info
->dst
.resource
);
357 int msaa_xscale
= 1, msaa_yscale
= 1;
359 /* Ensure that the level is valid */
360 assert(blit_info
->src
.level
<= src
->base
.last_level
);
361 assert(blit_info
->dst
.level
<= dst
->base
.last_level
);
363 if (!translate_samples_to_xyscale(src
->base
.nr_samples
, &msaa_xscale
, &msaa_yscale
, NULL
))
366 /* The width/height are in pixels; they do not change as a result of
367 * multi-sampling. So, when blitting from a 4x multisampled surface
368 * to a non-multisampled surface, the width and height will be
369 * identical. As we do not support scaling, reject different sizes.
370 * TODO: could handle 2x downsample here with emit_blt_genmipmaps */
371 if (blit_info
->dst
.box
.width
!= blit_info
->src
.box
.width
||
372 blit_info
->dst
.box
.height
!= abs(blit_info
->src
.box
.height
)) { /* allow y flip for glTexImage2D */
373 DBG("scaling requested: source %dx%d destination %dx%d",
374 blit_info
->src
.box
.width
, blit_info
->src
.box
.height
,
375 blit_info
->dst
.box
.width
, blit_info
->dst
.box
.height
);
379 /* No masks - not sure if BLT can copy individual channels */
380 unsigned mask
= util_format_get_mask(blit_info
->dst
.format
);
381 if ((blit_info
->mask
& mask
) != mask
) {
382 DBG("sub-mask requested: 0x%02x vs format mask 0x%02x", blit_info
->mask
, mask
);
386 /* TODO: 1 byte per pixel formats aren't handled by etna_compatible_rs_format nor
387 * translate_rs_format.
389 unsigned src_format
= blit_info
->src
.format
;
390 unsigned dst_format
= blit_info
->dst
.format
;
392 /* for a copy with same dst/src format, we can use a different format */
393 if (translate_blt_format(src_format
) == ETNA_NO_MATCH
&&
394 src_format
== dst_format
) {
395 src_format
= dst_format
= etna_compatible_rs_format(src_format
);
398 if (translate_blt_format(src_format
) == ETNA_NO_MATCH
||
399 translate_blt_format(dst_format
) == ETNA_NO_MATCH
||
400 blit_info
->scissor_enable
||
401 blit_info
->dst
.box
.depth
!= blit_info
->src
.box
.depth
||
402 blit_info
->dst
.box
.depth
!= 1) {
406 struct etna_resource_level
*src_lev
= &src
->levels
[blit_info
->src
.level
];
407 struct etna_resource_level
*dst_lev
= &dst
->levels
[blit_info
->dst
.level
];
409 /* if we asked for in-place resolve, return immediately if ts isn't valid
410 * do this check separately because it applies when compression is used, but
411 * we can't use inplace resolve path with compression
414 assert(!memcmp(&blit_info
->src
, &blit_info
->dst
, sizeof(blit_info
->src
)));
415 if (!src_lev
->ts_size
|| !src_lev
->ts_valid
) /* No TS, no worries */
419 /* Kick off BLT here */
420 if (src
== dst
&& src_lev
->ts_compress_fmt
< 0) {
421 /* Resolve-in-place */
422 struct blt_inplace_op op
= {};
424 op
.addr
.bo
= src
->bo
;
425 op
.addr
.offset
= src_lev
->offset
+ blit_info
->src
.box
.z
* src_lev
->layer_stride
;
426 op
.addr
.flags
= ETNA_RELOC_READ
| ETNA_RELOC_WRITE
;
427 op
.ts_addr
.bo
= src
->ts_bo
;
428 op
.ts_addr
.offset
= src_lev
->ts_offset
+ blit_info
->src
.box
.z
* src_lev
->ts_layer_stride
;
429 op
.ts_addr
.flags
= ETNA_RELOC_READ
;
430 op
.ts_clear_value
[0] = src_lev
->clear_value
;
431 op
.ts_clear_value
[1] = src_lev
->clear_value
;
432 op
.ts_mode
= src_lev
->ts_mode
;
433 op
.num_tiles
= DIV_ROUND_UP(src_lev
->size
, src_lev
->ts_mode
? 256 : 128);
434 op
.bpp
= util_format_get_blocksize(src
->base
.format
);
436 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000c23);
437 etna_set_state(ctx
->stream
, VIVS_TS_FLUSH_CACHE
, 0x00000001);
438 emit_blt_inplace(ctx
->stream
, &op
);
441 struct blt_imgcopy_op op
= {};
443 op
.src
.addr
.bo
= src
->bo
;
444 op
.src
.addr
.offset
= src_lev
->offset
+ blit_info
->src
.box
.z
* src_lev
->layer_stride
;
445 op
.src
.addr
.flags
= ETNA_RELOC_READ
;
446 op
.src
.format
= translate_blt_format(src_format
);
447 op
.src
.stride
= src_lev
->stride
;
448 op
.src
.tiling
= src
->layout
;
449 const struct util_format_description
*src_format_desc
=
450 util_format_description(src_format
);
451 for (unsigned x
=0; x
<4; ++x
)
452 op
.src
.swizzle
[x
] = src_format_desc
->swizzle
[x
];
454 if (src_lev
->ts_size
&& src_lev
->ts_valid
) {
456 op
.src
.ts_addr
.bo
= src
->ts_bo
;
457 op
.src
.ts_addr
.offset
= src_lev
->ts_offset
+ blit_info
->src
.box
.z
* src_lev
->ts_layer_stride
;
458 op
.src
.ts_addr
.flags
= ETNA_RELOC_READ
;
459 op
.src
.ts_clear_value
[0] = src_lev
->clear_value
;
460 op
.src
.ts_clear_value
[1] = src_lev
->clear_value
;
461 op
.src
.ts_mode
= src_lev
->ts_mode
;
462 op
.src
.ts_compress_fmt
= src_lev
->ts_compress_fmt
;
465 op
.dest
.addr
.bo
= dst
->bo
;
466 op
.dest
.addr
.offset
= dst_lev
->offset
+ blit_info
->dst
.box
.z
* dst_lev
->layer_stride
;
467 op
.dest
.addr
.flags
= ETNA_RELOC_WRITE
;
468 op
.dest
.format
= translate_blt_format(dst_format
);
469 op
.dest
.stride
= dst_lev
->stride
;
470 op
.dest
.tiling
= dst
->layout
;
471 const struct util_format_description
*dst_format_desc
=
472 util_format_description(dst_format
);
473 for (unsigned x
=0; x
<4; ++x
)
474 op
.dest
.swizzle
[x
] = dst_format_desc
->swizzle
[x
];
476 op
.dest_x
= blit_info
->dst
.box
.x
;
477 op
.dest_y
= blit_info
->dst
.box
.y
;
478 op
.src_x
= blit_info
->src
.box
.x
;
479 op
.src_y
= blit_info
->src
.box
.y
;
480 op
.rect_w
= blit_info
->dst
.box
.width
;
481 op
.rect_h
= blit_info
->dst
.box
.height
;
483 if (blit_info
->src
.box
.height
< 0) { /* flipped? fix up base y */
485 op
.src_y
+= blit_info
->src
.box
.height
;
488 assert(op
.src_x
< src_lev
->padded_width
);
489 assert(op
.src_y
< src_lev
->padded_height
);
490 assert((op
.src_x
+ op
.rect_w
) <= src_lev
->padded_width
);
491 assert((op
.src_y
+ op
.rect_h
) <= src_lev
->padded_height
);
492 assert(op
.dest_x
< dst_lev
->padded_width
);
493 assert(op
.dest_y
< dst_lev
->padded_height
);
494 assert((op
.dest_x
+ op
.rect_w
) <= dst_lev
->padded_width
);
495 assert((op
.dest_y
+ op
.rect_h
) <= dst_lev
->padded_height
);
497 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000c23);
498 etna_set_state(ctx
->stream
, VIVS_TS_FLUSH_CACHE
, 0x00000001);
499 emit_blt_copyimage(ctx
->stream
, &op
);
502 /* Make FE wait for BLT, in case we want to do something with the image next.
503 * This probably shouldn't be here, and depend on what is done with the resource.
505 etna_stall(ctx
->stream
, SYNC_RECIPIENT_FE
, SYNC_RECIPIENT_BLT
);
506 etna_set_state(ctx
->stream
, VIVS_GL_FLUSH_CACHE
, 0x00000c23);
508 resource_read(ctx
, &src
->base
);
509 resource_written(ctx
, &dst
->base
);
512 dst_lev
->ts_valid
= false;
518 etna_blit_blt(struct pipe_context
*pctx
, const struct pipe_blit_info
*blit_info
)
520 struct etna_context
*ctx
= etna_context(pctx
);
521 struct pipe_blit_info info
= *blit_info
;
523 if (info
.src
.resource
->nr_samples
> 1 &&
524 info
.dst
.resource
->nr_samples
<= 1 &&
525 !util_format_is_depth_or_stencil(info
.src
.resource
->format
) &&
526 !util_format_is_pure_integer(info
.src
.resource
->format
)) {
527 DBG("color resolve unimplemented");
531 if (etna_try_blt_blit(pctx
, blit_info
))
534 if (util_try_blit_via_copy_region(pctx
, blit_info
))
537 if (info
.mask
& PIPE_MASK_S
) {
538 DBG("cannot blit stencil, skipping");
539 info
.mask
&= ~PIPE_MASK_S
;
542 if (!util_blitter_is_blit_supported(ctx
->blitter
, &info
)) {
543 DBG("blit unsupported %s -> %s",
544 util_format_short_name(info
.src
.resource
->format
),
545 util_format_short_name(info
.dst
.resource
->format
));
549 etna_blit_save_state(ctx
);
550 util_blitter_blit(ctx
->blitter
, &info
);
554 etna_clear_blit_blt_init(struct pipe_context
*pctx
)
556 DBG("etnaviv: Using BLT blit engine");
557 pctx
->clear
= etna_clear_blt
;
558 pctx
->blit
= etna_blit_blt
;