2 * Copyright (c) 2012-2015 Etnaviv Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Wladimir J. van der Laan <laanwj@gmail.com>
27 /* TGSI->Vivante shader ISA conversion */
29 /* What does the compiler return (see etna_shader_object)?
31 * 2) input-to-temporary mapping (fixed for ps)
32 * *) in case of ps, semantic -> varying id mapping
33 * *) for each varying: number of components used (r, rg, rgb, rgba)
34 * 3) temporary-to-output mapping (in case of vs, fixed for ps)
35 * 4) for each input/output: possible semantic (position, color, glpointcoord, ...)
36 * 5) immediates base offset, immediates data
37 * 6) used texture units (and possibly the TGSI_TEXTURE_* type); not needed to
38 * configure the hw, but useful for error checking
39 * 7) enough information to add the z=(z+w)/2.0 necessary for older chips
40 * (output reg id is enough)
42 * Empty shaders are not allowed, should always at least generate a NOP. Also
43 * if there is a label at the end of the shader, an extra NOP should be
44 * generated as jump target.
47 * * Use an instruction scheduler
48 * * Indirect access to uniforms / temporaries using amode
51 #include "etnaviv_compiler.h"
53 #include "etnaviv_asm.h"
54 #include "etnaviv_context.h"
55 #include "etnaviv_debug.h"
56 #include "etnaviv_disasm.h"
57 #include "etnaviv_uniforms.h"
58 #include "etnaviv_util.h"
60 #include "pipe/p_shader_tokens.h"
61 #include "tgsi/tgsi_info.h"
62 #include "tgsi/tgsi_iterate.h"
63 #include "tgsi/tgsi_lowering.h"
64 #include "tgsi/tgsi_strings.h"
65 #include "tgsi/tgsi_util.h"
66 #include "util/u_math.h"
67 #include "util/u_memory.h"
72 #include <sys/types.h>
74 #define ETNA_MAX_INNER_TEMPS 2
76 static const float sincos_const
[2][4] = {
81 1. / (2. * M_PI
), 0.75, 0.5, 0.0,
85 /* Native register description structure */
86 struct etna_native_reg
{
88 unsigned is_tex
: 1; /* is texture unit, overrides rgroup */
93 /* Register description */
94 struct etna_reg_desc
{
95 enum tgsi_file_type file
; /* IN, OUT, TEMP, ... */
96 int idx
; /* index into file */
97 bool active
; /* used in program */
98 int first_use
; /* instruction id of first use (scope begin) */
99 int last_use
; /* instruction id of last use (scope end, inclusive) */
101 struct etna_native_reg native
; /* native register to map to */
102 unsigned usage_mask
: 4; /* usage, per channel */
103 bool has_semantic
; /* register has associated TGSI semantic */
104 struct tgsi_declaration_semantic semantic
; /* TGSI semantic */
105 struct tgsi_declaration_interp interp
; /* Interpolation type */
108 /* Label information structure */
109 struct etna_compile_label
{
110 int inst_idx
; /* Instruction id that label points to */
113 enum etna_compile_frame_type
{
114 ETNA_COMPILE_FRAME_IF
, /* IF/ELSE/ENDIF */
115 ETNA_COMPILE_FRAME_LOOP
,
118 /* nesting scope frame (LOOP, IF, ...) during compilation
120 struct etna_compile_frame
{
121 enum etna_compile_frame_type type
;
122 struct etna_compile_label
*lbl_else
;
123 struct etna_compile_label
*lbl_endif
;
124 struct etna_compile_label
*lbl_loop_bgn
;
125 struct etna_compile_label
*lbl_loop_end
;
128 struct etna_compile_file
{
129 /* Number of registers in each TGSI file (max register+1) */
131 /* Register descriptions, per register index */
132 struct etna_reg_desc
*reg
;
135 #define array_insert(arr, val) \
137 if (arr##_count == arr##_sz) { \
138 arr##_sz = MAX2(2 * arr##_sz, 16); \
139 arr = realloc(arr, arr##_sz * sizeof(arr[0])); \
141 arr[arr##_count++] = val; \
145 /* scratch area for compiling shader, freed after compilation finishes */
146 struct etna_compile
{
147 const struct tgsi_token
*tokens
;
150 struct tgsi_shader_info info
;
152 /* Register descriptions, per TGSI file, per register index */
153 struct etna_compile_file file
[TGSI_FILE_COUNT
];
155 /* Keep track of TGSI register declarations */
156 struct etna_reg_desc decl
[ETNA_MAX_DECL
];
159 /* Bitmap of dead instructions which are removed in a separate pass */
160 bool dead_inst
[ETNA_MAX_TOKENS
];
163 enum etna_immediate_contents imm_contents
[ETNA_MAX_IMM
];
164 uint32_t imm_data
[ETNA_MAX_IMM
];
165 uint32_t imm_base
; /* base of immediates (in 32 bit units) */
166 uint32_t imm_size
; /* size of immediates (in 32 bit units) */
168 /* Next free native register, for register allocation */
169 uint32_t next_free_native
;
171 /* Temporary register for use within translated TGSI instruction,
172 * only allocated when needed.
174 int inner_temps
; /* number of inner temps used; only up to one available at
176 struct etna_native_reg inner_temp
[ETNA_MAX_INNER_TEMPS
];
178 /* Fields for handling nested conditionals */
179 struct etna_compile_frame frame_stack
[ETNA_MAX_DEPTH
];
181 struct etna_compile_label
*lbl_usage
[ETNA_MAX_INSTRUCTIONS
];
183 unsigned labels_count
, labels_sz
;
184 struct etna_compile_label
*labels
;
186 /* Code generation */
187 int inst_ptr
; /* current instruction pointer */
188 uint32_t code
[ETNA_MAX_INSTRUCTIONS
* ETNA_INST_SIZE
];
192 /* Number of varyings (PS only) */
195 /* GPU hardware specs */
196 const struct etna_specs
*specs
;
199 static struct etna_reg_desc
*
200 etna_get_dst_reg(struct etna_compile
*c
, struct tgsi_dst_register dst
)
202 return &c
->file
[dst
.File
].reg
[dst
.Index
];
205 static struct etna_reg_desc
*
206 etna_get_src_reg(struct etna_compile
*c
, struct tgsi_src_register src
)
208 return &c
->file
[src
.File
].reg
[src
.Index
];
211 static struct etna_native_reg
212 etna_native_temp(unsigned reg
)
214 return (struct etna_native_reg
) {
216 .rgroup
= INST_RGROUP_TEMP
,
221 /** Register allocation **/
222 enum reg_sort_order
{
229 /* Augmented register description for sorting */
231 struct etna_reg_desc
*ptr
;
236 sort_rec_compar(const struct sort_rec
*a
, const struct sort_rec
*b
)
247 /* create an index on a register set based on certain criteria. */
249 sort_registers(struct sort_rec
*sorted
, struct etna_compile_file
*file
,
250 enum reg_sort_order so
)
252 struct etna_reg_desc
*regs
= file
->reg
;
255 /* pre-populate keys from active registers */
256 for (int idx
= 0; idx
< file
->reg_size
; ++idx
) {
257 /* only interested in active registers now; will only assign inactive ones
258 * if no space in active ones */
259 if (regs
[idx
].active
) {
260 sorted
[ptr
].ptr
= ®s
[idx
];
264 sorted
[ptr
].key
= regs
[idx
].first_use
;
267 sorted
[ptr
].key
= regs
[idx
].last_use
;
270 sorted
[ptr
].key
= -regs
[idx
].first_use
;
273 sorted
[ptr
].key
= -regs
[idx
].last_use
;
280 /* sort index by key */
281 qsort(sorted
, ptr
, sizeof(struct sort_rec
),
282 (int (*)(const void *, const void *))sort_rec_compar
);
287 /* Allocate a new, unused, native temp register */
288 static struct etna_native_reg
289 alloc_new_native_reg(struct etna_compile
*c
)
291 assert(c
->next_free_native
< ETNA_MAX_TEMPS
);
292 return etna_native_temp(c
->next_free_native
++);
295 /* assign TEMPs to native registers */
297 assign_temporaries_to_native(struct etna_compile
*c
,
298 struct etna_compile_file
*file
)
300 struct etna_reg_desc
*temps
= file
->reg
;
302 for (int idx
= 0; idx
< file
->reg_size
; ++idx
)
303 temps
[idx
].native
= alloc_new_native_reg(c
);
306 /* assign inputs and outputs to temporaries
307 * Gallium assumes that the hardware has separate registers for taking input and
308 * output, however Vivante GPUs use temporaries both for passing in inputs and
309 * passing back outputs.
310 * Try to re-use temporary registers where possible. */
312 assign_inouts_to_temporaries(struct etna_compile
*c
, uint file
)
314 bool mode_inputs
= (file
== TGSI_FILE_INPUT
);
315 int inout_ptr
= 0, num_inouts
;
316 int temp_ptr
= 0, num_temps
;
317 struct sort_rec inout_order
[ETNA_MAX_TEMPS
];
318 struct sort_rec temps_order
[ETNA_MAX_TEMPS
];
319 num_inouts
= sort_registers(inout_order
, &c
->file
[file
],
320 mode_inputs
? LAST_USE_ASC
: FIRST_USE_ASC
);
321 num_temps
= sort_registers(temps_order
, &c
->file
[TGSI_FILE_TEMPORARY
],
322 mode_inputs
? FIRST_USE_ASC
: LAST_USE_ASC
);
324 while (inout_ptr
< num_inouts
&& temp_ptr
< num_temps
) {
325 struct etna_reg_desc
*inout
= inout_order
[inout_ptr
].ptr
;
326 struct etna_reg_desc
*temp
= temps_order
[temp_ptr
].ptr
;
328 if (!inout
->active
|| inout
->native
.valid
) { /* Skip if already a native register assigned */
333 /* last usage of this input is before or in same instruction of first use
335 if (mode_inputs
? (inout
->last_use
<= temp
->first_use
)
336 : (inout
->first_use
>= temp
->last_use
)) {
337 /* assign it and advance to next input */
338 inout
->native
= temp
->native
;
345 /* if we couldn't reuse current ones, allocate new temporaries */
346 for (inout_ptr
= 0; inout_ptr
< num_inouts
; ++inout_ptr
) {
347 struct etna_reg_desc
*inout
= inout_order
[inout_ptr
].ptr
;
349 if (inout
->active
&& !inout
->native
.valid
)
350 inout
->native
= alloc_new_native_reg(c
);
354 /* Allocate an immediate with a certain value and return the index. If
355 * there is already an immediate with that value, return that.
357 static struct etna_inst_src
358 alloc_imm(struct etna_compile
*c
, enum etna_immediate_contents contents
,
363 /* Could use a hash table to speed this up */
364 for (idx
= 0; idx
< c
->imm_size
; ++idx
) {
365 if (c
->imm_contents
[idx
] == contents
&& c
->imm_data
[idx
] == value
)
369 /* look if there is an unused slot */
370 if (idx
== c
->imm_size
) {
371 for (idx
= 0; idx
< c
->imm_size
; ++idx
) {
372 if (c
->imm_contents
[idx
] == ETNA_IMMEDIATE_UNUSED
)
377 /* allocate new immediate */
378 if (idx
== c
->imm_size
) {
379 assert(c
->imm_size
< ETNA_MAX_IMM
);
381 c
->imm_data
[idx
] = value
;
382 c
->imm_contents
[idx
] = contents
;
385 /* swizzle so that component with value is returned in all components */
387 struct etna_inst_src imm_src
= {
389 .rgroup
= INST_RGROUP_UNIFORM_0
,
391 .swiz
= INST_SWIZ_BROADCAST(idx
& 3)
397 static struct etna_inst_src
398 alloc_imm_u32(struct etna_compile
*c
, uint32_t value
)
400 return alloc_imm(c
, ETNA_IMMEDIATE_CONSTANT
, value
);
403 static struct etna_inst_src
404 alloc_imm_vec4u(struct etna_compile
*c
, enum etna_immediate_contents contents
,
405 const uint32_t *values
)
407 struct etna_inst_src imm_src
= { };
410 for (idx
= 0; idx
+ 3 < c
->imm_size
; idx
+= 4) {
411 /* What if we can use a uniform with a different swizzle? */
412 for (i
= 0; i
< 4; i
++)
413 if (c
->imm_contents
[idx
+ i
] != contents
|| c
->imm_data
[idx
+ i
] != values
[i
])
419 if (idx
+ 3 >= c
->imm_size
) {
420 idx
= align(c
->imm_size
, 4);
421 assert(idx
+ 4 <= ETNA_MAX_IMM
);
423 for (i
= 0; i
< 4; i
++) {
424 c
->imm_data
[idx
+ i
] = values
[i
];
425 c
->imm_contents
[idx
+ i
] = contents
;
428 c
->imm_size
= idx
+ 4;
431 assert((c
->imm_base
& 3) == 0);
434 imm_src
.rgroup
= INST_RGROUP_UNIFORM_0
;
435 imm_src
.reg
= idx
/ 4;
436 imm_src
.swiz
= INST_SWIZ_IDENTITY
;
442 get_imm_u32(struct etna_compile
*c
, const struct etna_inst_src
*imm
,
445 assert(imm
->use
== 1 && imm
->rgroup
== INST_RGROUP_UNIFORM_0
);
446 unsigned int idx
= imm
->reg
* 4 + ((imm
->swiz
>> (swiz_idx
* 2)) & 3);
448 return c
->imm_data
[idx
];
451 /* Allocate immediate with a certain float value. If there is already an
452 * immediate with that value, return that.
454 static struct etna_inst_src
455 alloc_imm_f32(struct etna_compile
*c
, float value
)
457 return alloc_imm_u32(c
, fui(value
));
460 static struct etna_inst_src
461 etna_imm_vec4f(struct etna_compile
*c
, const float *vec4
)
465 for (int i
= 0; i
< 4; i
++)
466 val
[i
] = fui(vec4
[i
]);
468 return alloc_imm_vec4u(c
, ETNA_IMMEDIATE_CONSTANT
, val
);
471 /* Pass -- check register file declarations and immediates */
473 etna_compile_parse_declarations(struct etna_compile
*c
)
475 struct tgsi_parse_context ctx
= { };
476 unsigned status
= TGSI_PARSE_OK
;
477 status
= tgsi_parse_init(&ctx
, c
->tokens
);
478 assert(status
== TGSI_PARSE_OK
);
480 while (!tgsi_parse_end_of_tokens(&ctx
)) {
481 tgsi_parse_token(&ctx
);
483 switch (ctx
.FullToken
.Token
.Type
) {
484 case TGSI_TOKEN_TYPE_IMMEDIATE
: {
485 /* immediates are handled differently from other files; they are
486 * not declared explicitly, and always add four components */
487 const struct tgsi_full_immediate
*imm
= &ctx
.FullToken
.FullImmediate
;
488 assert(c
->imm_size
<= (ETNA_MAX_IMM
- 4));
490 for (int i
= 0; i
< 4; ++i
) {
491 unsigned idx
= c
->imm_size
++;
493 c
->imm_data
[idx
] = imm
->u
[i
].Uint
;
494 c
->imm_contents
[idx
] = ETNA_IMMEDIATE_CONSTANT
;
501 tgsi_parse_free(&ctx
);
504 /* Allocate register declarations for the registers in all register files */
506 etna_allocate_decls(struct etna_compile
*c
)
510 for (int x
= 0; x
< TGSI_FILE_COUNT
; ++x
) {
511 c
->file
[x
].reg
= &c
->decl
[idx
];
512 c
->file
[x
].reg_size
= c
->info
.file_max
[x
] + 1;
514 for (int sub
= 0; sub
< c
->file
[x
].reg_size
; ++sub
) {
515 c
->decl
[idx
].file
= x
;
516 c
->decl
[idx
].idx
= sub
;
521 c
->total_decls
= idx
;
524 /* Pass -- check and record usage of temporaries, inputs, outputs */
526 etna_compile_pass_check_usage(struct etna_compile
*c
)
528 struct tgsi_parse_context ctx
= { };
529 unsigned status
= TGSI_PARSE_OK
;
530 status
= tgsi_parse_init(&ctx
, c
->tokens
);
531 assert(status
== TGSI_PARSE_OK
);
533 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
534 c
->decl
[idx
].active
= false;
535 c
->decl
[idx
].first_use
= c
->decl
[idx
].last_use
= -1;
539 while (!tgsi_parse_end_of_tokens(&ctx
)) {
540 tgsi_parse_token(&ctx
);
541 /* find out max register #s used
542 * For every register mark first and last instruction index where it's
543 * used this allows finding ranges where the temporary can be borrowed
544 * as input and/or output register
546 * XXX in the case of loops this needs special care, or even be completely
548 * the last usage of a register inside a loop means it can still be used
550 * iteration (execution is no longer * chronological). The register can
552 * declared "free" after the loop finishes.
554 * Same for inputs: the first usage of a register inside a loop doesn't
555 * mean that the register
556 * won't have been overwritten in previous iteration. The register can
557 * only be declared free before the loop
559 * The proper way would be to do full dominator / post-dominator analysis
560 * (especially with more complicated
561 * control flow such as direct branch instructions) but not for now...
563 switch (ctx
.FullToken
.Token
.Type
) {
564 case TGSI_TOKEN_TYPE_DECLARATION
: {
565 /* Declaration: fill in file details */
566 const struct tgsi_full_declaration
*decl
= &ctx
.FullToken
.FullDeclaration
;
567 struct etna_compile_file
*file
= &c
->file
[decl
->Declaration
.File
];
569 for (int idx
= decl
->Range
.First
; idx
<= decl
->Range
.Last
; ++idx
) {
570 file
->reg
[idx
].usage_mask
= 0; // we'll compute this ourselves
571 file
->reg
[idx
].has_semantic
= decl
->Declaration
.Semantic
;
572 file
->reg
[idx
].semantic
= decl
->Semantic
;
573 file
->reg
[idx
].interp
= decl
->Interp
;
576 case TGSI_TOKEN_TYPE_INSTRUCTION
: {
577 /* Instruction: iterate over operands of instruction */
578 const struct tgsi_full_instruction
*inst
= &ctx
.FullToken
.FullInstruction
;
580 /* iterate over destination registers */
581 for (int idx
= 0; idx
< inst
->Instruction
.NumDstRegs
; ++idx
) {
582 struct etna_reg_desc
*reg_desc
= &c
->file
[inst
->Dst
[idx
].Register
.File
].reg
[inst
->Dst
[idx
].Register
.Index
];
584 if (reg_desc
->first_use
== -1)
585 reg_desc
->first_use
= inst_idx
;
587 reg_desc
->last_use
= inst_idx
;
588 reg_desc
->active
= true;
591 /* iterate over source registers */
592 for (int idx
= 0; idx
< inst
->Instruction
.NumSrcRegs
; ++idx
) {
593 struct etna_reg_desc
*reg_desc
= &c
->file
[inst
->Src
[idx
].Register
.File
].reg
[inst
->Src
[idx
].Register
.Index
];
595 if (reg_desc
->first_use
== -1)
596 reg_desc
->first_use
= inst_idx
;
598 reg_desc
->last_use
= inst_idx
;
599 reg_desc
->active
= true;
600 /* accumulate usage mask for register, this is used to determine how
601 * many slots for varyings
602 * should be allocated */
603 reg_desc
->usage_mask
|= tgsi_util_get_inst_usage_mask(inst
, idx
);
612 tgsi_parse_free(&ctx
);
615 /* assign inputs that need to be assigned to specific registers */
617 assign_special_inputs(struct etna_compile
*c
)
619 if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
) {
620 /* never assign t0 as it is the position output, start assigning at t1 */
621 c
->next_free_native
= 1;
623 /* hardwire TGSI_SEMANTIC_POSITION (input and output) to t0 */
624 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
625 struct etna_reg_desc
*reg
= &c
->decl
[idx
];
627 if (reg
->active
&& reg
->semantic
.Name
== TGSI_SEMANTIC_POSITION
)
628 reg
->native
= etna_native_temp(0);
633 /* Check that a move instruction does not swizzle any of the components
637 etna_mov_check_no_swizzle(const struct tgsi_dst_register dst
,
638 const struct tgsi_src_register src
)
640 return (!(dst
.WriteMask
& TGSI_WRITEMASK_X
) || src
.SwizzleX
== TGSI_SWIZZLE_X
) &&
641 (!(dst
.WriteMask
& TGSI_WRITEMASK_Y
) || src
.SwizzleY
== TGSI_SWIZZLE_Y
) &&
642 (!(dst
.WriteMask
& TGSI_WRITEMASK_Z
) || src
.SwizzleZ
== TGSI_SWIZZLE_Z
) &&
643 (!(dst
.WriteMask
& TGSI_WRITEMASK_W
) || src
.SwizzleW
== TGSI_SWIZZLE_W
);
646 /* Pass -- optimize outputs
647 * Mesa tends to generate code like this at the end if their shaders
648 * MOV OUT[1], TEMP[2]
649 * MOV OUT[0], TEMP[0]
650 * MOV OUT[2], TEMP[1]
652 * a) there is only a single assignment to an output register and
653 * b) the temporary is not used after that
654 * Also recognize direct assignment of IN to OUT (passthrough)
657 etna_compile_pass_optimize_outputs(struct etna_compile
*c
)
659 struct tgsi_parse_context ctx
= { };
661 unsigned status
= TGSI_PARSE_OK
;
662 status
= tgsi_parse_init(&ctx
, c
->tokens
);
663 assert(status
== TGSI_PARSE_OK
);
665 while (!tgsi_parse_end_of_tokens(&ctx
)) {
666 tgsi_parse_token(&ctx
);
668 switch (ctx
.FullToken
.Token
.Type
) {
669 case TGSI_TOKEN_TYPE_INSTRUCTION
: {
670 const struct tgsi_full_instruction
*inst
= &ctx
.FullToken
.FullInstruction
;
672 /* iterate over operands */
673 switch (inst
->Instruction
.Opcode
) {
674 case TGSI_OPCODE_MOV
: {
675 /* We are only interested in eliminating MOVs which write to
676 * the shader outputs. Test for this early. */
677 if (inst
->Dst
[0].Register
.File
!= TGSI_FILE_OUTPUT
)
679 /* Elimination of a MOV must have no visible effect on the
680 * resulting shader: this means the MOV must not swizzle or
681 * saturate, and its source must not have the negate or
682 * absolute modifiers. */
683 if (!etna_mov_check_no_swizzle(inst
->Dst
[0].Register
, inst
->Src
[0].Register
) ||
684 inst
->Instruction
.Saturate
|| inst
->Src
[0].Register
.Negate
||
685 inst
->Src
[0].Register
.Absolute
)
688 uint out_idx
= inst
->Dst
[0].Register
.Index
;
689 uint in_idx
= inst
->Src
[0].Register
.Index
;
690 /* assignment of temporary to output --
691 * and the output doesn't yet have a native register assigned
692 * and the last use of the temporary is this instruction
693 * and the MOV does not do a swizzle
695 if (inst
->Src
[0].Register
.File
== TGSI_FILE_TEMPORARY
&&
696 !c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
.valid
&&
697 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].last_use
== inst_idx
) {
698 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
=
699 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].native
;
700 /* prevent temp from being re-used for the rest of the shader */
701 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].last_use
= ETNA_MAX_TOKENS
;
702 /* mark this MOV instruction as a no-op */
703 c
->dead_inst
[inst_idx
] = true;
705 /* direct assignment of input to output --
706 * and the input or output doesn't yet have a native register
708 * and the output is only used in this instruction,
709 * allocate a new register, and associate both input and output to
711 * and the MOV does not do a swizzle
713 if (inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
&&
714 !c
->file
[TGSI_FILE_INPUT
].reg
[in_idx
].native
.valid
&&
715 !c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
.valid
&&
716 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].last_use
== inst_idx
&&
717 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].first_use
== inst_idx
) {
718 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
=
719 c
->file
[TGSI_FILE_INPUT
].reg
[in_idx
].native
=
720 alloc_new_native_reg(c
);
721 /* mark this MOV instruction as a no-op */
722 c
->dead_inst
[inst_idx
] = true;
732 tgsi_parse_free(&ctx
);
735 /* Get a temporary to be used within one TGSI instruction.
736 * The first time that this function is called the temporary will be allocated.
737 * Each call to this function will return the same temporary.
739 static struct etna_native_reg
740 etna_compile_get_inner_temp(struct etna_compile
*c
)
742 int inner_temp
= c
->inner_temps
;
744 if (inner_temp
< ETNA_MAX_INNER_TEMPS
) {
745 if (!c
->inner_temp
[inner_temp
].valid
)
746 c
->inner_temp
[inner_temp
] = alloc_new_native_reg(c
);
748 /* alloc_new_native_reg() handles lack of registers */
751 BUG("Too many inner temporaries (%i) requested in one instruction",
755 return c
->inner_temp
[inner_temp
];
758 static struct etna_inst_dst
759 etna_native_to_dst(struct etna_native_reg native
, unsigned comps
)
761 /* Can only assign to temporaries */
762 assert(native
.valid
&& !native
.is_tex
&& native
.rgroup
== INST_RGROUP_TEMP
);
764 struct etna_inst_dst rv
= {
773 static struct etna_inst_src
774 etna_native_to_src(struct etna_native_reg native
, uint32_t swizzle
)
776 assert(native
.valid
&& !native
.is_tex
);
778 struct etna_inst_src rv
= {
781 .rgroup
= native
.rgroup
,
783 .amode
= INST_AMODE_DIRECT
,
789 static inline struct etna_inst_src
790 negate(struct etna_inst_src src
)
797 static inline struct etna_inst_src
798 absolute(struct etna_inst_src src
)
805 static inline struct etna_inst_src
806 swizzle(struct etna_inst_src src
, unsigned swizzle
)
808 src
.swiz
= inst_swiz_compose(src
.swiz
, swizzle
);
813 /* Emit instruction and append it to program */
815 emit_inst(struct etna_compile
*c
, struct etna_inst
*inst
)
817 assert(c
->inst_ptr
<= ETNA_MAX_INSTRUCTIONS
);
819 /* Check for uniform conflicts (each instruction can only access one
821 * if detected, use an intermediate temporary */
822 unsigned uni_rgroup
= -1;
823 unsigned uni_reg
= -1;
825 for (int src
= 0; src
< ETNA_NUM_SRC
; ++src
) {
826 if (etna_rgroup_is_uniform(inst
->src
[src
].rgroup
)) {
827 if (uni_reg
== -1) { /* first unique uniform used */
828 uni_rgroup
= inst
->src
[src
].rgroup
;
829 uni_reg
= inst
->src
[src
].reg
;
830 } else { /* second or later; check that it is a re-use */
831 if (uni_rgroup
!= inst
->src
[src
].rgroup
||
832 uni_reg
!= inst
->src
[src
].reg
) {
833 DBG_F(ETNA_DBG_COMPILER_MSGS
, "perf warning: instruction that "
834 "accesses different uniforms, "
835 "need to generate extra MOV");
836 struct etna_native_reg inner_temp
= etna_compile_get_inner_temp(c
);
838 /* Generate move instruction to temporary */
839 etna_assemble(&c
->code
[c
->inst_ptr
* 4], &(struct etna_inst
) {
840 .opcode
= INST_OPCODE_MOV
,
841 .dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
| INST_COMPS_Y
|
842 INST_COMPS_Z
| INST_COMPS_W
),
843 .src
[2] = inst
->src
[src
]
848 /* Modify instruction to use temp register instead of uniform */
849 inst
->src
[src
].use
= 1;
850 inst
->src
[src
].rgroup
= INST_RGROUP_TEMP
;
851 inst
->src
[src
].reg
= inner_temp
.id
;
852 inst
->src
[src
].swiz
= INST_SWIZ_IDENTITY
; /* swizzling happens on MOV */
853 inst
->src
[src
].neg
= 0; /* negation happens on MOV */
854 inst
->src
[src
].abs
= 0; /* abs happens on MOV */
855 inst
->src
[src
].amode
= 0; /* amode effects happen on MOV */
861 /* Finally assemble the actual instruction */
862 etna_assemble(&c
->code
[c
->inst_ptr
* 4], inst
);
867 etna_amode(struct tgsi_ind_register indirect
)
869 assert(indirect
.File
== TGSI_FILE_ADDRESS
);
870 assert(indirect
.Index
== 0);
872 switch (indirect
.Swizzle
) {
874 return INST_AMODE_ADD_A_X
;
876 return INST_AMODE_ADD_A_Y
;
878 return INST_AMODE_ADD_A_Z
;
880 return INST_AMODE_ADD_A_W
;
882 assert(!"Invalid swizzle");
886 /* convert destination operand */
887 static struct etna_inst_dst
888 convert_dst(struct etna_compile
*c
, const struct tgsi_full_dst_register
*in
)
890 struct etna_inst_dst rv
= {
892 .comps
= in
->Register
.WriteMask
,
895 if (in
->Register
.File
== TGSI_FILE_ADDRESS
) {
896 assert(in
->Register
.Index
== 0);
897 rv
.reg
= in
->Register
.Index
;
900 rv
= etna_native_to_dst(etna_get_dst_reg(c
, in
->Register
)->native
,
901 in
->Register
.WriteMask
);
904 if (in
->Register
.Indirect
)
905 rv
.amode
= etna_amode(in
->Indirect
);
910 /* convert texture operand */
911 static struct etna_inst_tex
912 convert_tex(struct etna_compile
*c
, const struct tgsi_full_src_register
*in
,
913 const struct tgsi_instruction_texture
*tex
)
915 struct etna_native_reg native_reg
= etna_get_src_reg(c
, in
->Register
)->native
;
916 struct etna_inst_tex rv
= {
917 // XXX .amode (to allow for an array of samplers?)
918 .swiz
= INST_SWIZ_IDENTITY
921 assert(native_reg
.is_tex
&& native_reg
.valid
);
922 rv
.id
= native_reg
.id
;
927 /* convert source operand */
928 static struct etna_inst_src
929 etna_create_src(const struct tgsi_full_src_register
*tgsi
,
930 const struct etna_native_reg
*native
)
932 const struct tgsi_src_register
*reg
= &tgsi
->Register
;
933 struct etna_inst_src rv
= {
935 .swiz
= INST_SWIZ(reg
->SwizzleX
, reg
->SwizzleY
, reg
->SwizzleZ
, reg
->SwizzleW
),
937 .abs
= reg
->Absolute
,
938 .rgroup
= native
->rgroup
,
940 .amode
= INST_AMODE_DIRECT
,
943 assert(native
->valid
&& !native
->is_tex
);
946 rv
.amode
= etna_amode(tgsi
->Indirect
);
951 static struct etna_inst_src
952 etna_mov_src_to_temp(struct etna_compile
*c
, struct etna_inst_src src
,
953 struct etna_native_reg temp
)
955 struct etna_inst mov
= { };
957 mov
.opcode
= INST_OPCODE_MOV
;
959 mov
.dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
960 INST_COMPS_Z
| INST_COMPS_W
);
964 src
.swiz
= INST_SWIZ_IDENTITY
;
965 src
.neg
= src
.abs
= 0;
966 src
.rgroup
= temp
.rgroup
;
972 static struct etna_inst_src
973 etna_mov_src(struct etna_compile
*c
, struct etna_inst_src src
)
975 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
977 return etna_mov_src_to_temp(c
, src
, temp
);
981 etna_src_uniforms_conflict(struct etna_inst_src a
, struct etna_inst_src b
)
983 return etna_rgroup_is_uniform(a
.rgroup
) &&
984 etna_rgroup_is_uniform(b
.rgroup
) &&
985 (a
.rgroup
!= b
.rgroup
|| a
.reg
!= b
.reg
);
988 /* create a new label */
989 static struct etna_compile_label
*
990 alloc_new_label(struct etna_compile
*c
)
992 struct etna_compile_label label
= {
993 .inst_idx
= -1, /* start by point to no specific instruction */
996 array_insert(c
->labels
, label
);
998 return &c
->labels
[c
->labels_count
- 1];
1001 /* place label at current instruction pointer */
1003 label_place(struct etna_compile
*c
, struct etna_compile_label
*label
)
1005 label
->inst_idx
= c
->inst_ptr
;
1008 /* mark label use at current instruction.
1009 * target of the label will be filled in in the marked instruction's src2.imm
1011 * as the value becomes known.
1014 label_mark_use(struct etna_compile
*c
, struct etna_compile_label
*label
)
1016 assert(c
->inst_ptr
< ETNA_MAX_INSTRUCTIONS
);
1017 c
->lbl_usage
[c
->inst_ptr
] = label
;
1020 /* walk the frame stack and return first frame with matching type */
1021 static struct etna_compile_frame
*
1022 find_frame(struct etna_compile
*c
, enum etna_compile_frame_type type
)
1024 for (unsigned sp
= c
->frame_sp
; sp
>= 0; sp
--)
1025 if (c
->frame_stack
[sp
].type
== type
)
1026 return &c
->frame_stack
[sp
];
1032 struct instr_translater
{
1033 void (*fxn
)(const struct instr_translater
*t
, struct etna_compile
*c
,
1034 const struct tgsi_full_instruction
*inst
,
1035 struct etna_inst_src
*src
);
1039 /* tgsi src -> etna src swizzle */
1046 trans_instr(const struct instr_translater
*t
, struct etna_compile
*c
,
1047 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1049 const struct tgsi_opcode_info
*info
= tgsi_get_opcode_info(inst
->Instruction
.Opcode
);
1050 struct etna_inst instr
= { };
1052 instr
.opcode
= t
->opc
;
1053 instr
.cond
= t
->cond
;
1054 instr
.sat
= inst
->Instruction
.Saturate
;
1056 assert(info
->num_dst
<= 1);
1058 instr
.dst
= convert_dst(c
, &inst
->Dst
[0]);
1060 assert(info
->num_src
<= ETNA_NUM_SRC
);
1062 for (unsigned i
= 0; i
< info
->num_src
; i
++) {
1063 int swizzle
= t
->src
[i
];
1065 assert(swizzle
!= -1);
1066 instr
.src
[swizzle
] = src
[i
];
1069 emit_inst(c
, &instr
);
1073 trans_min_max(const struct instr_translater
*t
, struct etna_compile
*c
,
1074 const struct tgsi_full_instruction
*inst
,
1075 struct etna_inst_src
*src
)
1077 emit_inst(c
, &(struct etna_inst
) {
1078 .opcode
= INST_OPCODE_SELECT
,
1080 .sat
= inst
->Instruction
.Saturate
,
1081 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1089 trans_if(const struct instr_translater
*t
, struct etna_compile
*c
,
1090 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1092 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
++];
1093 struct etna_inst_src imm_0
= alloc_imm_f32(c
, 0.0f
);
1095 /* push IF to stack */
1096 f
->type
= ETNA_COMPILE_FRAME_IF
;
1097 /* create "else" label */
1098 f
->lbl_else
= alloc_new_label(c
);
1099 f
->lbl_endif
= NULL
;
1101 /* We need to avoid the emit_inst() below becoming two instructions */
1102 if (etna_src_uniforms_conflict(src
[0], imm_0
))
1103 src
[0] = etna_mov_src(c
, src
[0]);
1105 /* mark position in instruction stream of label reference so that it can be
1106 * filled in in next pass */
1107 label_mark_use(c
, f
->lbl_else
);
1109 /* create conditional branch to label if src0 EQ 0 */
1110 emit_inst(c
, &(struct etna_inst
){
1111 .opcode
= INST_OPCODE_BRANCH
,
1112 .cond
= INST_CONDITION_EQ
,
1115 /* imm is filled in later */
1120 trans_else(const struct instr_translater
*t
, struct etna_compile
*c
,
1121 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1123 assert(c
->frame_sp
> 0);
1124 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
- 1];
1125 assert(f
->type
== ETNA_COMPILE_FRAME_IF
);
1127 /* create "endif" label, and branch to endif label */
1128 f
->lbl_endif
= alloc_new_label(c
);
1129 label_mark_use(c
, f
->lbl_endif
);
1130 emit_inst(c
, &(struct etna_inst
) {
1131 .opcode
= INST_OPCODE_BRANCH
,
1132 .cond
= INST_CONDITION_TRUE
,
1133 /* imm is filled in later */
1136 /* mark "else" label at this position in instruction stream */
1137 label_place(c
, f
->lbl_else
);
1141 trans_endif(const struct instr_translater
*t
, struct etna_compile
*c
,
1142 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1144 assert(c
->frame_sp
> 0);
1145 struct etna_compile_frame
*f
= &c
->frame_stack
[--c
->frame_sp
];
1146 assert(f
->type
== ETNA_COMPILE_FRAME_IF
);
1148 /* assign "endif" or "else" (if no ELSE) label to current position in
1149 * instruction stream, pop IF */
1150 if (f
->lbl_endif
!= NULL
)
1151 label_place(c
, f
->lbl_endif
);
1153 label_place(c
, f
->lbl_else
);
1157 trans_loop_bgn(const struct instr_translater
*t
, struct etna_compile
*c
,
1158 const struct tgsi_full_instruction
*inst
,
1159 struct etna_inst_src
*src
)
1161 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
++];
1163 /* push LOOP to stack */
1164 f
->type
= ETNA_COMPILE_FRAME_LOOP
;
1165 f
->lbl_loop_bgn
= alloc_new_label(c
);
1166 f
->lbl_loop_end
= alloc_new_label(c
);
1168 label_place(c
, f
->lbl_loop_bgn
);
1172 trans_loop_end(const struct instr_translater
*t
, struct etna_compile
*c
,
1173 const struct tgsi_full_instruction
*inst
,
1174 struct etna_inst_src
*src
)
1176 assert(c
->frame_sp
> 0);
1177 struct etna_compile_frame
*f
= &c
->frame_stack
[--c
->frame_sp
];
1178 assert(f
->type
== ETNA_COMPILE_FRAME_LOOP
);
1180 /* mark position in instruction stream of label reference so that it can be
1181 * filled in in next pass */
1182 label_mark_use(c
, f
->lbl_loop_bgn
);
1184 /* create branch to loop_bgn label */
1185 emit_inst(c
, &(struct etna_inst
) {
1186 .opcode
= INST_OPCODE_BRANCH
,
1187 .cond
= INST_CONDITION_TRUE
,
1189 /* imm is filled in later */
1192 label_place(c
, f
->lbl_loop_end
);
1196 trans_brk(const struct instr_translater
*t
, struct etna_compile
*c
,
1197 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1199 assert(c
->frame_sp
> 0);
1200 struct etna_compile_frame
*f
= find_frame(c
, ETNA_COMPILE_FRAME_LOOP
);
1202 /* mark position in instruction stream of label reference so that it can be
1203 * filled in in next pass */
1204 label_mark_use(c
, f
->lbl_loop_end
);
1206 /* create branch to loop_end label */
1207 emit_inst(c
, &(struct etna_inst
) {
1208 .opcode
= INST_OPCODE_BRANCH
,
1209 .cond
= INST_CONDITION_TRUE
,
1211 /* imm is filled in later */
1216 trans_cont(const struct instr_translater
*t
, struct etna_compile
*c
,
1217 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1219 assert(c
->frame_sp
> 0);
1220 struct etna_compile_frame
*f
= find_frame(c
, ETNA_COMPILE_FRAME_LOOP
);
1222 /* mark position in instruction stream of label reference so that it can be
1223 * filled in in next pass */
1224 label_mark_use(c
, f
->lbl_loop_bgn
);
1226 /* create branch to loop_end label */
1227 emit_inst(c
, &(struct etna_inst
) {
1228 .opcode
= INST_OPCODE_BRANCH
,
1229 .cond
= INST_CONDITION_TRUE
,
1231 /* imm is filled in later */
1236 trans_deriv(const struct instr_translater
*t
, struct etna_compile
*c
,
1237 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1239 emit_inst(c
, &(struct etna_inst
) {
1241 .sat
= inst
->Instruction
.Saturate
,
1242 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1249 trans_arl(const struct instr_translater
*t
, struct etna_compile
*c
,
1250 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1252 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1253 struct etna_inst arl
= { };
1254 struct etna_inst_dst dst
;
1256 dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
| INST_COMPS_Z
|
1259 if (c
->specs
->has_sign_floor_ceil
) {
1260 struct etna_inst floor
= { };
1262 floor
.opcode
= INST_OPCODE_FLOOR
;
1263 floor
.src
[2] = src
[0];
1266 emit_inst(c
, &floor
);
1268 struct etna_inst floor
[2] = { };
1270 floor
[0].opcode
= INST_OPCODE_FRC
;
1271 floor
[0].sat
= inst
->Instruction
.Saturate
;
1273 floor
[0].src
[2] = src
[0];
1275 floor
[1].opcode
= INST_OPCODE_ADD
;
1276 floor
[1].sat
= inst
->Instruction
.Saturate
;
1278 floor
[1].src
[0] = src
[0];
1279 floor
[1].src
[2].use
= 1;
1280 floor
[1].src
[2].swiz
= INST_SWIZ_IDENTITY
;
1281 floor
[1].src
[2].neg
= 1;
1282 floor
[1].src
[2].rgroup
= temp
.rgroup
;
1283 floor
[1].src
[2].reg
= temp
.id
;
1285 emit_inst(c
, &floor
[0]);
1286 emit_inst(c
, &floor
[1]);
1289 arl
.opcode
= INST_OPCODE_MOVAR
;
1290 arl
.sat
= inst
->Instruction
.Saturate
;
1291 arl
.dst
= convert_dst(c
, &inst
->Dst
[0]);
1292 arl
.src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1298 trans_lrp(const struct instr_translater
*t
, struct etna_compile
*c
,
1299 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1301 /* dst = src0 * src1 + (1 - src0) * src2
1302 * => src0 * src1 - (src0 - 1) * src2
1303 * => src0 * src1 - (src0 * src2 - src2)
1304 * MAD tTEMP.xyzw, tSRC0.xyzw, tSRC2.xyzw, -tSRC2.xyzw
1305 * MAD tDST.xyzw, tSRC0.xyzw, tSRC1.xyzw, -tTEMP.xyzw
1307 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1308 if (etna_src_uniforms_conflict(src
[0], src
[1]) ||
1309 etna_src_uniforms_conflict(src
[0], src
[2])) {
1310 src
[0] = etna_mov_src(c
, src
[0]);
1313 struct etna_inst mad
[2] = { };
1314 mad
[0].opcode
= INST_OPCODE_MAD
;
1316 mad
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1317 INST_COMPS_Z
| INST_COMPS_W
);
1318 mad
[0].src
[0] = src
[0];
1319 mad
[0].src
[1] = src
[2];
1320 mad
[0].src
[2] = negate(src
[2]);
1321 mad
[1].opcode
= INST_OPCODE_MAD
;
1322 mad
[1].sat
= inst
->Instruction
.Saturate
;
1323 mad
[1].dst
= convert_dst(c
, &inst
->Dst
[0]), mad
[1].src
[0] = src
[0];
1324 mad
[1].src
[1] = src
[1];
1325 mad
[1].src
[2] = negate(etna_native_to_src(temp
, INST_SWIZ_IDENTITY
));
1327 emit_inst(c
, &mad
[0]);
1328 emit_inst(c
, &mad
[1]);
1332 trans_lit(const struct instr_translater
*t
, struct etna_compile
*c
,
1333 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1335 /* SELECT.LT tmp._y__, 0, src.yyyy, 0
1336 * - can be eliminated if src.y is a uniform and >= 0
1337 * SELECT.GT tmp.___w, 128, src.wwww, 128
1338 * SELECT.LT tmp.___w, -128, tmp.wwww, -128
1339 * - can be eliminated if src.w is a uniform and fits clamp
1340 * LOG tmp.x, void, void, tmp.yyyy
1341 * MUL tmp.x, tmp.xxxx, tmp.wwww, void
1342 * LITP dst, undef, src.xxxx, tmp.xxxx
1344 struct etna_native_reg inner_temp
= etna_compile_get_inner_temp(c
);
1345 struct etna_inst_src src_y
= { };
1347 if (!etna_rgroup_is_uniform(src
[0].rgroup
)) {
1348 src_y
= etna_native_to_src(inner_temp
, SWIZZLE(Y
, Y
, Y
, Y
));
1350 struct etna_inst ins
= { };
1351 ins
.opcode
= INST_OPCODE_SELECT
;
1352 ins
.cond
= INST_CONDITION_LT
;
1353 ins
.dst
= etna_native_to_dst(inner_temp
, INST_COMPS_Y
);
1354 ins
.src
[0] = ins
.src
[2] = alloc_imm_f32(c
, 0.0);
1355 ins
.src
[1] = swizzle(src
[0], SWIZZLE(Y
, Y
, Y
, Y
));
1357 } else if (uif(get_imm_u32(c
, &src
[0], 1)) < 0)
1358 src_y
= alloc_imm_f32(c
, 0.0);
1360 src_y
= swizzle(src
[0], SWIZZLE(Y
, Y
, Y
, Y
));
1362 struct etna_inst_src src_w
= { };
1364 if (!etna_rgroup_is_uniform(src
[0].rgroup
)) {
1365 src_w
= etna_native_to_src(inner_temp
, SWIZZLE(W
, W
, W
, W
));
1367 struct etna_inst ins
= { };
1368 ins
.opcode
= INST_OPCODE_SELECT
;
1369 ins
.cond
= INST_CONDITION_GT
;
1370 ins
.dst
= etna_native_to_dst(inner_temp
, INST_COMPS_W
);
1371 ins
.src
[0] = ins
.src
[2] = alloc_imm_f32(c
, 128.);
1372 ins
.src
[1] = swizzle(src
[0], SWIZZLE(W
, W
, W
, W
));
1374 ins
.cond
= INST_CONDITION_LT
;
1375 ins
.src
[0].neg
= !ins
.src
[0].neg
;
1376 ins
.src
[2].neg
= !ins
.src
[2].neg
;
1379 } else if (uif(get_imm_u32(c
, &src
[0], 3)) < -128.)
1380 src_w
= alloc_imm_f32(c
, -128.);
1381 else if (uif(get_imm_u32(c
, &src
[0], 3)) > 128.)
1382 src_w
= alloc_imm_f32(c
, 128.);
1384 src_w
= swizzle(src
[0], SWIZZLE(W
, W
, W
, W
));
1386 struct etna_inst ins
[3] = { };
1387 ins
[0].opcode
= INST_OPCODE_LOG
;
1388 ins
[0].dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
);
1389 ins
[0].src
[2] = src_y
;
1391 emit_inst(c
, &ins
[0]);
1392 emit_inst(c
, &(struct etna_inst
) {
1393 .opcode
= INST_OPCODE_MUL
,
1395 .dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
),
1396 .src
[0] = etna_native_to_src(inner_temp
, SWIZZLE(X
, X
, X
, X
)),
1399 emit_inst(c
, &(struct etna_inst
) {
1400 .opcode
= INST_OPCODE_LITP
,
1402 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1403 .src
[0] = swizzle(src
[0], SWIZZLE(X
, X
, X
, X
)),
1404 .src
[1] = swizzle(src
[0], SWIZZLE(X
, X
, X
, X
)),
1405 .src
[2] = etna_native_to_src(inner_temp
, SWIZZLE(X
, X
, X
, X
)),
1410 trans_ssg(const struct instr_translater
*t
, struct etna_compile
*c
,
1411 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1413 if (c
->specs
->has_sign_floor_ceil
) {
1414 emit_inst(c
, &(struct etna_inst
){
1415 .opcode
= INST_OPCODE_SIGN
,
1416 .sat
= inst
->Instruction
.Saturate
,
1417 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1421 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1422 struct etna_inst ins
[2] = { };
1424 ins
[0].opcode
= INST_OPCODE_SET
;
1425 ins
[0].cond
= INST_CONDITION_NZ
;
1426 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1427 INST_COMPS_Z
| INST_COMPS_W
);
1428 ins
[0].src
[0] = src
[0];
1430 ins
[1].opcode
= INST_OPCODE_SELECT
;
1431 ins
[1].cond
= INST_CONDITION_LZ
;
1432 ins
[1].sat
= inst
->Instruction
.Saturate
;
1433 ins
[1].dst
= convert_dst(c
, &inst
->Dst
[0]);
1434 ins
[1].src
[0] = src
[0];
1435 ins
[1].src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1436 ins
[1].src
[1] = negate(ins
[1].src
[2]);
1438 emit_inst(c
, &ins
[0]);
1439 emit_inst(c
, &ins
[1]);
1444 trans_trig(const struct instr_translater
*t
, struct etna_compile
*c
,
1445 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1447 if (c
->specs
->has_sin_cos_sqrt
) {
1448 /* TGSI lowering should deal with SCS */
1449 assert(inst
->Instruction
.Opcode
!= TGSI_OPCODE_SCS
);
1451 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1452 /* add divide by PI/2, using a temp register. GC2000
1453 * fails with src==dst for the trig instruction. */
1454 emit_inst(c
, &(struct etna_inst
) {
1455 .opcode
= INST_OPCODE_MUL
,
1457 .dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1458 INST_COMPS_Z
| INST_COMPS_W
),
1459 .src
[0] = src
[0], /* any swizzling happens here */
1460 .src
[1] = alloc_imm_f32(c
, 2.0f
/ M_PI
),
1462 emit_inst(c
, &(struct etna_inst
) {
1463 .opcode
= inst
->Instruction
.Opcode
== TGSI_OPCODE_COS
1466 .sat
= inst
->Instruction
.Saturate
,
1467 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1468 .src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
),
1471 /* Implement Nick's fast sine/cosine. Taken from:
1472 * http://forum.devmaster.net/t/fast-and-accurate-sine-cosine/9648
1473 * A=(1/2*PI 0 1/2*PI 0) B=(0.75 0 0.5 0) C=(-4 4 X X)
1474 * MAD t.x_zw, src.xxxx, A, B
1475 * FRC t.x_z_, void, void, t.xwzw
1476 * MAD t.x_z_, t.xwzw, 2, -1
1477 * MUL t._y__, t.wzww, |t.wzww|, void (for sin/scs)
1478 * DP3 t.x_z_, t.zyww, C, void (for sin)
1479 * DP3 t.__z_, t.zyww, C, void (for scs)
1480 * MUL t._y__, t.wxww, |t.wxww|, void (for cos/scs)
1481 * DP3 t.x_z_, t.xyww, C, void (for cos)
1482 * DP3 t.x___, t.xyww, C, void (for scs)
1483 * MAD t._y_w, t,xxzz, |t.xxzz|, -t.xxzz
1484 * MAD dst, t.ywyw, .2225, t.xzxz
1486 * TODO: we don't set dst.zw correctly for SCS.
1488 struct etna_inst
*p
, ins
[9] = { };
1489 struct etna_native_reg t0
= etna_compile_get_inner_temp(c
);
1490 struct etna_inst_src t0s
= etna_native_to_src(t0
, INST_SWIZ_IDENTITY
);
1491 struct etna_inst_src sincos
[3], in
= src
[0];
1492 sincos
[0] = etna_imm_vec4f(c
, sincos_const
[0]);
1493 sincos
[1] = etna_imm_vec4f(c
, sincos_const
[1]);
1495 /* A uniform source will cause the inner temp limit to
1496 * be exceeded. Explicitly deal with that scenario.
1498 if (etna_rgroup_is_uniform(src
[0].rgroup
)) {
1499 struct etna_inst ins
= { };
1500 ins
.opcode
= INST_OPCODE_MOV
;
1501 ins
.dst
= etna_native_to_dst(t0
, INST_COMPS_X
);
1507 ins
[0].opcode
= INST_OPCODE_MAD
;
1508 ins
[0].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
| INST_COMPS_W
);
1509 ins
[0].src
[0] = swizzle(in
, SWIZZLE(X
, X
, X
, X
));
1510 ins
[0].src
[1] = swizzle(sincos
[1], SWIZZLE(X
, W
, X
, W
)); /* 1/2*PI */
1511 ins
[0].src
[2] = swizzle(sincos
[1], SWIZZLE(Y
, W
, Z
, W
)); /* 0.75, 0, 0.5, 0 */
1513 ins
[1].opcode
= INST_OPCODE_FRC
;
1514 ins
[1].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1515 ins
[1].src
[2] = swizzle(t0s
, SWIZZLE(X
, W
, Z
, W
));
1517 ins
[2].opcode
= INST_OPCODE_MAD
;
1518 ins
[2].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1519 ins
[2].src
[0] = swizzle(t0s
, SWIZZLE(X
, W
, Z
, W
));
1520 ins
[2].src
[1] = swizzle(sincos
[0], SWIZZLE(X
, X
, X
, X
)); /* 2 */
1521 ins
[2].src
[2] = swizzle(sincos
[0], SWIZZLE(Y
, Y
, Y
, Y
)); /* -1 */
1523 unsigned mul_swiz
, dp3_swiz
;
1524 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SIN
) {
1525 mul_swiz
= SWIZZLE(W
, Z
, W
, W
);
1526 dp3_swiz
= SWIZZLE(Z
, Y
, W
, W
);
1528 mul_swiz
= SWIZZLE(W
, X
, W
, W
);
1529 dp3_swiz
= SWIZZLE(X
, Y
, W
, W
);
1532 ins
[3].opcode
= INST_OPCODE_MUL
;
1533 ins
[3].dst
= etna_native_to_dst(t0
, INST_COMPS_Y
);
1534 ins
[3].src
[0] = swizzle(t0s
, mul_swiz
);
1535 ins
[3].src
[1] = absolute(ins
[3].src
[0]);
1537 ins
[4].opcode
= INST_OPCODE_DP3
;
1538 ins
[4].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1539 ins
[4].src
[0] = swizzle(t0s
, dp3_swiz
);
1540 ins
[4].src
[1] = swizzle(sincos
[0], SWIZZLE(Z
, W
, W
, W
));
1542 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SCS
) {
1545 ins
[4].dst
.comps
= INST_COMPS_X
;
1546 ins
[6].dst
.comps
= INST_COMPS_Z
;
1547 ins
[5].src
[0] = swizzle(t0s
, SWIZZLE(W
, Z
, W
, W
));
1548 ins
[6].src
[0] = swizzle(t0s
, SWIZZLE(Z
, Y
, W
, W
));
1549 ins
[5].src
[1] = absolute(ins
[5].src
[0]);
1555 p
->opcode
= INST_OPCODE_MAD
;
1556 p
->dst
= etna_native_to_dst(t0
, INST_COMPS_Y
| INST_COMPS_W
);
1557 p
->src
[0] = swizzle(t0s
, SWIZZLE(X
, X
, Z
, Z
));
1558 p
->src
[1] = absolute(p
->src
[0]);
1559 p
->src
[2] = negate(p
->src
[0]);
1562 p
->opcode
= INST_OPCODE_MAD
;
1563 p
->sat
= inst
->Instruction
.Saturate
;
1564 p
->dst
= convert_dst(c
, &inst
->Dst
[0]),
1565 p
->src
[0] = swizzle(t0s
, SWIZZLE(Y
, W
, Y
, W
));
1566 p
->src
[1] = alloc_imm_f32(c
, 0.2225);
1567 p
->src
[2] = swizzle(t0s
, SWIZZLE(X
, Z
, X
, Z
));
1569 for (int i
= 0; &ins
[i
] <= p
; i
++)
1570 emit_inst(c
, &ins
[i
]);
1575 trans_dph(const struct instr_translater
*t
, struct etna_compile
*c
,
1576 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1579 DP3 tmp.xyzw, src0.xyzw, src1,xyzw, void
1580 ADD dst.xyzw, tmp.xyzw, void, src1.wwww
1582 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1583 struct etna_inst ins
[2] = { };
1585 ins
[0].opcode
= INST_OPCODE_DP3
;
1586 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1587 INST_COMPS_Z
| INST_COMPS_W
);
1588 ins
[0].src
[0] = src
[0];
1589 ins
[0].src
[1] = src
[1];
1591 ins
[1].opcode
= INST_OPCODE_ADD
;
1592 ins
[1].sat
= inst
->Instruction
.Saturate
;
1593 ins
[1].dst
= convert_dst(c
, &inst
->Dst
[0]);
1594 ins
[1].src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1595 ins
[1].src
[2] = swizzle(src
[1], SWIZZLE(W
, W
, W
, W
));
1597 emit_inst(c
, &ins
[0]);
1598 emit_inst(c
, &ins
[1]);
1602 trans_sampler(const struct instr_translater
*t
, struct etna_compile
*c
,
1603 const struct tgsi_full_instruction
*inst
,
1604 struct etna_inst_src
*src
)
1606 /* There is no native support for GL texture rectangle coordinates, so
1607 * we have to rescale from ([0, width], [0, height]) to ([0, 1], [0, 1]). */
1608 if (inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
) {
1609 uint32_t unit
= inst
->Src
[1].Register
.Index
;
1610 struct etna_inst ins
[2] = { };
1611 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1613 ins
[0].opcode
= INST_OPCODE_MUL
;
1614 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
);
1615 ins
[0].src
[0] = src
[0];
1616 ins
[0].src
[1] = alloc_imm(c
, ETNA_IMMEDIATE_TEXRECT_SCALE_X
, unit
);
1618 ins
[1].opcode
= INST_OPCODE_MUL
;
1619 ins
[1].dst
= etna_native_to_dst(temp
, INST_COMPS_Y
);
1620 ins
[1].src
[0] = src
[0];
1621 ins
[1].src
[1] = alloc_imm(c
, ETNA_IMMEDIATE_TEXRECT_SCALE_Y
, unit
);
1623 emit_inst(c
, &ins
[0]);
1624 emit_inst(c
, &ins
[1]);
1626 src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
); /* temp.xyzw */
1629 switch (inst
->Instruction
.Opcode
) {
1630 case TGSI_OPCODE_TEX
:
1631 emit_inst(c
, &(struct etna_inst
) {
1632 .opcode
= INST_OPCODE_TEXLD
,
1634 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1635 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1640 case TGSI_OPCODE_TXB
:
1641 emit_inst(c
, &(struct etna_inst
) {
1642 .opcode
= INST_OPCODE_TEXLDB
,
1644 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1645 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1650 case TGSI_OPCODE_TXL
:
1651 emit_inst(c
, &(struct etna_inst
) {
1652 .opcode
= INST_OPCODE_TEXLDL
,
1654 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1655 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1660 case TGSI_OPCODE_TXP
: { /* divide src.xyz by src.w */
1661 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1663 emit_inst(c
, &(struct etna_inst
) {
1664 .opcode
= INST_OPCODE_RCP
,
1666 .dst
= etna_native_to_dst(temp
, INST_COMPS_W
), /* tmp.w */
1667 .src
[2] = swizzle(src
[0], SWIZZLE(W
, W
, W
, W
)),
1669 emit_inst(c
, &(struct etna_inst
) {
1670 .opcode
= INST_OPCODE_MUL
,
1672 .dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1673 INST_COMPS_Z
), /* tmp.xyz */
1674 .src
[0] = etna_native_to_src(temp
, SWIZZLE(W
, W
, W
, W
)),
1675 .src
[1] = src
[0], /* src.xyzw */
1677 emit_inst(c
, &(struct etna_inst
) {
1678 .opcode
= INST_OPCODE_TEXLD
,
1680 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1681 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1682 .src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
), /* tmp.xyzw */
1687 BUG("Unhandled instruction %s",
1688 tgsi_get_opcode_name(inst
->Instruction
.Opcode
));
1695 trans_dummy(const struct instr_translater
*t
, struct etna_compile
*c
,
1696 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1701 static const struct instr_translater translaters
[TGSI_OPCODE_LAST
] = {
1702 #define INSTR(n, f, ...) \
1703 [TGSI_OPCODE_##n] = {.fxn = (f), .tgsi_opc = TGSI_OPCODE_##n, ##__VA_ARGS__}
1705 INSTR(MOV
, trans_instr
, .opc
= INST_OPCODE_MOV
, .src
= {2, -1, -1}),
1706 INSTR(RCP
, trans_instr
, .opc
= INST_OPCODE_RCP
, .src
= {2, -1, -1}),
1707 INSTR(RSQ
, trans_instr
, .opc
= INST_OPCODE_RSQ
, .src
= {2, -1, -1}),
1708 INSTR(MUL
, trans_instr
, .opc
= INST_OPCODE_MUL
, .src
= {0, 1, -1}),
1709 INSTR(ADD
, trans_instr
, .opc
= INST_OPCODE_ADD
, .src
= {0, 2, -1}),
1710 INSTR(DP3
, trans_instr
, .opc
= INST_OPCODE_DP3
, .src
= {0, 1, -1}),
1711 INSTR(DP4
, trans_instr
, .opc
= INST_OPCODE_DP4
, .src
= {0, 1, -1}),
1712 INSTR(DST
, trans_instr
, .opc
= INST_OPCODE_DST
, .src
= {0, 1, -1}),
1713 INSTR(MAD
, trans_instr
, .opc
= INST_OPCODE_MAD
, .src
= {0, 1, 2}),
1714 INSTR(EX2
, trans_instr
, .opc
= INST_OPCODE_EXP
, .src
= {2, -1, -1}),
1715 INSTR(LG2
, trans_instr
, .opc
= INST_OPCODE_LOG
, .src
= {2, -1, -1}),
1716 INSTR(SQRT
, trans_instr
, .opc
= INST_OPCODE_SQRT
, .src
= {2, -1, -1}),
1717 INSTR(FRC
, trans_instr
, .opc
= INST_OPCODE_FRC
, .src
= {2, -1, -1}),
1718 INSTR(CEIL
, trans_instr
, .opc
= INST_OPCODE_CEIL
, .src
= {2, -1, -1}),
1719 INSTR(FLR
, trans_instr
, .opc
= INST_OPCODE_FLOOR
, .src
= {2, -1, -1}),
1720 INSTR(CMP
, trans_instr
, .opc
= INST_OPCODE_SELECT
, .src
= {0, 1, 2}, .cond
= INST_CONDITION_LZ
),
1722 INSTR(KILL
, trans_instr
, .opc
= INST_OPCODE_TEXKILL
),
1723 INSTR(KILL_IF
, trans_instr
, .opc
= INST_OPCODE_TEXKILL
, .src
= {0, -1, -1}, .cond
= INST_CONDITION_LZ
),
1725 INSTR(DDX
, trans_deriv
, .opc
= INST_OPCODE_DSX
),
1726 INSTR(DDY
, trans_deriv
, .opc
= INST_OPCODE_DSY
),
1728 INSTR(IF
, trans_if
),
1729 INSTR(ELSE
, trans_else
),
1730 INSTR(ENDIF
, trans_endif
),
1732 INSTR(BGNLOOP
, trans_loop_bgn
),
1733 INSTR(ENDLOOP
, trans_loop_end
),
1734 INSTR(BRK
, trans_brk
),
1735 INSTR(CONT
, trans_cont
),
1737 INSTR(MIN
, trans_min_max
, .opc
= INST_OPCODE_SELECT
, .cond
= INST_CONDITION_GT
),
1738 INSTR(MAX
, trans_min_max
, .opc
= INST_OPCODE_SELECT
, .cond
= INST_CONDITION_LT
),
1740 INSTR(ARL
, trans_arl
),
1741 INSTR(LRP
, trans_lrp
),
1742 INSTR(LIT
, trans_lit
),
1743 INSTR(SSG
, trans_ssg
),
1744 INSTR(DPH
, trans_dph
),
1746 INSTR(SIN
, trans_trig
),
1747 INSTR(COS
, trans_trig
),
1748 INSTR(SCS
, trans_trig
),
1750 INSTR(SLT
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_LT
),
1751 INSTR(SGE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_GE
),
1752 INSTR(SEQ
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_EQ
),
1753 INSTR(SGT
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_GT
),
1754 INSTR(SLE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_LE
),
1755 INSTR(SNE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_NE
),
1757 INSTR(TEX
, trans_sampler
),
1758 INSTR(TXB
, trans_sampler
),
1759 INSTR(TXL
, trans_sampler
),
1760 INSTR(TXP
, trans_sampler
),
1762 INSTR(NOP
, trans_dummy
),
1763 INSTR(END
, trans_dummy
),
1766 /* Pass -- compile instructions */
1768 etna_compile_pass_generate_code(struct etna_compile
*c
)
1770 struct tgsi_parse_context ctx
= { };
1771 unsigned status
= tgsi_parse_init(&ctx
, c
->tokens
);
1772 assert(status
== TGSI_PARSE_OK
);
1775 while (!tgsi_parse_end_of_tokens(&ctx
)) {
1776 const struct tgsi_full_instruction
*inst
= 0;
1778 /* No inner temps used yet for this instruction, clear counter */
1781 tgsi_parse_token(&ctx
);
1783 switch (ctx
.FullToken
.Token
.Type
) {
1784 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1785 /* iterate over operands */
1786 inst
= &ctx
.FullToken
.FullInstruction
;
1787 if (c
->dead_inst
[inst_idx
]) { /* skip dead instructions */
1792 /* Lookup the TGSI information and generate the source arguments */
1793 struct etna_inst_src src
[ETNA_NUM_SRC
];
1794 memset(src
, 0, sizeof(src
));
1796 const struct tgsi_opcode_info
*tgsi
= tgsi_get_opcode_info(inst
->Instruction
.Opcode
);
1798 for (int i
= 0; i
< tgsi
->num_src
&& i
< ETNA_NUM_SRC
; i
++) {
1799 const struct tgsi_full_src_register
*reg
= &inst
->Src
[i
];
1800 const struct etna_native_reg
*n
= &etna_get_src_reg(c
, reg
->Register
)->native
;
1802 if (!n
->valid
|| n
->is_tex
)
1805 src
[i
] = etna_create_src(reg
, n
);
1808 const unsigned opc
= inst
->Instruction
.Opcode
;
1809 const struct instr_translater
*t
= &translaters
[opc
];
1812 t
->fxn(t
, c
, inst
, src
);
1816 BUG("Unhandled instruction %s", tgsi_get_opcode_name(opc
));
1822 tgsi_parse_free(&ctx
);
1825 /* Look up register by semantic */
1826 static struct etna_reg_desc
*
1827 find_decl_by_semantic(struct etna_compile
*c
, uint file
, uint name
, uint index
)
1829 for (int idx
= 0; idx
< c
->file
[file
].reg_size
; ++idx
) {
1830 struct etna_reg_desc
*reg
= &c
->file
[file
].reg
[idx
];
1832 if (reg
->semantic
.Name
== name
&& reg
->semantic
.Index
== index
)
1836 return NULL
; /* not found */
1839 /** Add ADD and MUL instruction to bring Z/W to 0..1 if -1..1 if needed:
1840 * - this is a vertex shader
1841 * - and this is an older GPU
1844 etna_compile_add_z_div_if_needed(struct etna_compile
*c
)
1846 if (c
->info
.processor
== PIPE_SHADER_VERTEX
&& c
->specs
->vs_need_z_div
) {
1847 /* find position out */
1848 struct etna_reg_desc
*pos_reg
=
1849 find_decl_by_semantic(c
, TGSI_FILE_OUTPUT
, TGSI_SEMANTIC_POSITION
, 0);
1851 if (pos_reg
!= NULL
) {
1853 * ADD tX.__z_, tX.zzzz, void, tX.wwww
1854 * MUL tX.__z_, tX.zzzz, 0.5, void
1856 emit_inst(c
, &(struct etna_inst
) {
1857 .opcode
= INST_OPCODE_ADD
,
1858 .dst
= etna_native_to_dst(pos_reg
->native
, INST_COMPS_Z
),
1859 .src
[0] = etna_native_to_src(pos_reg
->native
, SWIZZLE(Z
, Z
, Z
, Z
)),
1860 .src
[2] = etna_native_to_src(pos_reg
->native
, SWIZZLE(W
, W
, W
, W
)),
1862 emit_inst(c
, &(struct etna_inst
) {
1863 .opcode
= INST_OPCODE_MUL
,
1864 .dst
= etna_native_to_dst(pos_reg
->native
, INST_COMPS_Z
),
1865 .src
[0] = etna_native_to_src(pos_reg
->native
, SWIZZLE(Z
, Z
, Z
, Z
)),
1866 .src
[1] = alloc_imm_f32(c
, 0.5f
),
1872 /** add a NOP to the shader if
1873 * a) the shader is empty
1875 * b) there is a label at the end of the shader
1878 etna_compile_add_nop_if_needed(struct etna_compile
*c
)
1880 bool label_at_last_inst
= false;
1882 for (int idx
= 0; idx
< c
->labels_count
; ++idx
) {
1883 if (c
->labels
[idx
].inst_idx
== c
->inst_ptr
)
1884 label_at_last_inst
= true;
1888 if (c
->inst_ptr
== 0 || label_at_last_inst
)
1889 emit_inst(c
, &(struct etna_inst
){.opcode
= INST_OPCODE_NOP
});
1893 assign_uniforms(struct etna_compile_file
*file
, unsigned base
)
1895 for (int idx
= 0; idx
< file
->reg_size
; ++idx
) {
1896 file
->reg
[idx
].native
.valid
= 1;
1897 file
->reg
[idx
].native
.rgroup
= INST_RGROUP_UNIFORM_0
;
1898 file
->reg
[idx
].native
.id
= base
+ idx
;
1902 /* Allocate CONST and IMM to native ETNA_RGROUP_UNIFORM(x).
1903 * CONST must be consecutive as const buffers are supposed to be consecutive,
1904 * and before IMM, as this is
1905 * more convenient because is possible for the compilation process itself to
1907 * immediates for constants such as pi, one, zero.
1910 assign_constants_and_immediates(struct etna_compile
*c
)
1912 assign_uniforms(&c
->file
[TGSI_FILE_CONSTANT
], 0);
1913 /* immediates start after the constants */
1914 c
->imm_base
= c
->file
[TGSI_FILE_CONSTANT
].reg_size
* 4;
1915 assign_uniforms(&c
->file
[TGSI_FILE_IMMEDIATE
], c
->imm_base
/ 4);
1916 DBG_F(ETNA_DBG_COMPILER_MSGS
, "imm base: %i size: %i", c
->imm_base
,
1920 /* Assign declared samplers to native texture units */
1922 assign_texture_units(struct etna_compile
*c
)
1926 if (c
->info
.processor
== PIPE_SHADER_VERTEX
)
1927 tex_base
= c
->specs
->vertex_sampler_offset
;
1929 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_SAMPLER
].reg_size
; ++idx
) {
1930 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.valid
= 1;
1931 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.is_tex
= 1; // overrides rgroup
1932 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.id
= tex_base
+ idx
;
1936 /* Additional pass to fill in branch targets. This pass should be last
1937 * as no instruction reordering or removing/addition can be done anymore
1938 * once the branch targets are computed.
1941 etna_compile_fill_in_labels(struct etna_compile
*c
)
1943 for (int idx
= 0; idx
< c
->inst_ptr
; ++idx
) {
1944 if (c
->lbl_usage
[idx
])
1945 etna_assemble_set_imm(&c
->code
[idx
* 4], c
->lbl_usage
[idx
]->inst_idx
);
1949 /* compare two etna_native_reg structures, return true if equal */
1951 cmp_etna_native_reg(const struct etna_native_reg to
,
1952 const struct etna_native_reg from
)
1954 return to
.valid
== from
.valid
&& to
.is_tex
== from
.is_tex
&&
1955 to
.rgroup
== from
.rgroup
&& to
.id
== from
.id
;
1958 /* go through all declarations and swap native registers *to* and *from* */
1960 swap_native_registers(struct etna_compile
*c
, const struct etna_native_reg to
,
1961 const struct etna_native_reg from
)
1963 if (cmp_etna_native_reg(from
, to
))
1964 return; /* Nothing to do */
1966 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
1967 if (cmp_etna_native_reg(c
->decl
[idx
].native
, from
)) {
1968 c
->decl
[idx
].native
= to
;
1969 } else if (cmp_etna_native_reg(c
->decl
[idx
].native
, to
)) {
1970 c
->decl
[idx
].native
= from
;
1975 /* For PS we need to permute so that inputs are always in temporary 0..N-1.
1976 * Semantic POS is always t0. If that semantic is not used, avoid t0.
1979 permute_ps_inputs(struct etna_compile
*c
)
1982 * gl_FragCoord VARYING_SLOT_POS TGSI_SEMANTIC_POSITION
1983 * gl_PointCoord VARYING_SLOT_PNTC TGSI_SEMANTIC_PCOORD
1985 uint native_idx
= 1;
1987 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
1988 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
1990 assert(reg
->has_semantic
);
1992 if (!reg
->active
|| reg
->semantic
.Name
== TGSI_SEMANTIC_POSITION
)
1995 input_id
= native_idx
++;
1996 swap_native_registers(c
, etna_native_temp(input_id
),
1997 c
->file
[TGSI_FILE_INPUT
].reg
[idx
].native
);
2000 c
->num_varyings
= native_idx
- 1;
2002 if (native_idx
> c
->next_free_native
)
2003 c
->next_free_native
= native_idx
;
2006 /* fill in ps inputs into shader object */
2008 fill_in_ps_inputs(struct etna_shader
*sobj
, struct etna_compile
*c
)
2010 struct etna_shader_io_file
*sf
= &sobj
->infile
;
2014 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
2015 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
2017 if (reg
->native
.id
> 0) {
2018 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2019 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2020 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2021 /* convert usage mask to number of components (*=wildcard)
2022 * .r (0..1) -> 1 component
2023 * .*g (2..3) -> 2 component
2024 * .**b (4..7) -> 3 components
2025 * .***a (8..15) -> 4 components
2027 sf
->reg
[sf
->num_reg
].num_components
= util_last_bit(reg
->usage_mask
);
2032 assert(sf
->num_reg
== c
->num_varyings
);
2033 sobj
->input_count_unk8
= 31; /* XXX what is this */
2036 /* fill in output mapping for ps into shader object */
2038 fill_in_ps_outputs(struct etna_shader
*sobj
, struct etna_compile
*c
)
2040 sobj
->outfile
.num_reg
= 0;
2042 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_OUTPUT
].reg_size
; ++idx
) {
2043 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_OUTPUT
].reg
[idx
];
2045 switch (reg
->semantic
.Name
) {
2046 case TGSI_SEMANTIC_COLOR
: /* FRAG_RESULT_COLOR */
2047 sobj
->ps_color_out_reg
= reg
->native
.id
;
2049 case TGSI_SEMANTIC_POSITION
: /* FRAG_RESULT_DEPTH */
2050 sobj
->ps_depth_out_reg
= reg
->native
.id
; /* =always native reg 0, only z component should be assigned */
2053 assert(0); /* only outputs supported are COLOR and POSITION at the moment */
2058 /* fill in inputs for vs into shader object */
2060 fill_in_vs_inputs(struct etna_shader
*sobj
, struct etna_compile
*c
)
2062 struct etna_shader_io_file
*sf
= &sobj
->infile
;
2065 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
2066 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
2067 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2068 /* XXX exclude inputs with special semantics such as gl_frontFacing */
2069 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2070 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2071 sf
->reg
[sf
->num_reg
].num_components
= util_last_bit(reg
->usage_mask
);
2075 sobj
->input_count_unk8
= (sf
->num_reg
+ 19) / 16; /* XXX what is this */
2078 /* build two-level output index [Semantic][Index] for fast linking */
2080 build_output_index(struct etna_shader
*sobj
)
2085 for (int name
= 0; name
< TGSI_SEMANTIC_COUNT
; ++name
)
2086 total
+= sobj
->output_count_per_semantic
[name
];
2088 sobj
->output_per_semantic_list
= CALLOC(total
, sizeof(struct etna_shader_inout
*));
2090 for (int name
= 0; name
< TGSI_SEMANTIC_COUNT
; ++name
) {
2091 sobj
->output_per_semantic
[name
] = &sobj
->output_per_semantic_list
[offset
];
2092 offset
+= sobj
->output_count_per_semantic
[name
];
2095 for (int idx
= 0; idx
< sobj
->outfile
.num_reg
; ++idx
) {
2096 sobj
->output_per_semantic
[sobj
->outfile
.reg
[idx
].semantic
.Name
]
2097 [sobj
->outfile
.reg
[idx
].semantic
.Index
] =
2098 &sobj
->outfile
.reg
[idx
];
2102 /* fill in outputs for vs into shader object */
2104 fill_in_vs_outputs(struct etna_shader
*sobj
, struct etna_compile
*c
)
2106 struct etna_shader_io_file
*sf
= &sobj
->outfile
;
2109 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_OUTPUT
].reg_size
; ++idx
) {
2110 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_OUTPUT
].reg
[idx
];
2111 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2113 switch (reg
->semantic
.Name
) {
2114 case TGSI_SEMANTIC_POSITION
:
2115 sobj
->vs_pos_out_reg
= reg
->native
.id
;
2117 case TGSI_SEMANTIC_PSIZE
:
2118 sobj
->vs_pointsize_out_reg
= reg
->native
.id
;
2121 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2122 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2123 sf
->reg
[sf
->num_reg
].num_components
= 4; // XXX reg->num_components;
2125 sobj
->output_count_per_semantic
[reg
->semantic
.Name
] =
2126 MAX2(reg
->semantic
.Index
+ 1,
2127 sobj
->output_count_per_semantic
[reg
->semantic
.Name
]);
2131 /* build two-level index for linking */
2132 build_output_index(sobj
);
2134 /* fill in "mystery meat" load balancing value. This value determines how
2135 * work is scheduled between VS and PS
2136 * in the unified shader architecture. More precisely, it is determined from
2137 * the number of VS outputs, as well as chip-specific
2138 * vertex output buffer size, vertex cache size, and the number of shader
2141 * XXX this is a conservative estimate, the "optimal" value is only known for
2142 * sure at link time because some
2143 * outputs may be unused and thus unmapped. Then again, in the general use
2144 * case with GLSL the vertex and fragment
2145 * shaders are linked already before submitting to Gallium, thus all outputs
2148 int half_out
= (c
->file
[TGSI_FILE_OUTPUT
].reg_size
+ 1) / 2;
2151 uint32_t b
= ((20480 / (c
->specs
->vertex_output_buffer_size
-
2152 2 * half_out
* c
->specs
->vertex_cache_size
)) +
2155 uint32_t a
= (b
+ 256 / (c
->specs
->shader_core_count
* half_out
)) / 2;
2156 sobj
->vs_load_balancing
= VIVS_VS_LOAD_BALANCING_A(MIN2(a
, 255)) |
2157 VIVS_VS_LOAD_BALANCING_B(MIN2(b
, 255)) |
2158 VIVS_VS_LOAD_BALANCING_C(0x3f) |
2159 VIVS_VS_LOAD_BALANCING_D(0x0f);
2163 etna_compile_check_limits(struct etna_compile
*c
)
2165 int max_uniforms
= (c
->info
.processor
== PIPE_SHADER_VERTEX
)
2166 ? c
->specs
->max_vs_uniforms
2167 : c
->specs
->max_ps_uniforms
;
2168 /* round up number of uniforms, including immediates, in units of four */
2169 int num_uniforms
= c
->imm_base
/ 4 + (c
->imm_size
+ 3) / 4;
2171 if (c
->inst_ptr
> c
->specs
->max_instructions
) {
2172 DBG("Number of instructions (%d) exceeds maximum %d", c
->inst_ptr
,
2173 c
->specs
->max_instructions
);
2177 if (c
->next_free_native
> c
->specs
->max_registers
) {
2178 DBG("Number of registers (%d) exceeds maximum %d", c
->next_free_native
,
2179 c
->specs
->max_registers
);
2183 if (num_uniforms
> max_uniforms
) {
2184 DBG("Number of uniforms (%d) exceeds maximum %d", num_uniforms
,
2189 if (c
->num_varyings
> c
->specs
->max_varyings
) {
2190 DBG("Number of varyings (%d) exceeds maximum %d", c
->num_varyings
,
2191 c
->specs
->max_varyings
);
2195 if (c
->imm_base
> c
->specs
->num_constants
) {
2196 DBG("Number of constants (%d) exceeds maximum %d", c
->imm_base
,
2197 c
->specs
->num_constants
);
2204 copy_uniform_state_to_shader(struct etna_compile
*c
, struct etna_shader
*sobj
)
2206 uint32_t count
= c
->imm_size
;
2207 struct etna_shader_uniform_info
*uinfo
= &sobj
->uniforms
;
2209 uinfo
->const_count
= c
->imm_base
;
2210 uinfo
->imm_count
= count
;
2211 uinfo
->imm_data
= mem_dup(c
->imm_data
, count
* sizeof(*c
->imm_data
));
2212 uinfo
->imm_contents
= mem_dup(c
->imm_contents
, count
* sizeof(*c
->imm_contents
));
2214 etna_set_shader_uniforms_dirty_flags(sobj
);
2217 struct etna_shader
*
2218 etna_compile_shader(const struct etna_specs
*specs
,
2219 const struct tgsi_token
*tokens
)
2221 /* Create scratch space that may be too large to fit on stack
2224 struct etna_compile
*c
;
2225 struct etna_shader
*shader
;
2227 struct tgsi_lowering_config lconfig
= {
2228 .lower_SCS
= specs
->has_sin_cos_sqrt
,
2229 .lower_FLR
= !specs
->has_sign_floor_ceil
,
2230 .lower_CEIL
= !specs
->has_sign_floor_ceil
,
2236 .lower_TRUNC
= true,
2240 c
= CALLOC_STRUCT(etna_compile
);
2244 shader
= CALLOC_STRUCT(etna_shader
);
2249 c
->tokens
= tgsi_transform_lowering(&lconfig
, tokens
, &c
->info
);
2250 c
->free_tokens
= !!c
->tokens
;
2256 /* Build a map from gallium register to native registers for files
2257 * CONST, SAMP, IMM, OUT, IN, TEMP.
2258 * SAMP will map as-is for fragment shaders, there will be a +8 offset for
2261 /* Pass one -- check register file declarations and immediates */
2262 etna_compile_parse_declarations(c
);
2264 etna_allocate_decls(c
);
2266 /* Pass two -- check usage of temporaries, inputs, outputs */
2267 etna_compile_pass_check_usage(c
);
2269 assign_special_inputs(c
);
2271 /* Assign native temp register to TEMPs */
2272 assign_temporaries_to_native(c
, &c
->file
[TGSI_FILE_TEMPORARY
]);
2274 /* optimize outputs */
2275 etna_compile_pass_optimize_outputs(c
);
2277 /* XXX assign special inputs: gl_FrontFacing (VARYING_SLOT_FACE)
2278 * this is part of RGROUP_INTERNAL
2281 /* assign inputs: last usage of input should be <= first usage of temp */
2282 /* potential optimization case:
2283 * if single MOV TEMP[y], IN[x] before which temp y is not used, and
2285 * is not read, temp[y] can be used as input register as-is
2287 /* sort temporaries by first use
2288 * sort inputs by last usage
2289 * iterate over inputs, temporaries
2290 * if last usage of input <= first usage of temp:
2291 * assign input to temp
2292 * advance input, temporary pointer
2294 * advance temporary pointer
2296 * potential problem: instruction with multiple inputs of which one is the
2297 * temp and the other is the input;
2298 * however, as the temp is not used before this, how would this make
2299 * sense? uninitialized temporaries have an undefined
2300 * value, so this would be ok
2302 assign_inouts_to_temporaries(c
, TGSI_FILE_INPUT
);
2304 /* assign outputs: first usage of output should be >= last usage of temp */
2305 /* potential optimization case:
2306 * if single MOV OUT[x], TEMP[y] (with full write mask, or at least
2307 * writing all components that are used in
2308 * the shader) after which temp y is no longer used temp[y] can be
2309 * used as output register as-is
2311 * potential problem: instruction with multiple outputs of which one is the
2312 * temp and the other is the output;
2313 * however, as the temp is not used after this, how would this make
2314 * sense? could just discard the output value
2316 /* sort temporaries by last use
2317 * sort outputs by first usage
2318 * iterate over outputs, temporaries
2319 * if first usage of output >= last usage of temp:
2320 * assign output to temp
2321 * advance output, temporary pointer
2323 * advance temporary pointer
2325 assign_inouts_to_temporaries(c
, TGSI_FILE_OUTPUT
);
2327 assign_constants_and_immediates(c
);
2328 assign_texture_units(c
);
2330 /* list declarations */
2331 for (int x
= 0; x
< c
->total_decls
; ++x
) {
2332 DBG_F(ETNA_DBG_COMPILER_MSGS
, "%i: %s,%d active=%i first_use=%i "
2333 "last_use=%i native=%i usage_mask=%x "
2335 x
, tgsi_file_name(c
->decl
[x
].file
), c
->decl
[x
].idx
,
2336 c
->decl
[x
].active
, c
->decl
[x
].first_use
, c
->decl
[x
].last_use
,
2337 c
->decl
[x
].native
.valid
? c
->decl
[x
].native
.id
: -1,
2338 c
->decl
[x
].usage_mask
, c
->decl
[x
].has_semantic
);
2339 if (c
->decl
[x
].has_semantic
)
2340 DBG_F(ETNA_DBG_COMPILER_MSGS
, " semantic_name=%s semantic_idx=%i",
2341 tgsi_semantic_names
[c
->decl
[x
].semantic
.Name
],
2342 c
->decl
[x
].semantic
.Index
);
2344 /* XXX for PS we need to permute so that inputs are always in temporary
2346 * There is no "switchboard" for varyings (AFAIK!). The output color,
2347 * however, can be routed
2348 * from an arbitrary temporary.
2350 if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
)
2351 permute_ps_inputs(c
);
2354 /* list declarations */
2355 for (int x
= 0; x
< c
->total_decls
; ++x
) {
2356 DBG_F(ETNA_DBG_COMPILER_MSGS
, "%i: %s,%d active=%i first_use=%i "
2357 "last_use=%i native=%i usage_mask=%x "
2359 x
, tgsi_file_name(c
->decl
[x
].file
), c
->decl
[x
].idx
,
2360 c
->decl
[x
].active
, c
->decl
[x
].first_use
, c
->decl
[x
].last_use
,
2361 c
->decl
[x
].native
.valid
? c
->decl
[x
].native
.id
: -1,
2362 c
->decl
[x
].usage_mask
, c
->decl
[x
].has_semantic
);
2363 if (c
->decl
[x
].has_semantic
)
2364 DBG_F(ETNA_DBG_COMPILER_MSGS
, " semantic_name=%s semantic_idx=%i",
2365 tgsi_semantic_names
[c
->decl
[x
].semantic
.Name
],
2366 c
->decl
[x
].semantic
.Index
);
2369 /* pass 3: generate instructions */
2370 etna_compile_pass_generate_code(c
);
2371 etna_compile_add_z_div_if_needed(c
);
2372 etna_compile_add_nop_if_needed(c
);
2373 etna_compile_fill_in_labels(c
);
2375 ret
= etna_compile_check_limits(c
);
2382 /* fill in output structure */
2383 shader
->processor
= c
->info
.processor
;
2384 shader
->code_size
= c
->inst_ptr
* 4;
2385 shader
->code
= mem_dup(c
->code
, c
->inst_ptr
* 16);
2386 shader
->num_temps
= c
->next_free_native
;
2387 shader
->vs_pos_out_reg
= -1;
2388 shader
->vs_pointsize_out_reg
= -1;
2389 shader
->ps_color_out_reg
= -1;
2390 shader
->ps_depth_out_reg
= -1;
2391 copy_uniform_state_to_shader(c
, shader
);
2393 if (c
->info
.processor
== PIPE_SHADER_VERTEX
) {
2394 fill_in_vs_inputs(shader
, c
);
2395 fill_in_vs_outputs(shader
, c
);
2396 } else if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
) {
2397 fill_in_ps_inputs(shader
, c
);
2398 fill_in_ps_outputs(shader
, c
);
2403 FREE((void *)c
->tokens
);
2411 extern const char *tgsi_swizzle_names
[];
2413 etna_dump_shader(const struct etna_shader
*shader
)
2415 if (shader
->processor
== PIPE_SHADER_VERTEX
)
2421 etna_disasm(shader
->code
, shader
->code_size
, PRINT_RAW
);
2423 printf("num temps: %i\n", shader
->num_temps
);
2424 printf("num const: %i\n", shader
->uniforms
.const_count
);
2425 printf("immediates:\n");
2426 for (int idx
= 0; idx
< shader
->uniforms
.imm_count
; ++idx
) {
2427 printf(" [%i].%s = %f (0x%08x)\n",
2428 (idx
+ shader
->uniforms
.const_count
) / 4,
2429 tgsi_swizzle_names
[idx
% 4],
2430 *((float *)&shader
->uniforms
.imm_data
[idx
]),
2431 shader
->uniforms
.imm_data
[idx
]);
2433 printf("inputs:\n");
2434 for (int idx
= 0; idx
< shader
->infile
.num_reg
; ++idx
) {
2435 printf(" [%i] name=%s index=%i comps=%i\n", shader
->infile
.reg
[idx
].reg
,
2436 tgsi_semantic_names
[shader
->infile
.reg
[idx
].semantic
.Name
],
2437 shader
->infile
.reg
[idx
].semantic
.Index
,
2438 shader
->infile
.reg
[idx
].num_components
);
2440 printf("outputs:\n");
2441 for (int idx
= 0; idx
< shader
->outfile
.num_reg
; ++idx
) {
2442 printf(" [%i] name=%s index=%i comps=%i\n", shader
->outfile
.reg
[idx
].reg
,
2443 tgsi_semantic_names
[shader
->outfile
.reg
[idx
].semantic
.Name
],
2444 shader
->outfile
.reg
[idx
].semantic
.Index
,
2445 shader
->outfile
.reg
[idx
].num_components
);
2447 printf("special:\n");
2448 if (shader
->processor
== PIPE_SHADER_VERTEX
) {
2449 printf(" vs_pos_out_reg=%i\n", shader
->vs_pos_out_reg
);
2450 printf(" vs_pointsize_out_reg=%i\n", shader
->vs_pointsize_out_reg
);
2451 printf(" vs_load_balancing=0x%08x\n", shader
->vs_load_balancing
);
2453 printf(" ps_color_out_reg=%i\n", shader
->ps_color_out_reg
);
2454 printf(" ps_depth_out_reg=%i\n", shader
->ps_depth_out_reg
);
2456 printf(" input_count_unk8=0x%08x\n", shader
->input_count_unk8
);
2460 etna_destroy_shader(struct etna_shader
*shader
)
2465 FREE(shader
->uniforms
.imm_data
);
2466 FREE(shader
->uniforms
.imm_contents
);
2467 FREE(shader
->output_per_semantic_list
);
2471 static const struct etna_shader_inout
*
2472 etna_shader_vs_lookup(const struct etna_shader
*sobj
,
2473 const struct etna_shader_inout
*in
)
2475 if (in
->semantic
.Index
< sobj
->output_count_per_semantic
[in
->semantic
.Name
])
2476 return sobj
->output_per_semantic
[in
->semantic
.Name
][in
->semantic
.Index
];
2482 etna_link_shader(struct etna_shader_link_info
*info
,
2483 const struct etna_shader
*vs
, const struct etna_shader
*fs
)
2485 /* For each fragment input we need to find the associated vertex shader
2486 * output, which can be found by matching on semantic name and index. A
2487 * binary search could be used because the vs outputs are sorted by their
2488 * semantic index and grouped by semantic type by fill_in_vs_outputs.
2490 assert(fs
->infile
.num_reg
< ETNA_NUM_INPUTS
);
2492 for (int idx
= 0; idx
< fs
->infile
.num_reg
; ++idx
) {
2493 const struct etna_shader_inout
*fsio
= &fs
->infile
.reg
[idx
];
2494 const struct etna_shader_inout
*vsio
= etna_shader_vs_lookup(vs
, fsio
);
2495 struct etna_varying
*varying
;
2497 assert(fsio
->reg
> 0 && fsio
->reg
<= ARRAY_SIZE(info
->varyings
));
2499 if (fsio
->reg
> info
->num_varyings
)
2500 info
->num_varyings
= fsio
->reg
;
2502 varying
= &info
->varyings
[fsio
->reg
- 1];
2503 varying
->num_components
= fsio
->num_components
;
2505 if (fsio
->semantic
.Name
== TGSI_SEMANTIC_COLOR
) /* colors affected by flat shading */
2506 varying
->pa_attributes
= 0x200;
2507 else /* texture coord or other bypasses flat shading */
2508 varying
->pa_attributes
= 0x2f1;
2510 if (fsio
->semantic
.Name
== TGSI_SEMANTIC_PCOORD
) {
2511 varying
->use
[0] = VARYING_COMPONENT_USE_POINTCOORD_X
;
2512 varying
->use
[1] = VARYING_COMPONENT_USE_POINTCOORD_Y
;
2513 varying
->use
[2] = VARYING_COMPONENT_USE_USED
;
2514 varying
->use
[3] = VARYING_COMPONENT_USE_USED
;
2515 varying
->reg
= 0; /* replaced by point coord -- doesn't matter */
2520 return true; /* not found -- link error */
2522 varying
->use
[0] = VARYING_COMPONENT_USE_USED
;
2523 varying
->use
[1] = VARYING_COMPONENT_USE_USED
;
2524 varying
->use
[2] = VARYING_COMPONENT_USE_USED
;
2525 varying
->use
[3] = VARYING_COMPONENT_USE_USED
;
2526 varying
->reg
= vsio
->reg
;
2529 assert(info
->num_varyings
== fs
->infile
.num_reg
);