2 * Copyright (c) 2012-2015 Etnaviv Project
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
24 * Wladimir J. van der Laan <laanwj@gmail.com>
27 /* TGSI->Vivante shader ISA conversion */
29 /* What does the compiler return (see etna_shader_object)?
31 * 2) input-to-temporary mapping (fixed for ps)
32 * *) in case of ps, semantic -> varying id mapping
33 * *) for each varying: number of components used (r, rg, rgb, rgba)
34 * 3) temporary-to-output mapping (in case of vs, fixed for ps)
35 * 4) for each input/output: possible semantic (position, color, glpointcoord, ...)
36 * 5) immediates base offset, immediates data
37 * 6) used texture units (and possibly the TGSI_TEXTURE_* type); not needed to
38 * configure the hw, but useful for error checking
39 * 7) enough information to add the z=(z+w)/2.0 necessary for older chips
40 * (output reg id is enough)
42 * Empty shaders are not allowed, should always at least generate a NOP. Also
43 * if there is a label at the end of the shader, an extra NOP should be
44 * generated as jump target.
47 * * Use an instruction scheduler
48 * * Indirect access to uniforms / temporaries using amode
51 #include "etnaviv_compiler.h"
53 #include "etnaviv_asm.h"
54 #include "etnaviv_context.h"
55 #include "etnaviv_debug.h"
56 #include "etnaviv_disasm.h"
57 #include "etnaviv_uniforms.h"
58 #include "etnaviv_util.h"
60 #include "pipe/p_shader_tokens.h"
61 #include "tgsi/tgsi_info.h"
62 #include "tgsi/tgsi_iterate.h"
63 #include "tgsi/tgsi_lowering.h"
64 #include "tgsi/tgsi_strings.h"
65 #include "tgsi/tgsi_util.h"
66 #include "util/u_math.h"
67 #include "util/u_memory.h"
72 #include <sys/types.h>
74 #define ETNA_MAX_INNER_TEMPS 2
76 static const float sincos_const
[2][4] = {
81 1. / (2. * M_PI
), 0.75, 0.5, 0.0,
85 /* Native register description structure */
86 struct etna_native_reg
{
88 unsigned is_tex
: 1; /* is texture unit, overrides rgroup */
93 /* Register description */
94 struct etna_reg_desc
{
95 enum tgsi_file_type file
; /* IN, OUT, TEMP, ... */
96 int idx
; /* index into file */
97 bool active
; /* used in program */
98 int first_use
; /* instruction id of first use (scope begin) */
99 int last_use
; /* instruction id of last use (scope end, inclusive) */
101 struct etna_native_reg native
; /* native register to map to */
102 unsigned usage_mask
: 4; /* usage, per channel */
103 bool has_semantic
; /* register has associated TGSI semantic */
104 struct tgsi_declaration_semantic semantic
; /* TGSI semantic */
105 struct tgsi_declaration_interp interp
; /* Interpolation type */
108 /* Label information structure */
109 struct etna_compile_label
{
110 int inst_idx
; /* Instruction id that label points to */
113 enum etna_compile_frame_type
{
114 ETNA_COMPILE_FRAME_IF
, /* IF/ELSE/ENDIF */
115 ETNA_COMPILE_FRAME_LOOP
,
118 /* nesting scope frame (LOOP, IF, ...) during compilation
120 struct etna_compile_frame
{
121 enum etna_compile_frame_type type
;
122 struct etna_compile_label
*lbl_else
;
123 struct etna_compile_label
*lbl_endif
;
124 struct etna_compile_label
*lbl_loop_bgn
;
125 struct etna_compile_label
*lbl_loop_end
;
128 struct etna_compile_file
{
129 /* Number of registers in each TGSI file (max register+1) */
131 /* Register descriptions, per register index */
132 struct etna_reg_desc
*reg
;
135 #define array_insert(arr, val) \
137 if (arr##_count == arr##_sz) { \
138 arr##_sz = MAX2(2 * arr##_sz, 16); \
139 arr = realloc(arr, arr##_sz * sizeof(arr[0])); \
141 arr[arr##_count++] = val; \
145 /* scratch area for compiling shader, freed after compilation finishes */
146 struct etna_compile
{
147 const struct tgsi_token
*tokens
;
150 struct tgsi_shader_info info
;
152 /* Register descriptions, per TGSI file, per register index */
153 struct etna_compile_file file
[TGSI_FILE_COUNT
];
155 /* Keep track of TGSI register declarations */
156 struct etna_reg_desc decl
[ETNA_MAX_DECL
];
159 /* Bitmap of dead instructions which are removed in a separate pass */
160 bool dead_inst
[ETNA_MAX_TOKENS
];
163 enum etna_immediate_contents imm_contents
[ETNA_MAX_IMM
];
164 uint32_t imm_data
[ETNA_MAX_IMM
];
165 uint32_t imm_base
; /* base of immediates (in 32 bit units) */
166 uint32_t imm_size
; /* size of immediates (in 32 bit units) */
168 /* Next free native register, for register allocation */
169 uint32_t next_free_native
;
171 /* Temporary register for use within translated TGSI instruction,
172 * only allocated when needed.
174 int inner_temps
; /* number of inner temps used; only up to one available at
176 struct etna_native_reg inner_temp
[ETNA_MAX_INNER_TEMPS
];
178 /* Fields for handling nested conditionals */
179 struct etna_compile_frame frame_stack
[ETNA_MAX_DEPTH
];
181 struct etna_compile_label
*lbl_usage
[ETNA_MAX_INSTRUCTIONS
];
183 unsigned labels_count
, labels_sz
;
184 struct etna_compile_label
*labels
;
188 /* Code generation */
189 int inst_ptr
; /* current instruction pointer */
190 uint32_t code
[ETNA_MAX_INSTRUCTIONS
* ETNA_INST_SIZE
];
194 /* Number of varyings (PS only) */
197 /* GPU hardware specs */
198 const struct etna_specs
*specs
;
200 const struct etna_shader_key
*key
;
203 static struct etna_reg_desc
*
204 etna_get_dst_reg(struct etna_compile
*c
, struct tgsi_dst_register dst
)
206 return &c
->file
[dst
.File
].reg
[dst
.Index
];
209 static struct etna_reg_desc
*
210 etna_get_src_reg(struct etna_compile
*c
, struct tgsi_src_register src
)
212 return &c
->file
[src
.File
].reg
[src
.Index
];
215 static struct etna_native_reg
216 etna_native_temp(unsigned reg
)
218 return (struct etna_native_reg
) {
220 .rgroup
= INST_RGROUP_TEMP
,
225 /** Register allocation **/
226 enum reg_sort_order
{
233 /* Augmented register description for sorting */
235 struct etna_reg_desc
*ptr
;
240 sort_rec_compar(const struct sort_rec
*a
, const struct sort_rec
*b
)
251 /* create an index on a register set based on certain criteria. */
253 sort_registers(struct sort_rec
*sorted
, struct etna_compile_file
*file
,
254 enum reg_sort_order so
)
256 struct etna_reg_desc
*regs
= file
->reg
;
259 /* pre-populate keys from active registers */
260 for (int idx
= 0; idx
< file
->reg_size
; ++idx
) {
261 /* only interested in active registers now; will only assign inactive ones
262 * if no space in active ones */
263 if (regs
[idx
].active
) {
264 sorted
[ptr
].ptr
= ®s
[idx
];
268 sorted
[ptr
].key
= regs
[idx
].first_use
;
271 sorted
[ptr
].key
= regs
[idx
].last_use
;
274 sorted
[ptr
].key
= -regs
[idx
].first_use
;
277 sorted
[ptr
].key
= -regs
[idx
].last_use
;
284 /* sort index by key */
285 qsort(sorted
, ptr
, sizeof(struct sort_rec
),
286 (int (*)(const void *, const void *))sort_rec_compar
);
291 /* Allocate a new, unused, native temp register */
292 static struct etna_native_reg
293 alloc_new_native_reg(struct etna_compile
*c
)
295 assert(c
->next_free_native
< ETNA_MAX_TEMPS
);
296 return etna_native_temp(c
->next_free_native
++);
299 /* assign TEMPs to native registers */
301 assign_temporaries_to_native(struct etna_compile
*c
,
302 struct etna_compile_file
*file
)
304 struct etna_reg_desc
*temps
= file
->reg
;
306 for (int idx
= 0; idx
< file
->reg_size
; ++idx
)
307 temps
[idx
].native
= alloc_new_native_reg(c
);
310 /* assign inputs and outputs to temporaries
311 * Gallium assumes that the hardware has separate registers for taking input and
312 * output, however Vivante GPUs use temporaries both for passing in inputs and
313 * passing back outputs.
314 * Try to re-use temporary registers where possible. */
316 assign_inouts_to_temporaries(struct etna_compile
*c
, uint file
)
318 bool mode_inputs
= (file
== TGSI_FILE_INPUT
);
319 int inout_ptr
= 0, num_inouts
;
320 int temp_ptr
= 0, num_temps
;
321 struct sort_rec inout_order
[ETNA_MAX_TEMPS
];
322 struct sort_rec temps_order
[ETNA_MAX_TEMPS
];
323 num_inouts
= sort_registers(inout_order
, &c
->file
[file
],
324 mode_inputs
? LAST_USE_ASC
: FIRST_USE_ASC
);
325 num_temps
= sort_registers(temps_order
, &c
->file
[TGSI_FILE_TEMPORARY
],
326 mode_inputs
? FIRST_USE_ASC
: LAST_USE_ASC
);
328 while (inout_ptr
< num_inouts
&& temp_ptr
< num_temps
) {
329 struct etna_reg_desc
*inout
= inout_order
[inout_ptr
].ptr
;
330 struct etna_reg_desc
*temp
= temps_order
[temp_ptr
].ptr
;
332 if (!inout
->active
|| inout
->native
.valid
) { /* Skip if already a native register assigned */
337 /* last usage of this input is before or in same instruction of first use
339 if (mode_inputs
? (inout
->last_use
<= temp
->first_use
)
340 : (inout
->first_use
>= temp
->last_use
)) {
341 /* assign it and advance to next input */
342 inout
->native
= temp
->native
;
349 /* if we couldn't reuse current ones, allocate new temporaries */
350 for (inout_ptr
= 0; inout_ptr
< num_inouts
; ++inout_ptr
) {
351 struct etna_reg_desc
*inout
= inout_order
[inout_ptr
].ptr
;
353 if (inout
->active
&& !inout
->native
.valid
)
354 inout
->native
= alloc_new_native_reg(c
);
358 /* Allocate an immediate with a certain value and return the index. If
359 * there is already an immediate with that value, return that.
361 static struct etna_inst_src
362 alloc_imm(struct etna_compile
*c
, enum etna_immediate_contents contents
,
367 /* Could use a hash table to speed this up */
368 for (idx
= 0; idx
< c
->imm_size
; ++idx
) {
369 if (c
->imm_contents
[idx
] == contents
&& c
->imm_data
[idx
] == value
)
373 /* look if there is an unused slot */
374 if (idx
== c
->imm_size
) {
375 for (idx
= 0; idx
< c
->imm_size
; ++idx
) {
376 if (c
->imm_contents
[idx
] == ETNA_IMMEDIATE_UNUSED
)
381 /* allocate new immediate */
382 if (idx
== c
->imm_size
) {
383 assert(c
->imm_size
< ETNA_MAX_IMM
);
385 c
->imm_data
[idx
] = value
;
386 c
->imm_contents
[idx
] = contents
;
389 /* swizzle so that component with value is returned in all components */
391 struct etna_inst_src imm_src
= {
393 .rgroup
= INST_RGROUP_UNIFORM_0
,
395 .swiz
= INST_SWIZ_BROADCAST(idx
& 3)
401 static struct etna_inst_src
402 alloc_imm_u32(struct etna_compile
*c
, uint32_t value
)
404 return alloc_imm(c
, ETNA_IMMEDIATE_CONSTANT
, value
);
407 static struct etna_inst_src
408 alloc_imm_vec4u(struct etna_compile
*c
, enum etna_immediate_contents contents
,
409 const uint32_t *values
)
411 struct etna_inst_src imm_src
= { };
414 for (idx
= 0; idx
+ 3 < c
->imm_size
; idx
+= 4) {
415 /* What if we can use a uniform with a different swizzle? */
416 for (i
= 0; i
< 4; i
++)
417 if (c
->imm_contents
[idx
+ i
] != contents
|| c
->imm_data
[idx
+ i
] != values
[i
])
423 if (idx
+ 3 >= c
->imm_size
) {
424 idx
= align(c
->imm_size
, 4);
425 assert(idx
+ 4 <= ETNA_MAX_IMM
);
427 for (i
= 0; i
< 4; i
++) {
428 c
->imm_data
[idx
+ i
] = values
[i
];
429 c
->imm_contents
[idx
+ i
] = contents
;
432 c
->imm_size
= idx
+ 4;
435 assert((c
->imm_base
& 3) == 0);
438 imm_src
.rgroup
= INST_RGROUP_UNIFORM_0
;
439 imm_src
.reg
= idx
/ 4;
440 imm_src
.swiz
= INST_SWIZ_IDENTITY
;
446 get_imm_u32(struct etna_compile
*c
, const struct etna_inst_src
*imm
,
449 assert(imm
->use
== 1 && imm
->rgroup
== INST_RGROUP_UNIFORM_0
);
450 unsigned int idx
= imm
->reg
* 4 + ((imm
->swiz
>> (swiz_idx
* 2)) & 3);
452 return c
->imm_data
[idx
];
455 /* Allocate immediate with a certain float value. If there is already an
456 * immediate with that value, return that.
458 static struct etna_inst_src
459 alloc_imm_f32(struct etna_compile
*c
, float value
)
461 return alloc_imm_u32(c
, fui(value
));
464 static struct etna_inst_src
465 etna_imm_vec4f(struct etna_compile
*c
, const float *vec4
)
469 for (int i
= 0; i
< 4; i
++)
470 val
[i
] = fui(vec4
[i
]);
472 return alloc_imm_vec4u(c
, ETNA_IMMEDIATE_CONSTANT
, val
);
475 /* Pass -- check register file declarations and immediates */
477 etna_compile_parse_declarations(struct etna_compile
*c
)
479 struct tgsi_parse_context ctx
= { };
480 unsigned status
= TGSI_PARSE_OK
;
481 status
= tgsi_parse_init(&ctx
, c
->tokens
);
482 assert(status
== TGSI_PARSE_OK
);
484 while (!tgsi_parse_end_of_tokens(&ctx
)) {
485 tgsi_parse_token(&ctx
);
487 switch (ctx
.FullToken
.Token
.Type
) {
488 case TGSI_TOKEN_TYPE_IMMEDIATE
: {
489 /* immediates are handled differently from other files; they are
490 * not declared explicitly, and always add four components */
491 const struct tgsi_full_immediate
*imm
= &ctx
.FullToken
.FullImmediate
;
492 assert(c
->imm_size
<= (ETNA_MAX_IMM
- 4));
494 for (int i
= 0; i
< 4; ++i
) {
495 unsigned idx
= c
->imm_size
++;
497 c
->imm_data
[idx
] = imm
->u
[i
].Uint
;
498 c
->imm_contents
[idx
] = ETNA_IMMEDIATE_CONSTANT
;
505 tgsi_parse_free(&ctx
);
508 /* Allocate register declarations for the registers in all register files */
510 etna_allocate_decls(struct etna_compile
*c
)
514 for (int x
= 0; x
< TGSI_FILE_COUNT
; ++x
) {
515 c
->file
[x
].reg
= &c
->decl
[idx
];
516 c
->file
[x
].reg_size
= c
->info
.file_max
[x
] + 1;
518 for (int sub
= 0; sub
< c
->file
[x
].reg_size
; ++sub
) {
519 c
->decl
[idx
].file
= x
;
520 c
->decl
[idx
].idx
= sub
;
525 c
->total_decls
= idx
;
528 /* Pass -- check and record usage of temporaries, inputs, outputs */
530 etna_compile_pass_check_usage(struct etna_compile
*c
)
532 struct tgsi_parse_context ctx
= { };
533 unsigned status
= TGSI_PARSE_OK
;
534 status
= tgsi_parse_init(&ctx
, c
->tokens
);
535 assert(status
== TGSI_PARSE_OK
);
537 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
538 c
->decl
[idx
].active
= false;
539 c
->decl
[idx
].first_use
= c
->decl
[idx
].last_use
= -1;
543 while (!tgsi_parse_end_of_tokens(&ctx
)) {
544 tgsi_parse_token(&ctx
);
545 /* find out max register #s used
546 * For every register mark first and last instruction index where it's
547 * used this allows finding ranges where the temporary can be borrowed
548 * as input and/or output register
550 * XXX in the case of loops this needs special care, or even be completely
552 * the last usage of a register inside a loop means it can still be used
554 * iteration (execution is no longer * chronological). The register can
556 * declared "free" after the loop finishes.
558 * Same for inputs: the first usage of a register inside a loop doesn't
559 * mean that the register
560 * won't have been overwritten in previous iteration. The register can
561 * only be declared free before the loop
563 * The proper way would be to do full dominator / post-dominator analysis
564 * (especially with more complicated
565 * control flow such as direct branch instructions) but not for now...
567 switch (ctx
.FullToken
.Token
.Type
) {
568 case TGSI_TOKEN_TYPE_DECLARATION
: {
569 /* Declaration: fill in file details */
570 const struct tgsi_full_declaration
*decl
= &ctx
.FullToken
.FullDeclaration
;
571 struct etna_compile_file
*file
= &c
->file
[decl
->Declaration
.File
];
573 for (int idx
= decl
->Range
.First
; idx
<= decl
->Range
.Last
; ++idx
) {
574 file
->reg
[idx
].usage_mask
= 0; // we'll compute this ourselves
575 file
->reg
[idx
].has_semantic
= decl
->Declaration
.Semantic
;
576 file
->reg
[idx
].semantic
= decl
->Semantic
;
577 file
->reg
[idx
].interp
= decl
->Interp
;
580 case TGSI_TOKEN_TYPE_INSTRUCTION
: {
581 /* Instruction: iterate over operands of instruction */
582 const struct tgsi_full_instruction
*inst
= &ctx
.FullToken
.FullInstruction
;
584 /* iterate over destination registers */
585 for (int idx
= 0; idx
< inst
->Instruction
.NumDstRegs
; ++idx
) {
586 struct etna_reg_desc
*reg_desc
= &c
->file
[inst
->Dst
[idx
].Register
.File
].reg
[inst
->Dst
[idx
].Register
.Index
];
588 if (reg_desc
->first_use
== -1)
589 reg_desc
->first_use
= inst_idx
;
591 reg_desc
->last_use
= inst_idx
;
592 reg_desc
->active
= true;
595 /* iterate over source registers */
596 for (int idx
= 0; idx
< inst
->Instruction
.NumSrcRegs
; ++idx
) {
597 struct etna_reg_desc
*reg_desc
= &c
->file
[inst
->Src
[idx
].Register
.File
].reg
[inst
->Src
[idx
].Register
.Index
];
599 if (reg_desc
->first_use
== -1)
600 reg_desc
->first_use
= inst_idx
;
602 reg_desc
->last_use
= inst_idx
;
603 reg_desc
->active
= true;
604 /* accumulate usage mask for register, this is used to determine how
605 * many slots for varyings
606 * should be allocated */
607 reg_desc
->usage_mask
|= tgsi_util_get_inst_usage_mask(inst
, idx
);
616 tgsi_parse_free(&ctx
);
619 /* assign inputs that need to be assigned to specific registers */
621 assign_special_inputs(struct etna_compile
*c
)
623 if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
) {
624 /* never assign t0 as it is the position output, start assigning at t1 */
625 c
->next_free_native
= 1;
627 /* hardwire TGSI_SEMANTIC_POSITION (input and output) to t0 */
628 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
629 struct etna_reg_desc
*reg
= &c
->decl
[idx
];
631 if (reg
->active
&& reg
->semantic
.Name
== TGSI_SEMANTIC_POSITION
)
632 reg
->native
= etna_native_temp(0);
637 /* Check that a move instruction does not swizzle any of the components
641 etna_mov_check_no_swizzle(const struct tgsi_dst_register dst
,
642 const struct tgsi_src_register src
)
644 return (!(dst
.WriteMask
& TGSI_WRITEMASK_X
) || src
.SwizzleX
== TGSI_SWIZZLE_X
) &&
645 (!(dst
.WriteMask
& TGSI_WRITEMASK_Y
) || src
.SwizzleY
== TGSI_SWIZZLE_Y
) &&
646 (!(dst
.WriteMask
& TGSI_WRITEMASK_Z
) || src
.SwizzleZ
== TGSI_SWIZZLE_Z
) &&
647 (!(dst
.WriteMask
& TGSI_WRITEMASK_W
) || src
.SwizzleW
== TGSI_SWIZZLE_W
);
650 /* Pass -- optimize outputs
651 * Mesa tends to generate code like this at the end if their shaders
652 * MOV OUT[1], TEMP[2]
653 * MOV OUT[0], TEMP[0]
654 * MOV OUT[2], TEMP[1]
656 * a) there is only a single assignment to an output register and
657 * b) the temporary is not used after that
658 * Also recognize direct assignment of IN to OUT (passthrough)
661 etna_compile_pass_optimize_outputs(struct etna_compile
*c
)
663 struct tgsi_parse_context ctx
= { };
665 unsigned status
= TGSI_PARSE_OK
;
666 status
= tgsi_parse_init(&ctx
, c
->tokens
);
667 assert(status
== TGSI_PARSE_OK
);
669 while (!tgsi_parse_end_of_tokens(&ctx
)) {
670 tgsi_parse_token(&ctx
);
672 switch (ctx
.FullToken
.Token
.Type
) {
673 case TGSI_TOKEN_TYPE_INSTRUCTION
: {
674 const struct tgsi_full_instruction
*inst
= &ctx
.FullToken
.FullInstruction
;
676 /* iterate over operands */
677 switch (inst
->Instruction
.Opcode
) {
678 case TGSI_OPCODE_MOV
: {
679 /* We are only interested in eliminating MOVs which write to
680 * the shader outputs. Test for this early. */
681 if (inst
->Dst
[0].Register
.File
!= TGSI_FILE_OUTPUT
)
683 /* Elimination of a MOV must have no visible effect on the
684 * resulting shader: this means the MOV must not swizzle or
685 * saturate, and its source must not have the negate or
686 * absolute modifiers. */
687 if (!etna_mov_check_no_swizzle(inst
->Dst
[0].Register
, inst
->Src
[0].Register
) ||
688 inst
->Instruction
.Saturate
|| inst
->Src
[0].Register
.Negate
||
689 inst
->Src
[0].Register
.Absolute
)
692 uint out_idx
= inst
->Dst
[0].Register
.Index
;
693 uint in_idx
= inst
->Src
[0].Register
.Index
;
694 /* assignment of temporary to output --
695 * and the output doesn't yet have a native register assigned
696 * and the last use of the temporary is this instruction
697 * and the MOV does not do a swizzle
699 if (inst
->Src
[0].Register
.File
== TGSI_FILE_TEMPORARY
&&
700 !c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
.valid
&&
701 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].last_use
== inst_idx
) {
702 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
=
703 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].native
;
704 /* prevent temp from being re-used for the rest of the shader */
705 c
->file
[TGSI_FILE_TEMPORARY
].reg
[in_idx
].last_use
= ETNA_MAX_TOKENS
;
706 /* mark this MOV instruction as a no-op */
707 c
->dead_inst
[inst_idx
] = true;
709 /* direct assignment of input to output --
710 * and the input or output doesn't yet have a native register
712 * and the output is only used in this instruction,
713 * allocate a new register, and associate both input and output to
715 * and the MOV does not do a swizzle
717 if (inst
->Src
[0].Register
.File
== TGSI_FILE_INPUT
&&
718 !c
->file
[TGSI_FILE_INPUT
].reg
[in_idx
].native
.valid
&&
719 !c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
.valid
&&
720 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].last_use
== inst_idx
&&
721 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].first_use
== inst_idx
) {
722 c
->file
[TGSI_FILE_OUTPUT
].reg
[out_idx
].native
=
723 c
->file
[TGSI_FILE_INPUT
].reg
[in_idx
].native
=
724 alloc_new_native_reg(c
);
725 /* mark this MOV instruction as a no-op */
726 c
->dead_inst
[inst_idx
] = true;
736 tgsi_parse_free(&ctx
);
739 /* Get a temporary to be used within one TGSI instruction.
740 * The first time that this function is called the temporary will be allocated.
741 * Each call to this function will return the same temporary.
743 static struct etna_native_reg
744 etna_compile_get_inner_temp(struct etna_compile
*c
)
746 int inner_temp
= c
->inner_temps
;
748 if (inner_temp
< ETNA_MAX_INNER_TEMPS
) {
749 if (!c
->inner_temp
[inner_temp
].valid
)
750 c
->inner_temp
[inner_temp
] = alloc_new_native_reg(c
);
752 /* alloc_new_native_reg() handles lack of registers */
755 BUG("Too many inner temporaries (%i) requested in one instruction",
759 return c
->inner_temp
[inner_temp
];
762 static struct etna_inst_dst
763 etna_native_to_dst(struct etna_native_reg native
, unsigned comps
)
765 /* Can only assign to temporaries */
766 assert(native
.valid
&& !native
.is_tex
&& native
.rgroup
== INST_RGROUP_TEMP
);
768 struct etna_inst_dst rv
= {
777 static struct etna_inst_src
778 etna_native_to_src(struct etna_native_reg native
, uint32_t swizzle
)
780 assert(native
.valid
&& !native
.is_tex
);
782 struct etna_inst_src rv
= {
785 .rgroup
= native
.rgroup
,
787 .amode
= INST_AMODE_DIRECT
,
793 static inline struct etna_inst_src
794 negate(struct etna_inst_src src
)
801 static inline struct etna_inst_src
802 absolute(struct etna_inst_src src
)
809 static inline struct etna_inst_src
810 swizzle(struct etna_inst_src src
, unsigned swizzle
)
812 src
.swiz
= inst_swiz_compose(src
.swiz
, swizzle
);
817 /* Emit instruction and append it to program */
819 emit_inst(struct etna_compile
*c
, struct etna_inst
*inst
)
821 assert(c
->inst_ptr
<= ETNA_MAX_INSTRUCTIONS
);
823 /* Check for uniform conflicts (each instruction can only access one
825 * if detected, use an intermediate temporary */
826 unsigned uni_rgroup
= -1;
827 unsigned uni_reg
= -1;
829 for (int src
= 0; src
< ETNA_NUM_SRC
; ++src
) {
830 if (etna_rgroup_is_uniform(inst
->src
[src
].rgroup
)) {
831 if (uni_reg
== -1) { /* first unique uniform used */
832 uni_rgroup
= inst
->src
[src
].rgroup
;
833 uni_reg
= inst
->src
[src
].reg
;
834 } else { /* second or later; check that it is a re-use */
835 if (uni_rgroup
!= inst
->src
[src
].rgroup
||
836 uni_reg
!= inst
->src
[src
].reg
) {
837 DBG_F(ETNA_DBG_COMPILER_MSGS
, "perf warning: instruction that "
838 "accesses different uniforms, "
839 "need to generate extra MOV");
840 struct etna_native_reg inner_temp
= etna_compile_get_inner_temp(c
);
842 /* Generate move instruction to temporary */
843 etna_assemble(&c
->code
[c
->inst_ptr
* 4], &(struct etna_inst
) {
844 .opcode
= INST_OPCODE_MOV
,
845 .dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
| INST_COMPS_Y
|
846 INST_COMPS_Z
| INST_COMPS_W
),
847 .src
[2] = inst
->src
[src
]
852 /* Modify instruction to use temp register instead of uniform */
853 inst
->src
[src
].use
= 1;
854 inst
->src
[src
].rgroup
= INST_RGROUP_TEMP
;
855 inst
->src
[src
].reg
= inner_temp
.id
;
856 inst
->src
[src
].swiz
= INST_SWIZ_IDENTITY
; /* swizzling happens on MOV */
857 inst
->src
[src
].neg
= 0; /* negation happens on MOV */
858 inst
->src
[src
].abs
= 0; /* abs happens on MOV */
859 inst
->src
[src
].amode
= 0; /* amode effects happen on MOV */
865 /* Finally assemble the actual instruction */
866 etna_assemble(&c
->code
[c
->inst_ptr
* 4], inst
);
871 etna_amode(struct tgsi_ind_register indirect
)
873 assert(indirect
.File
== TGSI_FILE_ADDRESS
);
874 assert(indirect
.Index
== 0);
876 switch (indirect
.Swizzle
) {
878 return INST_AMODE_ADD_A_X
;
880 return INST_AMODE_ADD_A_Y
;
882 return INST_AMODE_ADD_A_Z
;
884 return INST_AMODE_ADD_A_W
;
886 assert(!"Invalid swizzle");
890 /* convert destination operand */
891 static struct etna_inst_dst
892 convert_dst(struct etna_compile
*c
, const struct tgsi_full_dst_register
*in
)
894 struct etna_inst_dst rv
= {
896 .comps
= in
->Register
.WriteMask
,
899 if (in
->Register
.File
== TGSI_FILE_ADDRESS
) {
900 assert(in
->Register
.Index
== 0);
901 rv
.reg
= in
->Register
.Index
;
904 rv
= etna_native_to_dst(etna_get_dst_reg(c
, in
->Register
)->native
,
905 in
->Register
.WriteMask
);
908 if (in
->Register
.Indirect
)
909 rv
.amode
= etna_amode(in
->Indirect
);
914 /* convert texture operand */
915 static struct etna_inst_tex
916 convert_tex(struct etna_compile
*c
, const struct tgsi_full_src_register
*in
,
917 const struct tgsi_instruction_texture
*tex
)
919 struct etna_native_reg native_reg
= etna_get_src_reg(c
, in
->Register
)->native
;
920 struct etna_inst_tex rv
= {
921 // XXX .amode (to allow for an array of samplers?)
922 .swiz
= INST_SWIZ_IDENTITY
925 assert(native_reg
.is_tex
&& native_reg
.valid
);
926 rv
.id
= native_reg
.id
;
931 /* convert source operand */
932 static struct etna_inst_src
933 etna_create_src(const struct tgsi_full_src_register
*tgsi
,
934 const struct etna_native_reg
*native
)
936 const struct tgsi_src_register
*reg
= &tgsi
->Register
;
937 struct etna_inst_src rv
= {
939 .swiz
= INST_SWIZ(reg
->SwizzleX
, reg
->SwizzleY
, reg
->SwizzleZ
, reg
->SwizzleW
),
941 .abs
= reg
->Absolute
,
942 .rgroup
= native
->rgroup
,
944 .amode
= INST_AMODE_DIRECT
,
947 assert(native
->valid
&& !native
->is_tex
);
950 rv
.amode
= etna_amode(tgsi
->Indirect
);
955 static struct etna_inst_src
956 etna_mov_src_to_temp(struct etna_compile
*c
, struct etna_inst_src src
,
957 struct etna_native_reg temp
)
959 struct etna_inst mov
= { };
961 mov
.opcode
= INST_OPCODE_MOV
;
963 mov
.dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
964 INST_COMPS_Z
| INST_COMPS_W
);
968 src
.swiz
= INST_SWIZ_IDENTITY
;
969 src
.neg
= src
.abs
= 0;
970 src
.rgroup
= temp
.rgroup
;
976 static struct etna_inst_src
977 etna_mov_src(struct etna_compile
*c
, struct etna_inst_src src
)
979 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
981 return etna_mov_src_to_temp(c
, src
, temp
);
985 etna_src_uniforms_conflict(struct etna_inst_src a
, struct etna_inst_src b
)
987 return etna_rgroup_is_uniform(a
.rgroup
) &&
988 etna_rgroup_is_uniform(b
.rgroup
) &&
989 (a
.rgroup
!= b
.rgroup
|| a
.reg
!= b
.reg
);
992 /* create a new label */
993 static struct etna_compile_label
*
994 alloc_new_label(struct etna_compile
*c
)
996 struct etna_compile_label label
= {
997 .inst_idx
= -1, /* start by point to no specific instruction */
1000 array_insert(c
->labels
, label
);
1002 return &c
->labels
[c
->labels_count
- 1];
1005 /* place label at current instruction pointer */
1007 label_place(struct etna_compile
*c
, struct etna_compile_label
*label
)
1009 label
->inst_idx
= c
->inst_ptr
;
1012 /* mark label use at current instruction.
1013 * target of the label will be filled in in the marked instruction's src2.imm
1015 * as the value becomes known.
1018 label_mark_use(struct etna_compile
*c
, struct etna_compile_label
*label
)
1020 assert(c
->inst_ptr
< ETNA_MAX_INSTRUCTIONS
);
1021 c
->lbl_usage
[c
->inst_ptr
] = label
;
1024 /* walk the frame stack and return first frame with matching type */
1025 static struct etna_compile_frame
*
1026 find_frame(struct etna_compile
*c
, enum etna_compile_frame_type type
)
1028 for (int sp
= c
->frame_sp
; sp
>= 0; sp
--)
1029 if (c
->frame_stack
[sp
].type
== type
)
1030 return &c
->frame_stack
[sp
];
1036 struct instr_translater
{
1037 void (*fxn
)(const struct instr_translater
*t
, struct etna_compile
*c
,
1038 const struct tgsi_full_instruction
*inst
,
1039 struct etna_inst_src
*src
);
1043 /* tgsi src -> etna src swizzle */
1050 trans_instr(const struct instr_translater
*t
, struct etna_compile
*c
,
1051 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1053 const struct tgsi_opcode_info
*info
= tgsi_get_opcode_info(inst
->Instruction
.Opcode
);
1054 struct etna_inst instr
= { };
1056 instr
.opcode
= t
->opc
;
1057 instr
.cond
= t
->cond
;
1058 instr
.sat
= inst
->Instruction
.Saturate
;
1060 assert(info
->num_dst
<= 1);
1062 instr
.dst
= convert_dst(c
, &inst
->Dst
[0]);
1064 assert(info
->num_src
<= ETNA_NUM_SRC
);
1066 for (unsigned i
= 0; i
< info
->num_src
; i
++) {
1067 int swizzle
= t
->src
[i
];
1069 assert(swizzle
!= -1);
1070 instr
.src
[swizzle
] = src
[i
];
1073 emit_inst(c
, &instr
);
1077 trans_min_max(const struct instr_translater
*t
, struct etna_compile
*c
,
1078 const struct tgsi_full_instruction
*inst
,
1079 struct etna_inst_src
*src
)
1081 emit_inst(c
, &(struct etna_inst
) {
1082 .opcode
= INST_OPCODE_SELECT
,
1084 .sat
= inst
->Instruction
.Saturate
,
1085 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1093 trans_if(const struct instr_translater
*t
, struct etna_compile
*c
,
1094 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1096 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
++];
1097 struct etna_inst_src imm_0
= alloc_imm_f32(c
, 0.0f
);
1099 /* push IF to stack */
1100 f
->type
= ETNA_COMPILE_FRAME_IF
;
1101 /* create "else" label */
1102 f
->lbl_else
= alloc_new_label(c
);
1103 f
->lbl_endif
= NULL
;
1105 /* We need to avoid the emit_inst() below becoming two instructions */
1106 if (etna_src_uniforms_conflict(src
[0], imm_0
))
1107 src
[0] = etna_mov_src(c
, src
[0]);
1109 /* mark position in instruction stream of label reference so that it can be
1110 * filled in in next pass */
1111 label_mark_use(c
, f
->lbl_else
);
1113 /* create conditional branch to label if src0 EQ 0 */
1114 emit_inst(c
, &(struct etna_inst
){
1115 .opcode
= INST_OPCODE_BRANCH
,
1116 .cond
= INST_CONDITION_EQ
,
1119 /* imm is filled in later */
1124 trans_else(const struct instr_translater
*t
, struct etna_compile
*c
,
1125 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1127 assert(c
->frame_sp
> 0);
1128 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
- 1];
1129 assert(f
->type
== ETNA_COMPILE_FRAME_IF
);
1131 /* create "endif" label, and branch to endif label */
1132 f
->lbl_endif
= alloc_new_label(c
);
1133 label_mark_use(c
, f
->lbl_endif
);
1134 emit_inst(c
, &(struct etna_inst
) {
1135 .opcode
= INST_OPCODE_BRANCH
,
1136 .cond
= INST_CONDITION_TRUE
,
1137 /* imm is filled in later */
1140 /* mark "else" label at this position in instruction stream */
1141 label_place(c
, f
->lbl_else
);
1145 trans_endif(const struct instr_translater
*t
, struct etna_compile
*c
,
1146 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1148 assert(c
->frame_sp
> 0);
1149 struct etna_compile_frame
*f
= &c
->frame_stack
[--c
->frame_sp
];
1150 assert(f
->type
== ETNA_COMPILE_FRAME_IF
);
1152 /* assign "endif" or "else" (if no ELSE) label to current position in
1153 * instruction stream, pop IF */
1154 if (f
->lbl_endif
!= NULL
)
1155 label_place(c
, f
->lbl_endif
);
1157 label_place(c
, f
->lbl_else
);
1161 trans_loop_bgn(const struct instr_translater
*t
, struct etna_compile
*c
,
1162 const struct tgsi_full_instruction
*inst
,
1163 struct etna_inst_src
*src
)
1165 struct etna_compile_frame
*f
= &c
->frame_stack
[c
->frame_sp
++];
1167 /* push LOOP to stack */
1168 f
->type
= ETNA_COMPILE_FRAME_LOOP
;
1169 f
->lbl_loop_bgn
= alloc_new_label(c
);
1170 f
->lbl_loop_end
= alloc_new_label(c
);
1172 label_place(c
, f
->lbl_loop_bgn
);
1178 trans_loop_end(const struct instr_translater
*t
, struct etna_compile
*c
,
1179 const struct tgsi_full_instruction
*inst
,
1180 struct etna_inst_src
*src
)
1182 assert(c
->frame_sp
> 0);
1183 struct etna_compile_frame
*f
= &c
->frame_stack
[--c
->frame_sp
];
1184 assert(f
->type
== ETNA_COMPILE_FRAME_LOOP
);
1186 /* mark position in instruction stream of label reference so that it can be
1187 * filled in in next pass */
1188 label_mark_use(c
, f
->lbl_loop_bgn
);
1190 /* create branch to loop_bgn label */
1191 emit_inst(c
, &(struct etna_inst
) {
1192 .opcode
= INST_OPCODE_BRANCH
,
1193 .cond
= INST_CONDITION_TRUE
,
1195 /* imm is filled in later */
1198 label_place(c
, f
->lbl_loop_end
);
1202 trans_brk(const struct instr_translater
*t
, struct etna_compile
*c
,
1203 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1205 assert(c
->frame_sp
> 0);
1206 struct etna_compile_frame
*f
= find_frame(c
, ETNA_COMPILE_FRAME_LOOP
);
1208 /* mark position in instruction stream of label reference so that it can be
1209 * filled in in next pass */
1210 label_mark_use(c
, f
->lbl_loop_end
);
1212 /* create branch to loop_end label */
1213 emit_inst(c
, &(struct etna_inst
) {
1214 .opcode
= INST_OPCODE_BRANCH
,
1215 .cond
= INST_CONDITION_TRUE
,
1217 /* imm is filled in later */
1222 trans_cont(const struct instr_translater
*t
, struct etna_compile
*c
,
1223 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1225 assert(c
->frame_sp
> 0);
1226 struct etna_compile_frame
*f
= find_frame(c
, ETNA_COMPILE_FRAME_LOOP
);
1228 /* mark position in instruction stream of label reference so that it can be
1229 * filled in in next pass */
1230 label_mark_use(c
, f
->lbl_loop_bgn
);
1232 /* create branch to loop_end label */
1233 emit_inst(c
, &(struct etna_inst
) {
1234 .opcode
= INST_OPCODE_BRANCH
,
1235 .cond
= INST_CONDITION_TRUE
,
1237 /* imm is filled in later */
1242 trans_deriv(const struct instr_translater
*t
, struct etna_compile
*c
,
1243 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1245 emit_inst(c
, &(struct etna_inst
) {
1247 .sat
= inst
->Instruction
.Saturate
,
1248 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1255 trans_arl(const struct instr_translater
*t
, struct etna_compile
*c
,
1256 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1258 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1259 struct etna_inst arl
= { };
1260 struct etna_inst_dst dst
;
1262 dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
| INST_COMPS_Z
|
1265 if (c
->specs
->has_sign_floor_ceil
) {
1266 struct etna_inst floor
= { };
1268 floor
.opcode
= INST_OPCODE_FLOOR
;
1269 floor
.src
[2] = src
[0];
1272 emit_inst(c
, &floor
);
1274 struct etna_inst floor
[2] = { };
1276 floor
[0].opcode
= INST_OPCODE_FRC
;
1277 floor
[0].sat
= inst
->Instruction
.Saturate
;
1279 floor
[0].src
[2] = src
[0];
1281 floor
[1].opcode
= INST_OPCODE_ADD
;
1282 floor
[1].sat
= inst
->Instruction
.Saturate
;
1284 floor
[1].src
[0] = src
[0];
1285 floor
[1].src
[2].use
= 1;
1286 floor
[1].src
[2].swiz
= INST_SWIZ_IDENTITY
;
1287 floor
[1].src
[2].neg
= 1;
1288 floor
[1].src
[2].rgroup
= temp
.rgroup
;
1289 floor
[1].src
[2].reg
= temp
.id
;
1291 emit_inst(c
, &floor
[0]);
1292 emit_inst(c
, &floor
[1]);
1295 arl
.opcode
= INST_OPCODE_MOVAR
;
1296 arl
.sat
= inst
->Instruction
.Saturate
;
1297 arl
.dst
= convert_dst(c
, &inst
->Dst
[0]);
1298 arl
.src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1304 trans_lrp(const struct instr_translater
*t
, struct etna_compile
*c
,
1305 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1307 /* dst = src0 * src1 + (1 - src0) * src2
1308 * => src0 * src1 - (src0 - 1) * src2
1309 * => src0 * src1 - (src0 * src2 - src2)
1310 * MAD tTEMP.xyzw, tSRC0.xyzw, tSRC2.xyzw, -tSRC2.xyzw
1311 * MAD tDST.xyzw, tSRC0.xyzw, tSRC1.xyzw, -tTEMP.xyzw
1313 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1314 if (etna_src_uniforms_conflict(src
[0], src
[1]) ||
1315 etna_src_uniforms_conflict(src
[0], src
[2])) {
1316 src
[0] = etna_mov_src(c
, src
[0]);
1319 struct etna_inst mad
[2] = { };
1320 mad
[0].opcode
= INST_OPCODE_MAD
;
1322 mad
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1323 INST_COMPS_Z
| INST_COMPS_W
);
1324 mad
[0].src
[0] = src
[0];
1325 mad
[0].src
[1] = src
[2];
1326 mad
[0].src
[2] = negate(src
[2]);
1327 mad
[1].opcode
= INST_OPCODE_MAD
;
1328 mad
[1].sat
= inst
->Instruction
.Saturate
;
1329 mad
[1].dst
= convert_dst(c
, &inst
->Dst
[0]), mad
[1].src
[0] = src
[0];
1330 mad
[1].src
[1] = src
[1];
1331 mad
[1].src
[2] = negate(etna_native_to_src(temp
, INST_SWIZ_IDENTITY
));
1333 emit_inst(c
, &mad
[0]);
1334 emit_inst(c
, &mad
[1]);
1338 trans_lit(const struct instr_translater
*t
, struct etna_compile
*c
,
1339 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1341 /* SELECT.LT tmp._y__, 0, src.yyyy, 0
1342 * - can be eliminated if src.y is a uniform and >= 0
1343 * SELECT.GT tmp.___w, 128, src.wwww, 128
1344 * SELECT.LT tmp.___w, -128, tmp.wwww, -128
1345 * - can be eliminated if src.w is a uniform and fits clamp
1346 * LOG tmp.x, void, void, tmp.yyyy
1347 * MUL tmp.x, tmp.xxxx, tmp.wwww, void
1348 * LITP dst, undef, src.xxxx, tmp.xxxx
1350 struct etna_native_reg inner_temp
= etna_compile_get_inner_temp(c
);
1351 struct etna_inst_src src_y
= { };
1353 if (!etna_rgroup_is_uniform(src
[0].rgroup
)) {
1354 src_y
= etna_native_to_src(inner_temp
, SWIZZLE(Y
, Y
, Y
, Y
));
1356 struct etna_inst ins
= { };
1357 ins
.opcode
= INST_OPCODE_SELECT
;
1358 ins
.cond
= INST_CONDITION_LT
;
1359 ins
.dst
= etna_native_to_dst(inner_temp
, INST_COMPS_Y
);
1360 ins
.src
[0] = ins
.src
[2] = alloc_imm_f32(c
, 0.0);
1361 ins
.src
[1] = swizzle(src
[0], SWIZZLE(Y
, Y
, Y
, Y
));
1363 } else if (uif(get_imm_u32(c
, &src
[0], 1)) < 0)
1364 src_y
= alloc_imm_f32(c
, 0.0);
1366 src_y
= swizzle(src
[0], SWIZZLE(Y
, Y
, Y
, Y
));
1368 struct etna_inst_src src_w
= { };
1370 if (!etna_rgroup_is_uniform(src
[0].rgroup
)) {
1371 src_w
= etna_native_to_src(inner_temp
, SWIZZLE(W
, W
, W
, W
));
1373 struct etna_inst ins
= { };
1374 ins
.opcode
= INST_OPCODE_SELECT
;
1375 ins
.cond
= INST_CONDITION_GT
;
1376 ins
.dst
= etna_native_to_dst(inner_temp
, INST_COMPS_W
);
1377 ins
.src
[0] = ins
.src
[2] = alloc_imm_f32(c
, 128.);
1378 ins
.src
[1] = swizzle(src
[0], SWIZZLE(W
, W
, W
, W
));
1380 ins
.cond
= INST_CONDITION_LT
;
1381 ins
.src
[0].neg
= !ins
.src
[0].neg
;
1382 ins
.src
[2].neg
= !ins
.src
[2].neg
;
1385 } else if (uif(get_imm_u32(c
, &src
[0], 3)) < -128.)
1386 src_w
= alloc_imm_f32(c
, -128.);
1387 else if (uif(get_imm_u32(c
, &src
[0], 3)) > 128.)
1388 src_w
= alloc_imm_f32(c
, 128.);
1390 src_w
= swizzle(src
[0], SWIZZLE(W
, W
, W
, W
));
1392 struct etna_inst ins
[3] = { };
1393 ins
[0].opcode
= INST_OPCODE_LOG
;
1394 ins
[0].dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
);
1395 ins
[0].src
[2] = src_y
;
1397 emit_inst(c
, &ins
[0]);
1398 emit_inst(c
, &(struct etna_inst
) {
1399 .opcode
= INST_OPCODE_MUL
,
1401 .dst
= etna_native_to_dst(inner_temp
, INST_COMPS_X
),
1402 .src
[0] = etna_native_to_src(inner_temp
, SWIZZLE(X
, X
, X
, X
)),
1405 emit_inst(c
, &(struct etna_inst
) {
1406 .opcode
= INST_OPCODE_LITP
,
1408 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1409 .src
[0] = swizzle(src
[0], SWIZZLE(X
, X
, X
, X
)),
1410 .src
[1] = swizzle(src
[0], SWIZZLE(X
, X
, X
, X
)),
1411 .src
[2] = etna_native_to_src(inner_temp
, SWIZZLE(X
, X
, X
, X
)),
1416 trans_ssg(const struct instr_translater
*t
, struct etna_compile
*c
,
1417 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1419 if (c
->specs
->has_sign_floor_ceil
) {
1420 emit_inst(c
, &(struct etna_inst
){
1421 .opcode
= INST_OPCODE_SIGN
,
1422 .sat
= inst
->Instruction
.Saturate
,
1423 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1427 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1428 struct etna_inst ins
[2] = { };
1430 ins
[0].opcode
= INST_OPCODE_SET
;
1431 ins
[0].cond
= INST_CONDITION_NZ
;
1432 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1433 INST_COMPS_Z
| INST_COMPS_W
);
1434 ins
[0].src
[0] = src
[0];
1436 ins
[1].opcode
= INST_OPCODE_SELECT
;
1437 ins
[1].cond
= INST_CONDITION_LZ
;
1438 ins
[1].sat
= inst
->Instruction
.Saturate
;
1439 ins
[1].dst
= convert_dst(c
, &inst
->Dst
[0]);
1440 ins
[1].src
[0] = src
[0];
1441 ins
[1].src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1442 ins
[1].src
[1] = negate(ins
[1].src
[2]);
1444 emit_inst(c
, &ins
[0]);
1445 emit_inst(c
, &ins
[1]);
1450 trans_trig(const struct instr_translater
*t
, struct etna_compile
*c
,
1451 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1453 if (c
->specs
->has_new_sin_cos
) { /* Alternative SIN/COS */
1454 /* On newer chips alternative SIN/COS instructions are implemented,
1456 * - Need their input scaled by 1/pi instead of 2/pi
1457 * - Output an x and y component, which need to be multiplied to
1460 /* TGSI lowering should deal with SCS */
1461 assert(inst
->Instruction
.Opcode
!= TGSI_OPCODE_SCS
);
1463 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
); /* only using .xyz */
1464 emit_inst(c
, &(struct etna_inst
) {
1465 .opcode
= INST_OPCODE_MUL
,
1467 .dst
= etna_native_to_dst(temp
, INST_COMPS_Z
),
1468 .src
[0] = src
[0], /* any swizzling happens here */
1469 .src
[1] = alloc_imm_f32(c
, 1.0f
/ M_PI
),
1471 emit_inst(c
, &(struct etna_inst
) {
1472 .opcode
= inst
->Instruction
.Opcode
== TGSI_OPCODE_COS
1476 .dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
),
1477 .src
[2] = etna_native_to_src(temp
, SWIZZLE(Z
, Z
, Z
, Z
)),
1478 .tex
= { .amode
=1 }, /* Unknown bit needs to be set */
1480 emit_inst(c
, &(struct etna_inst
) {
1481 .opcode
= INST_OPCODE_MUL
,
1482 .sat
= inst
->Instruction
.Saturate
,
1483 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1484 .src
[0] = etna_native_to_src(temp
, SWIZZLE(X
, X
, X
, X
)),
1485 .src
[1] = etna_native_to_src(temp
, SWIZZLE(Y
, Y
, Y
, Y
)),
1488 } else if (c
->specs
->has_sin_cos_sqrt
) {
1489 /* TGSI lowering should deal with SCS */
1490 assert(inst
->Instruction
.Opcode
!= TGSI_OPCODE_SCS
);
1492 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1493 /* add divide by PI/2, using a temp register. GC2000
1494 * fails with src==dst for the trig instruction. */
1495 emit_inst(c
, &(struct etna_inst
) {
1496 .opcode
= INST_OPCODE_MUL
,
1498 .dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1499 INST_COMPS_Z
| INST_COMPS_W
),
1500 .src
[0] = src
[0], /* any swizzling happens here */
1501 .src
[1] = alloc_imm_f32(c
, 2.0f
/ M_PI
),
1503 emit_inst(c
, &(struct etna_inst
) {
1504 .opcode
= inst
->Instruction
.Opcode
== TGSI_OPCODE_COS
1507 .sat
= inst
->Instruction
.Saturate
,
1508 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1509 .src
[2] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
),
1512 /* Implement Nick's fast sine/cosine. Taken from:
1513 * http://forum.devmaster.net/t/fast-and-accurate-sine-cosine/9648
1514 * A=(1/2*PI 0 1/2*PI 0) B=(0.75 0 0.5 0) C=(-4 4 X X)
1515 * MAD t.x_zw, src.xxxx, A, B
1516 * FRC t.x_z_, void, void, t.xwzw
1517 * MAD t.x_z_, t.xwzw, 2, -1
1518 * MUL t._y__, t.wzww, |t.wzww|, void (for sin/scs)
1519 * DP3 t.x_z_, t.zyww, C, void (for sin)
1520 * DP3 t.__z_, t.zyww, C, void (for scs)
1521 * MUL t._y__, t.wxww, |t.wxww|, void (for cos/scs)
1522 * DP3 t.x_z_, t.xyww, C, void (for cos)
1523 * DP3 t.x___, t.xyww, C, void (for scs)
1524 * MAD t._y_w, t,xxzz, |t.xxzz|, -t.xxzz
1525 * MAD dst, t.ywyw, .2225, t.xzxz
1527 * TODO: we don't set dst.zw correctly for SCS.
1529 struct etna_inst
*p
, ins
[9] = { };
1530 struct etna_native_reg t0
= etna_compile_get_inner_temp(c
);
1531 struct etna_inst_src t0s
= etna_native_to_src(t0
, INST_SWIZ_IDENTITY
);
1532 struct etna_inst_src sincos
[3], in
= src
[0];
1533 sincos
[0] = etna_imm_vec4f(c
, sincos_const
[0]);
1534 sincos
[1] = etna_imm_vec4f(c
, sincos_const
[1]);
1536 /* A uniform source will cause the inner temp limit to
1537 * be exceeded. Explicitly deal with that scenario.
1539 if (etna_rgroup_is_uniform(src
[0].rgroup
)) {
1540 struct etna_inst ins
= { };
1541 ins
.opcode
= INST_OPCODE_MOV
;
1542 ins
.dst
= etna_native_to_dst(t0
, INST_COMPS_X
);
1548 ins
[0].opcode
= INST_OPCODE_MAD
;
1549 ins
[0].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
| INST_COMPS_W
);
1550 ins
[0].src
[0] = swizzle(in
, SWIZZLE(X
, X
, X
, X
));
1551 ins
[0].src
[1] = swizzle(sincos
[1], SWIZZLE(X
, W
, X
, W
)); /* 1/2*PI */
1552 ins
[0].src
[2] = swizzle(sincos
[1], SWIZZLE(Y
, W
, Z
, W
)); /* 0.75, 0, 0.5, 0 */
1554 ins
[1].opcode
= INST_OPCODE_FRC
;
1555 ins
[1].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1556 ins
[1].src
[2] = swizzle(t0s
, SWIZZLE(X
, W
, Z
, W
));
1558 ins
[2].opcode
= INST_OPCODE_MAD
;
1559 ins
[2].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1560 ins
[2].src
[0] = swizzle(t0s
, SWIZZLE(X
, W
, Z
, W
));
1561 ins
[2].src
[1] = swizzle(sincos
[0], SWIZZLE(X
, X
, X
, X
)); /* 2 */
1562 ins
[2].src
[2] = swizzle(sincos
[0], SWIZZLE(Y
, Y
, Y
, Y
)); /* -1 */
1564 unsigned mul_swiz
, dp3_swiz
;
1565 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SIN
) {
1566 mul_swiz
= SWIZZLE(W
, Z
, W
, W
);
1567 dp3_swiz
= SWIZZLE(Z
, Y
, W
, W
);
1569 mul_swiz
= SWIZZLE(W
, X
, W
, W
);
1570 dp3_swiz
= SWIZZLE(X
, Y
, W
, W
);
1573 ins
[3].opcode
= INST_OPCODE_MUL
;
1574 ins
[3].dst
= etna_native_to_dst(t0
, INST_COMPS_Y
);
1575 ins
[3].src
[0] = swizzle(t0s
, mul_swiz
);
1576 ins
[3].src
[1] = absolute(ins
[3].src
[0]);
1578 ins
[4].opcode
= INST_OPCODE_DP3
;
1579 ins
[4].dst
= etna_native_to_dst(t0
, INST_COMPS_X
| INST_COMPS_Z
);
1580 ins
[4].src
[0] = swizzle(t0s
, dp3_swiz
);
1581 ins
[4].src
[1] = swizzle(sincos
[0], SWIZZLE(Z
, W
, W
, W
));
1583 if (inst
->Instruction
.Opcode
== TGSI_OPCODE_SCS
) {
1586 ins
[4].dst
.comps
= INST_COMPS_X
;
1587 ins
[6].dst
.comps
= INST_COMPS_Z
;
1588 ins
[5].src
[0] = swizzle(t0s
, SWIZZLE(W
, Z
, W
, W
));
1589 ins
[6].src
[0] = swizzle(t0s
, SWIZZLE(Z
, Y
, W
, W
));
1590 ins
[5].src
[1] = absolute(ins
[5].src
[0]);
1596 p
->opcode
= INST_OPCODE_MAD
;
1597 p
->dst
= etna_native_to_dst(t0
, INST_COMPS_Y
| INST_COMPS_W
);
1598 p
->src
[0] = swizzle(t0s
, SWIZZLE(X
, X
, Z
, Z
));
1599 p
->src
[1] = absolute(p
->src
[0]);
1600 p
->src
[2] = negate(p
->src
[0]);
1603 p
->opcode
= INST_OPCODE_MAD
;
1604 p
->sat
= inst
->Instruction
.Saturate
;
1605 p
->dst
= convert_dst(c
, &inst
->Dst
[0]),
1606 p
->src
[0] = swizzle(t0s
, SWIZZLE(Y
, W
, Y
, W
));
1607 p
->src
[1] = alloc_imm_f32(c
, 0.2225);
1608 p
->src
[2] = swizzle(t0s
, SWIZZLE(X
, Z
, X
, Z
));
1610 for (int i
= 0; &ins
[i
] <= p
; i
++)
1611 emit_inst(c
, &ins
[i
]);
1616 trans_dph(const struct instr_translater
*t
, struct etna_compile
*c
,
1617 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1620 DP3 tmp.xyzw, src0.xyzw, src1,xyzw, void
1621 ADD dst.xyzw, tmp.xyzw, void, src1.wwww
1623 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1624 struct etna_inst ins
[2] = { };
1626 ins
[0].opcode
= INST_OPCODE_DP3
;
1627 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1628 INST_COMPS_Z
| INST_COMPS_W
);
1629 ins
[0].src
[0] = src
[0];
1630 ins
[0].src
[1] = src
[1];
1632 ins
[1].opcode
= INST_OPCODE_ADD
;
1633 ins
[1].sat
= inst
->Instruction
.Saturate
;
1634 ins
[1].dst
= convert_dst(c
, &inst
->Dst
[0]);
1635 ins
[1].src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
);
1636 ins
[1].src
[2] = swizzle(src
[1], SWIZZLE(W
, W
, W
, W
));
1638 emit_inst(c
, &ins
[0]);
1639 emit_inst(c
, &ins
[1]);
1643 trans_sampler(const struct instr_translater
*t
, struct etna_compile
*c
,
1644 const struct tgsi_full_instruction
*inst
,
1645 struct etna_inst_src
*src
)
1647 /* There is no native support for GL texture rectangle coordinates, so
1648 * we have to rescale from ([0, width], [0, height]) to ([0, 1], [0, 1]). */
1649 if (inst
->Texture
.Texture
== TGSI_TEXTURE_RECT
) {
1650 uint32_t unit
= inst
->Src
[1].Register
.Index
;
1651 struct etna_inst ins
[2] = { };
1652 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1654 ins
[0].opcode
= INST_OPCODE_MUL
;
1655 ins
[0].dst
= etna_native_to_dst(temp
, INST_COMPS_X
);
1656 ins
[0].src
[0] = src
[0];
1657 ins
[0].src
[1] = alloc_imm(c
, ETNA_IMMEDIATE_TEXRECT_SCALE_X
, unit
);
1659 ins
[1].opcode
= INST_OPCODE_MUL
;
1660 ins
[1].dst
= etna_native_to_dst(temp
, INST_COMPS_Y
);
1661 ins
[1].src
[0] = src
[0];
1662 ins
[1].src
[1] = alloc_imm(c
, ETNA_IMMEDIATE_TEXRECT_SCALE_Y
, unit
);
1664 emit_inst(c
, &ins
[0]);
1665 emit_inst(c
, &ins
[1]);
1667 src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
); /* temp.xyzw */
1670 switch (inst
->Instruction
.Opcode
) {
1671 case TGSI_OPCODE_TEX
:
1672 emit_inst(c
, &(struct etna_inst
) {
1673 .opcode
= INST_OPCODE_TEXLD
,
1675 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1676 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1681 case TGSI_OPCODE_TXB
:
1682 emit_inst(c
, &(struct etna_inst
) {
1683 .opcode
= INST_OPCODE_TEXLDB
,
1685 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1686 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1691 case TGSI_OPCODE_TXL
:
1692 emit_inst(c
, &(struct etna_inst
) {
1693 .opcode
= INST_OPCODE_TEXLDL
,
1695 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1696 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1701 case TGSI_OPCODE_TXP
: { /* divide src.xyz by src.w */
1702 struct etna_native_reg temp
= etna_compile_get_inner_temp(c
);
1704 emit_inst(c
, &(struct etna_inst
) {
1705 .opcode
= INST_OPCODE_RCP
,
1707 .dst
= etna_native_to_dst(temp
, INST_COMPS_W
), /* tmp.w */
1708 .src
[2] = swizzle(src
[0], SWIZZLE(W
, W
, W
, W
)),
1710 emit_inst(c
, &(struct etna_inst
) {
1711 .opcode
= INST_OPCODE_MUL
,
1713 .dst
= etna_native_to_dst(temp
, INST_COMPS_X
| INST_COMPS_Y
|
1714 INST_COMPS_Z
), /* tmp.xyz */
1715 .src
[0] = etna_native_to_src(temp
, SWIZZLE(W
, W
, W
, W
)),
1716 .src
[1] = src
[0], /* src.xyzw */
1718 emit_inst(c
, &(struct etna_inst
) {
1719 .opcode
= INST_OPCODE_TEXLD
,
1721 .dst
= convert_dst(c
, &inst
->Dst
[0]),
1722 .tex
= convert_tex(c
, &inst
->Src
[1], &inst
->Texture
),
1723 .src
[0] = etna_native_to_src(temp
, INST_SWIZ_IDENTITY
), /* tmp.xyzw */
1728 BUG("Unhandled instruction %s",
1729 tgsi_get_opcode_name(inst
->Instruction
.Opcode
));
1736 trans_dummy(const struct instr_translater
*t
, struct etna_compile
*c
,
1737 const struct tgsi_full_instruction
*inst
, struct etna_inst_src
*src
)
1742 static const struct instr_translater translaters
[TGSI_OPCODE_LAST
] = {
1743 #define INSTR(n, f, ...) \
1744 [TGSI_OPCODE_##n] = {.fxn = (f), .tgsi_opc = TGSI_OPCODE_##n, ##__VA_ARGS__}
1746 INSTR(MOV
, trans_instr
, .opc
= INST_OPCODE_MOV
, .src
= {2, -1, -1}),
1747 INSTR(RCP
, trans_instr
, .opc
= INST_OPCODE_RCP
, .src
= {2, -1, -1}),
1748 INSTR(RSQ
, trans_instr
, .opc
= INST_OPCODE_RSQ
, .src
= {2, -1, -1}),
1749 INSTR(MUL
, trans_instr
, .opc
= INST_OPCODE_MUL
, .src
= {0, 1, -1}),
1750 INSTR(ADD
, trans_instr
, .opc
= INST_OPCODE_ADD
, .src
= {0, 2, -1}),
1751 INSTR(DP3
, trans_instr
, .opc
= INST_OPCODE_DP3
, .src
= {0, 1, -1}),
1752 INSTR(DP4
, trans_instr
, .opc
= INST_OPCODE_DP4
, .src
= {0, 1, -1}),
1753 INSTR(DST
, trans_instr
, .opc
= INST_OPCODE_DST
, .src
= {0, 1, -1}),
1754 INSTR(MAD
, trans_instr
, .opc
= INST_OPCODE_MAD
, .src
= {0, 1, 2}),
1755 INSTR(EX2
, trans_instr
, .opc
= INST_OPCODE_EXP
, .src
= {2, -1, -1}),
1756 INSTR(LG2
, trans_instr
, .opc
= INST_OPCODE_LOG
, .src
= {2, -1, -1}),
1757 INSTR(SQRT
, trans_instr
, .opc
= INST_OPCODE_SQRT
, .src
= {2, -1, -1}),
1758 INSTR(FRC
, trans_instr
, .opc
= INST_OPCODE_FRC
, .src
= {2, -1, -1}),
1759 INSTR(CEIL
, trans_instr
, .opc
= INST_OPCODE_CEIL
, .src
= {2, -1, -1}),
1760 INSTR(FLR
, trans_instr
, .opc
= INST_OPCODE_FLOOR
, .src
= {2, -1, -1}),
1761 INSTR(CMP
, trans_instr
, .opc
= INST_OPCODE_SELECT
, .src
= {0, 1, 2}, .cond
= INST_CONDITION_LZ
),
1763 INSTR(KILL
, trans_instr
, .opc
= INST_OPCODE_TEXKILL
),
1764 INSTR(KILL_IF
, trans_instr
, .opc
= INST_OPCODE_TEXKILL
, .src
= {0, -1, -1}, .cond
= INST_CONDITION_LZ
),
1766 INSTR(DDX
, trans_deriv
, .opc
= INST_OPCODE_DSX
),
1767 INSTR(DDY
, trans_deriv
, .opc
= INST_OPCODE_DSY
),
1769 INSTR(IF
, trans_if
),
1770 INSTR(ELSE
, trans_else
),
1771 INSTR(ENDIF
, trans_endif
),
1773 INSTR(BGNLOOP
, trans_loop_bgn
),
1774 INSTR(ENDLOOP
, trans_loop_end
),
1775 INSTR(BRK
, trans_brk
),
1776 INSTR(CONT
, trans_cont
),
1778 INSTR(MIN
, trans_min_max
, .opc
= INST_OPCODE_SELECT
, .cond
= INST_CONDITION_GT
),
1779 INSTR(MAX
, trans_min_max
, .opc
= INST_OPCODE_SELECT
, .cond
= INST_CONDITION_LT
),
1781 INSTR(ARL
, trans_arl
),
1782 INSTR(LRP
, trans_lrp
),
1783 INSTR(LIT
, trans_lit
),
1784 INSTR(SSG
, trans_ssg
),
1785 INSTR(DPH
, trans_dph
),
1787 INSTR(SIN
, trans_trig
),
1788 INSTR(COS
, trans_trig
),
1789 INSTR(SCS
, trans_trig
),
1791 INSTR(SLT
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_LT
),
1792 INSTR(SGE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_GE
),
1793 INSTR(SEQ
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_EQ
),
1794 INSTR(SGT
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_GT
),
1795 INSTR(SLE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_LE
),
1796 INSTR(SNE
, trans_instr
, .opc
= INST_OPCODE_SET
, .src
= {0, 1, -1}, .cond
= INST_CONDITION_NE
),
1798 INSTR(TEX
, trans_sampler
),
1799 INSTR(TXB
, trans_sampler
),
1800 INSTR(TXL
, trans_sampler
),
1801 INSTR(TXP
, trans_sampler
),
1803 INSTR(NOP
, trans_dummy
),
1804 INSTR(END
, trans_dummy
),
1807 /* Pass -- compile instructions */
1809 etna_compile_pass_generate_code(struct etna_compile
*c
)
1811 struct tgsi_parse_context ctx
= { };
1812 unsigned status
= tgsi_parse_init(&ctx
, c
->tokens
);
1813 assert(status
== TGSI_PARSE_OK
);
1816 while (!tgsi_parse_end_of_tokens(&ctx
)) {
1817 const struct tgsi_full_instruction
*inst
= 0;
1819 /* No inner temps used yet for this instruction, clear counter */
1822 tgsi_parse_token(&ctx
);
1824 switch (ctx
.FullToken
.Token
.Type
) {
1825 case TGSI_TOKEN_TYPE_INSTRUCTION
:
1826 /* iterate over operands */
1827 inst
= &ctx
.FullToken
.FullInstruction
;
1828 if (c
->dead_inst
[inst_idx
]) { /* skip dead instructions */
1833 /* Lookup the TGSI information and generate the source arguments */
1834 struct etna_inst_src src
[ETNA_NUM_SRC
];
1835 memset(src
, 0, sizeof(src
));
1837 const struct tgsi_opcode_info
*tgsi
= tgsi_get_opcode_info(inst
->Instruction
.Opcode
);
1839 for (int i
= 0; i
< tgsi
->num_src
&& i
< ETNA_NUM_SRC
; i
++) {
1840 const struct tgsi_full_src_register
*reg
= &inst
->Src
[i
];
1841 const struct etna_native_reg
*n
= &etna_get_src_reg(c
, reg
->Register
)->native
;
1843 if (!n
->valid
|| n
->is_tex
)
1846 src
[i
] = etna_create_src(reg
, n
);
1849 const unsigned opc
= inst
->Instruction
.Opcode
;
1850 const struct instr_translater
*t
= &translaters
[opc
];
1853 t
->fxn(t
, c
, inst
, src
);
1857 BUG("Unhandled instruction %s", tgsi_get_opcode_name(opc
));
1863 tgsi_parse_free(&ctx
);
1866 /* Look up register by semantic */
1867 static struct etna_reg_desc
*
1868 find_decl_by_semantic(struct etna_compile
*c
, uint file
, uint name
, uint index
)
1870 for (int idx
= 0; idx
< c
->file
[file
].reg_size
; ++idx
) {
1871 struct etna_reg_desc
*reg
= &c
->file
[file
].reg
[idx
];
1873 if (reg
->semantic
.Name
== name
&& reg
->semantic
.Index
== index
)
1877 return NULL
; /* not found */
1880 /** Add ADD and MUL instruction to bring Z/W to 0..1 if -1..1 if needed:
1881 * - this is a vertex shader
1882 * - and this is an older GPU
1885 etna_compile_add_z_div_if_needed(struct etna_compile
*c
)
1887 if (c
->info
.processor
== PIPE_SHADER_VERTEX
&& c
->specs
->vs_need_z_div
) {
1888 /* find position out */
1889 struct etna_reg_desc
*pos_reg
=
1890 find_decl_by_semantic(c
, TGSI_FILE_OUTPUT
, TGSI_SEMANTIC_POSITION
, 0);
1892 if (pos_reg
!= NULL
) {
1894 * ADD tX.__z_, tX.zzzz, void, tX.wwww
1895 * MUL tX.__z_, tX.zzzz, 0.5, void
1897 emit_inst(c
, &(struct etna_inst
) {
1898 .opcode
= INST_OPCODE_ADD
,
1899 .dst
= etna_native_to_dst(pos_reg
->native
, INST_COMPS_Z
),
1900 .src
[0] = etna_native_to_src(pos_reg
->native
, SWIZZLE(Z
, Z
, Z
, Z
)),
1901 .src
[2] = etna_native_to_src(pos_reg
->native
, SWIZZLE(W
, W
, W
, W
)),
1903 emit_inst(c
, &(struct etna_inst
) {
1904 .opcode
= INST_OPCODE_MUL
,
1905 .dst
= etna_native_to_dst(pos_reg
->native
, INST_COMPS_Z
),
1906 .src
[0] = etna_native_to_src(pos_reg
->native
, SWIZZLE(Z
, Z
, Z
, Z
)),
1907 .src
[1] = alloc_imm_f32(c
, 0.5f
),
1914 etna_compile_frag_rb_swap(struct etna_compile
*c
)
1916 if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
&& c
->key
->frag_rb_swap
) {
1917 /* find color out */
1918 struct etna_reg_desc
*color_reg
=
1919 find_decl_by_semantic(c
, TGSI_FILE_OUTPUT
, TGSI_SEMANTIC_COLOR
, 0);
1921 emit_inst(c
, &(struct etna_inst
) {
1922 .opcode
= INST_OPCODE_MOV
,
1923 .dst
= etna_native_to_dst(color_reg
->native
, INST_COMPS_X
| INST_COMPS_Y
| INST_COMPS_Z
| INST_COMPS_W
),
1924 .src
[2] = etna_native_to_src(color_reg
->native
, SWIZZLE(Z
, Y
, X
, W
)),
1929 /** add a NOP to the shader if
1930 * a) the shader is empty
1932 * b) there is a label at the end of the shader
1935 etna_compile_add_nop_if_needed(struct etna_compile
*c
)
1937 bool label_at_last_inst
= false;
1939 for (int idx
= 0; idx
< c
->labels_count
; ++idx
) {
1940 if (c
->labels
[idx
].inst_idx
== c
->inst_ptr
)
1941 label_at_last_inst
= true;
1945 if (c
->inst_ptr
== 0 || label_at_last_inst
)
1946 emit_inst(c
, &(struct etna_inst
){.opcode
= INST_OPCODE_NOP
});
1950 assign_uniforms(struct etna_compile_file
*file
, unsigned base
)
1952 for (int idx
= 0; idx
< file
->reg_size
; ++idx
) {
1953 file
->reg
[idx
].native
.valid
= 1;
1954 file
->reg
[idx
].native
.rgroup
= INST_RGROUP_UNIFORM_0
;
1955 file
->reg
[idx
].native
.id
= base
+ idx
;
1959 /* Allocate CONST and IMM to native ETNA_RGROUP_UNIFORM(x).
1960 * CONST must be consecutive as const buffers are supposed to be consecutive,
1961 * and before IMM, as this is
1962 * more convenient because is possible for the compilation process itself to
1964 * immediates for constants such as pi, one, zero.
1967 assign_constants_and_immediates(struct etna_compile
*c
)
1969 assign_uniforms(&c
->file
[TGSI_FILE_CONSTANT
], 0);
1970 /* immediates start after the constants */
1971 c
->imm_base
= c
->file
[TGSI_FILE_CONSTANT
].reg_size
* 4;
1972 assign_uniforms(&c
->file
[TGSI_FILE_IMMEDIATE
], c
->imm_base
/ 4);
1973 DBG_F(ETNA_DBG_COMPILER_MSGS
, "imm base: %i size: %i", c
->imm_base
,
1977 /* Assign declared samplers to native texture units */
1979 assign_texture_units(struct etna_compile
*c
)
1983 if (c
->info
.processor
== PIPE_SHADER_VERTEX
)
1984 tex_base
= c
->specs
->vertex_sampler_offset
;
1986 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_SAMPLER
].reg_size
; ++idx
) {
1987 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.valid
= 1;
1988 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.is_tex
= 1; // overrides rgroup
1989 c
->file
[TGSI_FILE_SAMPLER
].reg
[idx
].native
.id
= tex_base
+ idx
;
1993 /* Additional pass to fill in branch targets. This pass should be last
1994 * as no instruction reordering or removing/addition can be done anymore
1995 * once the branch targets are computed.
1998 etna_compile_fill_in_labels(struct etna_compile
*c
)
2000 for (int idx
= 0; idx
< c
->inst_ptr
; ++idx
) {
2001 if (c
->lbl_usage
[idx
])
2002 etna_assemble_set_imm(&c
->code
[idx
* 4], c
->lbl_usage
[idx
]->inst_idx
);
2006 /* compare two etna_native_reg structures, return true if equal */
2008 cmp_etna_native_reg(const struct etna_native_reg to
,
2009 const struct etna_native_reg from
)
2011 return to
.valid
== from
.valid
&& to
.is_tex
== from
.is_tex
&&
2012 to
.rgroup
== from
.rgroup
&& to
.id
== from
.id
;
2015 /* go through all declarations and swap native registers *to* and *from* */
2017 swap_native_registers(struct etna_compile
*c
, const struct etna_native_reg to
,
2018 const struct etna_native_reg from
)
2020 if (cmp_etna_native_reg(from
, to
))
2021 return; /* Nothing to do */
2023 for (int idx
= 0; idx
< c
->total_decls
; ++idx
) {
2024 if (cmp_etna_native_reg(c
->decl
[idx
].native
, from
)) {
2025 c
->decl
[idx
].native
= to
;
2026 } else if (cmp_etna_native_reg(c
->decl
[idx
].native
, to
)) {
2027 c
->decl
[idx
].native
= from
;
2032 /* For PS we need to permute so that inputs are always in temporary 0..N-1.
2033 * Semantic POS is always t0. If that semantic is not used, avoid t0.
2036 permute_ps_inputs(struct etna_compile
*c
)
2039 * gl_FragCoord VARYING_SLOT_POS TGSI_SEMANTIC_POSITION
2040 * gl_PointCoord VARYING_SLOT_PNTC TGSI_SEMANTIC_PCOORD
2042 uint native_idx
= 1;
2044 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
2045 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
2047 assert(reg
->has_semantic
);
2049 if (!reg
->active
|| reg
->semantic
.Name
== TGSI_SEMANTIC_POSITION
)
2052 input_id
= native_idx
++;
2053 swap_native_registers(c
, etna_native_temp(input_id
),
2054 c
->file
[TGSI_FILE_INPUT
].reg
[idx
].native
);
2057 c
->num_varyings
= native_idx
- 1;
2059 if (native_idx
> c
->next_free_native
)
2060 c
->next_free_native
= native_idx
;
2063 /* fill in ps inputs into shader object */
2065 fill_in_ps_inputs(struct etna_shader_variant
*sobj
, struct etna_compile
*c
)
2067 struct etna_shader_io_file
*sf
= &sobj
->infile
;
2071 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
2072 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
2074 if (reg
->native
.id
> 0) {
2075 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2076 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2077 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2078 /* convert usage mask to number of components (*=wildcard)
2079 * .r (0..1) -> 1 component
2080 * .*g (2..3) -> 2 component
2081 * .**b (4..7) -> 3 components
2082 * .***a (8..15) -> 4 components
2084 sf
->reg
[sf
->num_reg
].num_components
= util_last_bit(reg
->usage_mask
);
2089 assert(sf
->num_reg
== c
->num_varyings
);
2090 sobj
->input_count_unk8
= 31; /* XXX what is this */
2093 /* fill in output mapping for ps into shader object */
2095 fill_in_ps_outputs(struct etna_shader_variant
*sobj
, struct etna_compile
*c
)
2097 sobj
->outfile
.num_reg
= 0;
2099 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_OUTPUT
].reg_size
; ++idx
) {
2100 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_OUTPUT
].reg
[idx
];
2102 switch (reg
->semantic
.Name
) {
2103 case TGSI_SEMANTIC_COLOR
: /* FRAG_RESULT_COLOR */
2104 sobj
->ps_color_out_reg
= reg
->native
.id
;
2106 case TGSI_SEMANTIC_POSITION
: /* FRAG_RESULT_DEPTH */
2107 sobj
->ps_depth_out_reg
= reg
->native
.id
; /* =always native reg 0, only z component should be assigned */
2110 assert(0); /* only outputs supported are COLOR and POSITION at the moment */
2115 /* fill in inputs for vs into shader object */
2117 fill_in_vs_inputs(struct etna_shader_variant
*sobj
, struct etna_compile
*c
)
2119 struct etna_shader_io_file
*sf
= &sobj
->infile
;
2122 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_INPUT
].reg_size
; ++idx
) {
2123 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_INPUT
].reg
[idx
];
2124 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2125 /* XXX exclude inputs with special semantics such as gl_frontFacing */
2126 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2127 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2128 sf
->reg
[sf
->num_reg
].num_components
= util_last_bit(reg
->usage_mask
);
2132 sobj
->input_count_unk8
= (sf
->num_reg
+ 19) / 16; /* XXX what is this */
2135 /* build two-level output index [Semantic][Index] for fast linking */
2137 build_output_index(struct etna_shader_variant
*sobj
)
2142 for (int name
= 0; name
< TGSI_SEMANTIC_COUNT
; ++name
)
2143 total
+= sobj
->output_count_per_semantic
[name
];
2145 sobj
->output_per_semantic_list
= CALLOC(total
, sizeof(struct etna_shader_inout
*));
2147 for (int name
= 0; name
< TGSI_SEMANTIC_COUNT
; ++name
) {
2148 sobj
->output_per_semantic
[name
] = &sobj
->output_per_semantic_list
[offset
];
2149 offset
+= sobj
->output_count_per_semantic
[name
];
2152 for (int idx
= 0; idx
< sobj
->outfile
.num_reg
; ++idx
) {
2153 sobj
->output_per_semantic
[sobj
->outfile
.reg
[idx
].semantic
.Name
]
2154 [sobj
->outfile
.reg
[idx
].semantic
.Index
] =
2155 &sobj
->outfile
.reg
[idx
];
2159 /* fill in outputs for vs into shader object */
2161 fill_in_vs_outputs(struct etna_shader_variant
*sobj
, struct etna_compile
*c
)
2163 struct etna_shader_io_file
*sf
= &sobj
->outfile
;
2166 for (int idx
= 0; idx
< c
->file
[TGSI_FILE_OUTPUT
].reg_size
; ++idx
) {
2167 struct etna_reg_desc
*reg
= &c
->file
[TGSI_FILE_OUTPUT
].reg
[idx
];
2168 assert(sf
->num_reg
< ETNA_NUM_INPUTS
);
2170 switch (reg
->semantic
.Name
) {
2171 case TGSI_SEMANTIC_POSITION
:
2172 sobj
->vs_pos_out_reg
= reg
->native
.id
;
2174 case TGSI_SEMANTIC_PSIZE
:
2175 sobj
->vs_pointsize_out_reg
= reg
->native
.id
;
2178 sf
->reg
[sf
->num_reg
].reg
= reg
->native
.id
;
2179 sf
->reg
[sf
->num_reg
].semantic
= reg
->semantic
;
2180 sf
->reg
[sf
->num_reg
].num_components
= 4; // XXX reg->num_components;
2182 sobj
->output_count_per_semantic
[reg
->semantic
.Name
] =
2183 MAX2(reg
->semantic
.Index
+ 1,
2184 sobj
->output_count_per_semantic
[reg
->semantic
.Name
]);
2188 /* build two-level index for linking */
2189 build_output_index(sobj
);
2191 /* fill in "mystery meat" load balancing value. This value determines how
2192 * work is scheduled between VS and PS
2193 * in the unified shader architecture. More precisely, it is determined from
2194 * the number of VS outputs, as well as chip-specific
2195 * vertex output buffer size, vertex cache size, and the number of shader
2198 * XXX this is a conservative estimate, the "optimal" value is only known for
2199 * sure at link time because some
2200 * outputs may be unused and thus unmapped. Then again, in the general use
2201 * case with GLSL the vertex and fragment
2202 * shaders are linked already before submitting to Gallium, thus all outputs
2205 int half_out
= (c
->file
[TGSI_FILE_OUTPUT
].reg_size
+ 1) / 2;
2208 uint32_t b
= ((20480 / (c
->specs
->vertex_output_buffer_size
-
2209 2 * half_out
* c
->specs
->vertex_cache_size
)) +
2212 uint32_t a
= (b
+ 256 / (c
->specs
->shader_core_count
* half_out
)) / 2;
2213 sobj
->vs_load_balancing
= VIVS_VS_LOAD_BALANCING_A(MIN2(a
, 255)) |
2214 VIVS_VS_LOAD_BALANCING_B(MIN2(b
, 255)) |
2215 VIVS_VS_LOAD_BALANCING_C(0x3f) |
2216 VIVS_VS_LOAD_BALANCING_D(0x0f);
2220 etna_compile_check_limits(struct etna_compile
*c
)
2222 int max_uniforms
= (c
->info
.processor
== PIPE_SHADER_VERTEX
)
2223 ? c
->specs
->max_vs_uniforms
2224 : c
->specs
->max_ps_uniforms
;
2225 /* round up number of uniforms, including immediates, in units of four */
2226 int num_uniforms
= c
->imm_base
/ 4 + (c
->imm_size
+ 3) / 4;
2228 if (c
->inst_ptr
> c
->specs
->max_instructions
) {
2229 DBG("Number of instructions (%d) exceeds maximum %d", c
->inst_ptr
,
2230 c
->specs
->max_instructions
);
2234 if (c
->next_free_native
> c
->specs
->max_registers
) {
2235 DBG("Number of registers (%d) exceeds maximum %d", c
->next_free_native
,
2236 c
->specs
->max_registers
);
2240 if (num_uniforms
> max_uniforms
) {
2241 DBG("Number of uniforms (%d) exceeds maximum %d", num_uniforms
,
2246 if (c
->num_varyings
> c
->specs
->max_varyings
) {
2247 DBG("Number of varyings (%d) exceeds maximum %d", c
->num_varyings
,
2248 c
->specs
->max_varyings
);
2252 if (c
->imm_base
> c
->specs
->num_constants
) {
2253 DBG("Number of constants (%d) exceeds maximum %d", c
->imm_base
,
2254 c
->specs
->num_constants
);
2261 copy_uniform_state_to_shader(struct etna_compile
*c
, struct etna_shader_variant
*sobj
)
2263 uint32_t count
= c
->imm_size
;
2264 struct etna_shader_uniform_info
*uinfo
= &sobj
->uniforms
;
2266 uinfo
->const_count
= c
->imm_base
;
2267 uinfo
->imm_count
= count
;
2268 uinfo
->imm_data
= mem_dup(c
->imm_data
, count
* sizeof(*c
->imm_data
));
2269 uinfo
->imm_contents
= mem_dup(c
->imm_contents
, count
* sizeof(*c
->imm_contents
));
2271 etna_set_shader_uniforms_dirty_flags(sobj
);
2275 etna_compile_shader(struct etna_shader_variant
*v
)
2277 /* Create scratch space that may be too large to fit on stack
2280 struct etna_compile
*c
;
2285 const struct etna_specs
*specs
= v
->shader
->specs
;
2287 struct tgsi_lowering_config lconfig
= {
2288 .lower_SCS
= specs
->has_sin_cos_sqrt
,
2289 .lower_FLR
= !specs
->has_sign_floor_ceil
,
2290 .lower_CEIL
= !specs
->has_sign_floor_ceil
,
2296 .lower_TRUNC
= true,
2300 c
= CALLOC_STRUCT(etna_compile
);
2304 const struct tgsi_token
*tokens
= v
->shader
->tokens
;
2308 c
->tokens
= tgsi_transform_lowering(&lconfig
, tokens
, &c
->info
);
2309 c
->free_tokens
= !!c
->tokens
;
2315 /* Build a map from gallium register to native registers for files
2316 * CONST, SAMP, IMM, OUT, IN, TEMP.
2317 * SAMP will map as-is for fragment shaders, there will be a +8 offset for
2320 /* Pass one -- check register file declarations and immediates */
2321 etna_compile_parse_declarations(c
);
2323 etna_allocate_decls(c
);
2325 /* Pass two -- check usage of temporaries, inputs, outputs */
2326 etna_compile_pass_check_usage(c
);
2328 assign_special_inputs(c
);
2330 /* Assign native temp register to TEMPs */
2331 assign_temporaries_to_native(c
, &c
->file
[TGSI_FILE_TEMPORARY
]);
2333 /* optimize outputs */
2334 etna_compile_pass_optimize_outputs(c
);
2336 /* XXX assign special inputs: gl_FrontFacing (VARYING_SLOT_FACE)
2337 * this is part of RGROUP_INTERNAL
2340 /* assign inputs: last usage of input should be <= first usage of temp */
2341 /* potential optimization case:
2342 * if single MOV TEMP[y], IN[x] before which temp y is not used, and
2344 * is not read, temp[y] can be used as input register as-is
2346 /* sort temporaries by first use
2347 * sort inputs by last usage
2348 * iterate over inputs, temporaries
2349 * if last usage of input <= first usage of temp:
2350 * assign input to temp
2351 * advance input, temporary pointer
2353 * advance temporary pointer
2355 * potential problem: instruction with multiple inputs of which one is the
2356 * temp and the other is the input;
2357 * however, as the temp is not used before this, how would this make
2358 * sense? uninitialized temporaries have an undefined
2359 * value, so this would be ok
2361 assign_inouts_to_temporaries(c
, TGSI_FILE_INPUT
);
2363 /* assign outputs: first usage of output should be >= last usage of temp */
2364 /* potential optimization case:
2365 * if single MOV OUT[x], TEMP[y] (with full write mask, or at least
2366 * writing all components that are used in
2367 * the shader) after which temp y is no longer used temp[y] can be
2368 * used as output register as-is
2370 * potential problem: instruction with multiple outputs of which one is the
2371 * temp and the other is the output;
2372 * however, as the temp is not used after this, how would this make
2373 * sense? could just discard the output value
2375 /* sort temporaries by last use
2376 * sort outputs by first usage
2377 * iterate over outputs, temporaries
2378 * if first usage of output >= last usage of temp:
2379 * assign output to temp
2380 * advance output, temporary pointer
2382 * advance temporary pointer
2384 assign_inouts_to_temporaries(c
, TGSI_FILE_OUTPUT
);
2386 assign_constants_and_immediates(c
);
2387 assign_texture_units(c
);
2389 /* list declarations */
2390 for (int x
= 0; x
< c
->total_decls
; ++x
) {
2391 DBG_F(ETNA_DBG_COMPILER_MSGS
, "%i: %s,%d active=%i first_use=%i "
2392 "last_use=%i native=%i usage_mask=%x "
2394 x
, tgsi_file_name(c
->decl
[x
].file
), c
->decl
[x
].idx
,
2395 c
->decl
[x
].active
, c
->decl
[x
].first_use
, c
->decl
[x
].last_use
,
2396 c
->decl
[x
].native
.valid
? c
->decl
[x
].native
.id
: -1,
2397 c
->decl
[x
].usage_mask
, c
->decl
[x
].has_semantic
);
2398 if (c
->decl
[x
].has_semantic
)
2399 DBG_F(ETNA_DBG_COMPILER_MSGS
, " semantic_name=%s semantic_idx=%i",
2400 tgsi_semantic_names
[c
->decl
[x
].semantic
.Name
],
2401 c
->decl
[x
].semantic
.Index
);
2403 /* XXX for PS we need to permute so that inputs are always in temporary
2405 * There is no "switchboard" for varyings (AFAIK!). The output color,
2406 * however, can be routed
2407 * from an arbitrary temporary.
2409 if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
)
2410 permute_ps_inputs(c
);
2413 /* list declarations */
2414 for (int x
= 0; x
< c
->total_decls
; ++x
) {
2415 DBG_F(ETNA_DBG_COMPILER_MSGS
, "%i: %s,%d active=%i first_use=%i "
2416 "last_use=%i native=%i usage_mask=%x "
2418 x
, tgsi_file_name(c
->decl
[x
].file
), c
->decl
[x
].idx
,
2419 c
->decl
[x
].active
, c
->decl
[x
].first_use
, c
->decl
[x
].last_use
,
2420 c
->decl
[x
].native
.valid
? c
->decl
[x
].native
.id
: -1,
2421 c
->decl
[x
].usage_mask
, c
->decl
[x
].has_semantic
);
2422 if (c
->decl
[x
].has_semantic
)
2423 DBG_F(ETNA_DBG_COMPILER_MSGS
, " semantic_name=%s semantic_idx=%i",
2424 tgsi_semantic_names
[c
->decl
[x
].semantic
.Name
],
2425 c
->decl
[x
].semantic
.Index
);
2428 /* pass 3: generate instructions */
2429 etna_compile_pass_generate_code(c
);
2430 etna_compile_add_z_div_if_needed(c
);
2431 etna_compile_frag_rb_swap(c
);
2432 etna_compile_add_nop_if_needed(c
);
2433 etna_compile_fill_in_labels(c
);
2435 ret
= etna_compile_check_limits(c
);
2439 /* fill in output structure */
2440 v
->processor
= c
->info
.processor
;
2441 v
->code_size
= c
->inst_ptr
* 4;
2442 v
->code
= mem_dup(c
->code
, c
->inst_ptr
* 16);
2443 v
->num_loops
= c
->num_loops
;
2444 v
->num_temps
= c
->next_free_native
;
2445 v
->vs_pos_out_reg
= -1;
2446 v
->vs_pointsize_out_reg
= -1;
2447 v
->ps_color_out_reg
= -1;
2448 v
->ps_depth_out_reg
= -1;
2449 copy_uniform_state_to_shader(c
, v
);
2451 if (c
->info
.processor
== PIPE_SHADER_VERTEX
) {
2452 fill_in_vs_inputs(v
, c
);
2453 fill_in_vs_outputs(v
, c
);
2454 } else if (c
->info
.processor
== PIPE_SHADER_FRAGMENT
) {
2455 fill_in_ps_inputs(v
, c
);
2456 fill_in_ps_outputs(v
, c
);
2461 FREE((void *)c
->tokens
);
2469 extern const char *tgsi_swizzle_names
[];
2471 etna_dump_shader(const struct etna_shader_variant
*shader
)
2473 if (shader
->processor
== PIPE_SHADER_VERTEX
)
2479 etna_disasm(shader
->code
, shader
->code_size
, PRINT_RAW
);
2481 printf("num loops: %i\n", shader
->num_loops
);
2482 printf("num temps: %i\n", shader
->num_temps
);
2483 printf("num const: %i\n", shader
->uniforms
.const_count
);
2484 printf("immediates:\n");
2485 for (int idx
= 0; idx
< shader
->uniforms
.imm_count
; ++idx
) {
2486 printf(" [%i].%s = %f (0x%08x)\n",
2487 (idx
+ shader
->uniforms
.const_count
) / 4,
2488 tgsi_swizzle_names
[idx
% 4],
2489 *((float *)&shader
->uniforms
.imm_data
[idx
]),
2490 shader
->uniforms
.imm_data
[idx
]);
2492 printf("inputs:\n");
2493 for (int idx
= 0; idx
< shader
->infile
.num_reg
; ++idx
) {
2494 printf(" [%i] name=%s index=%i comps=%i\n", shader
->infile
.reg
[idx
].reg
,
2495 tgsi_semantic_names
[shader
->infile
.reg
[idx
].semantic
.Name
],
2496 shader
->infile
.reg
[idx
].semantic
.Index
,
2497 shader
->infile
.reg
[idx
].num_components
);
2499 printf("outputs:\n");
2500 for (int idx
= 0; idx
< shader
->outfile
.num_reg
; ++idx
) {
2501 printf(" [%i] name=%s index=%i comps=%i\n", shader
->outfile
.reg
[idx
].reg
,
2502 tgsi_semantic_names
[shader
->outfile
.reg
[idx
].semantic
.Name
],
2503 shader
->outfile
.reg
[idx
].semantic
.Index
,
2504 shader
->outfile
.reg
[idx
].num_components
);
2506 printf("special:\n");
2507 if (shader
->processor
== PIPE_SHADER_VERTEX
) {
2508 printf(" vs_pos_out_reg=%i\n", shader
->vs_pos_out_reg
);
2509 printf(" vs_pointsize_out_reg=%i\n", shader
->vs_pointsize_out_reg
);
2510 printf(" vs_load_balancing=0x%08x\n", shader
->vs_load_balancing
);
2512 printf(" ps_color_out_reg=%i\n", shader
->ps_color_out_reg
);
2513 printf(" ps_depth_out_reg=%i\n", shader
->ps_depth_out_reg
);
2515 printf(" input_count_unk8=0x%08x\n", shader
->input_count_unk8
);
2519 etna_destroy_shader(struct etna_shader_variant
*shader
)
2524 FREE(shader
->uniforms
.imm_data
);
2525 FREE(shader
->uniforms
.imm_contents
);
2526 FREE(shader
->output_per_semantic_list
);
2530 static const struct etna_shader_inout
*
2531 etna_shader_vs_lookup(const struct etna_shader_variant
*sobj
,
2532 const struct etna_shader_inout
*in
)
2534 if (in
->semantic
.Index
< sobj
->output_count_per_semantic
[in
->semantic
.Name
])
2535 return sobj
->output_per_semantic
[in
->semantic
.Name
][in
->semantic
.Index
];
2541 etna_link_shader(struct etna_shader_link_info
*info
,
2542 const struct etna_shader_variant
*vs
, const struct etna_shader_variant
*fs
)
2544 /* For each fragment input we need to find the associated vertex shader
2545 * output, which can be found by matching on semantic name and index. A
2546 * binary search could be used because the vs outputs are sorted by their
2547 * semantic index and grouped by semantic type by fill_in_vs_outputs.
2549 assert(fs
->infile
.num_reg
< ETNA_NUM_INPUTS
);
2551 for (int idx
= 0; idx
< fs
->infile
.num_reg
; ++idx
) {
2552 const struct etna_shader_inout
*fsio
= &fs
->infile
.reg
[idx
];
2553 const struct etna_shader_inout
*vsio
= etna_shader_vs_lookup(vs
, fsio
);
2554 struct etna_varying
*varying
;
2556 assert(fsio
->reg
> 0 && fsio
->reg
<= ARRAY_SIZE(info
->varyings
));
2558 if (fsio
->reg
> info
->num_varyings
)
2559 info
->num_varyings
= fsio
->reg
;
2561 varying
= &info
->varyings
[fsio
->reg
- 1];
2562 varying
->num_components
= fsio
->num_components
;
2564 if (fsio
->semantic
.Name
== TGSI_SEMANTIC_COLOR
) /* colors affected by flat shading */
2565 varying
->pa_attributes
= 0x200;
2566 else /* texture coord or other bypasses flat shading */
2567 varying
->pa_attributes
= 0x2f1;
2569 if (fsio
->semantic
.Name
== TGSI_SEMANTIC_PCOORD
) {
2570 varying
->use
[0] = VARYING_COMPONENT_USE_POINTCOORD_X
;
2571 varying
->use
[1] = VARYING_COMPONENT_USE_POINTCOORD_Y
;
2572 varying
->use
[2] = VARYING_COMPONENT_USE_USED
;
2573 varying
->use
[3] = VARYING_COMPONENT_USE_USED
;
2574 varying
->reg
= 0; /* replaced by point coord -- doesn't matter */
2579 return true; /* not found -- link error */
2581 varying
->use
[0] = VARYING_COMPONENT_USE_USED
;
2582 varying
->use
[1] = VARYING_COMPONENT_USE_USED
;
2583 varying
->use
[2] = VARYING_COMPONENT_USE_USED
;
2584 varying
->use
[3] = VARYING_COMPONENT_USE_USED
;
2585 varying
->reg
= vsio
->reg
;
2588 assert(info
->num_varyings
== fs
->infile
.num_reg
);