2 * Copyright (c) 2012-2019 Etnaviv Project
3 * Copyright (c) 2019 Zodiac Inflight Innovations
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Jonathan Marek <jonathan@marek.ca>
26 * Wladimir J. van der Laan <laanwj@gmail.com>
29 #include "etnaviv_compiler.h"
30 #include "etnaviv_asm.h"
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_disasm.h"
34 #include "etnaviv_uniforms.h"
35 #include "etnaviv_util.h"
38 #include "util/u_memory.h"
39 #include "util/register_allocate.h"
40 #include "compiler/nir/nir_builder.h"
41 #include "compiler/nir/nir_worklist.h"
43 #include "tgsi/tgsi_strings.h"
44 #include "util/u_half.h"
48 #define is_fs(c) ((c)->nir->info.stage == MESA_SHADER_FRAGMENT)
49 const struct etna_specs
*specs
;
50 struct etna_shader_variant
*variant
;
52 /* block # to instr index */
56 int inst_ptr
; /* current instruction pointer */
57 struct etna_inst code
[ETNA_MAX_INSTRUCTIONS
* ETNA_INST_SIZE
];
60 uint64_t consts
[ETNA_MAX_IMM
];
62 /* There was an error during compilation */
66 /* io related lowering
67 * run after lower_int_to_float because it adds i2f/f2i ops
70 etna_lower_io(nir_shader
*shader
, struct etna_shader_variant
*v
)
72 nir_foreach_function(function
, shader
) {
74 nir_builder_init(&b
, function
->impl
);
76 nir_foreach_block(block
, function
->impl
) {
77 nir_foreach_instr_safe(instr
, block
) {
78 if (instr
->type
== nir_instr_type_intrinsic
) {
79 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
81 switch (intr
->intrinsic
) {
82 case nir_intrinsic_load_front_face
: {
83 /* HW front_face is 0.0/1.0, not 0/~0u for bool
84 * lower with a comparison with 0
86 intr
->dest
.ssa
.bit_size
= 32;
88 b
.cursor
= nir_after_instr(instr
);
90 nir_ssa_def
*ssa
= nir_ine(&b
, &intr
->dest
.ssa
, nir_imm_int(&b
, 0));
92 nir_instr_as_alu(ssa
->parent_instr
)->op
= nir_op_ieq
;
94 nir_ssa_def_rewrite_uses_after(&intr
->dest
.ssa
,
98 case nir_intrinsic_store_deref
: {
99 nir_deref_instr
*deref
= nir_src_as_deref(intr
->src
[0]);
100 if (shader
->info
.stage
== MESA_SHADER_VERTEX
&&
101 v
->shader
->specs
->vs_need_z_div
&&
102 deref
->var
->data
.location
== VARYING_SLOT_POS
) {
104 assert(deref
->deref_type
== nir_deref_type_var
);
106 b
.cursor
= nir_before_instr(instr
);
109 out
[0] = nir_channel(&b
, intr
->src
[1].ssa
, 0);
110 out
[1] = nir_channel(&b
, intr
->src
[1].ssa
, 1);
111 out
[2] = nir_fmul_imm(&b
, nir_fadd(&b
, nir_channel(&b
, intr
->src
[1].ssa
, 2),
112 nir_channel(&b
, intr
->src
[1].ssa
, 3)),
114 out
[3] = nir_channel(&b
, intr
->src
[1].ssa
, 3);
116 nir_instr_rewrite_src(instr
, &intr
->src
[1],
117 nir_src_for_ssa(nir_vec(&b
, out
, 4)));
120 if (shader
->info
.stage
!= MESA_SHADER_FRAGMENT
|| !v
->key
.frag_rb_swap
)
123 assert(deref
->deref_type
== nir_deref_type_var
);
125 if (deref
->var
->data
.location
!= FRAG_RESULT_COLOR
&&
126 deref
->var
->data
.location
!= FRAG_RESULT_DATA0
)
129 b
.cursor
= nir_before_instr(instr
);
131 nir_ssa_def
*ssa
= nir_mov(&b
, intr
->src
[1].ssa
);
132 nir_alu_instr
*alu
= nir_instr_as_alu(ssa
->parent_instr
);
133 alu
->src
[0].swizzle
[0] = 2;
134 alu
->src
[0].swizzle
[2] = 0;
135 nir_instr_rewrite_src(instr
, &intr
->src
[1], nir_src_for_ssa(ssa
));
137 case nir_intrinsic_load_uniform
: {
138 /* multiply by 16 and convert to int */
139 b
.cursor
= nir_before_instr(instr
);
140 nir_ssa_def
*ssa
= nir_imul(&b
, intr
->src
[0].ssa
, nir_imm_int(&b
, 16));
141 nir_instr_rewrite_src(instr
, &intr
->src
[0], nir_src_for_ssa(ssa
));
148 if (instr
->type
!= nir_instr_type_tex
)
151 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
152 nir_src
*coord
= NULL
;
153 nir_src
*lod_bias
= NULL
;
154 unsigned lod_bias_idx
;
156 assert(tex
->sampler_index
== tex
->texture_index
);
158 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
159 switch (tex
->src
[i
].src_type
) {
160 case nir_tex_src_coord
:
161 coord
= &tex
->src
[i
].src
;
163 case nir_tex_src_bias
:
164 case nir_tex_src_lod
:
166 lod_bias
= &tex
->src
[i
].src
;
169 case nir_tex_src_comparator
:
177 if (tex
->sampler_dim
== GLSL_SAMPLER_DIM_RECT
) {
178 /* use a dummy load_uniform here to represent texcoord scale */
179 b
.cursor
= nir_before_instr(instr
);
180 nir_intrinsic_instr
*load
=
181 nir_intrinsic_instr_create(b
.shader
, nir_intrinsic_load_uniform
);
182 nir_intrinsic_set_base(load
, ~tex
->sampler_index
);
183 load
->num_components
= 2;
184 load
->src
[0] = nir_src_for_ssa(nir_imm_float(&b
, 0.0f
));
185 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 2, 32, NULL
);
186 nir_intrinsic_set_type(load
, nir_type_float
);
188 nir_builder_instr_insert(&b
, &load
->instr
);
190 nir_ssa_def
*new_coord
= nir_fmul(&b
, coord
->ssa
, &load
->dest
.ssa
);
191 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(new_coord
));
194 /* pre HALTI5 needs texture sources in a single source */
196 if (!lod_bias
|| v
->shader
->specs
->halti
>= 5)
199 assert(coord
&& lod_bias
&& tex
->coord_components
< 4);
201 nir_alu_instr
*vec
= nir_alu_instr_create(shader
, nir_op_vec4
);
202 for (unsigned i
= 0; i
< tex
->coord_components
; i
++) {
203 vec
->src
[i
].src
= nir_src_for_ssa(coord
->ssa
);
204 vec
->src
[i
].swizzle
[0] = i
;
206 for (unsigned i
= tex
->coord_components
; i
< 4; i
++)
207 vec
->src
[i
].src
= nir_src_for_ssa(lod_bias
->ssa
);
209 vec
->dest
.write_mask
= 0xf;
210 nir_ssa_dest_init(&vec
->instr
, &vec
->dest
.dest
, 4, 32, NULL
);
212 nir_tex_instr_remove_src(tex
, lod_bias_idx
);
213 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(&vec
->dest
.dest
.ssa
));
214 tex
->coord_components
= 4;
216 nir_instr_insert_before(&tex
->instr
, &vec
->instr
);
223 etna_alu_to_scalar_filter_cb(const nir_instr
*instr
, const void *data
)
225 const struct etna_specs
*specs
= data
;
227 if (instr
->type
!= nir_instr_type_alu
)
230 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
242 /* TODO: can do better than alu_to_scalar for vector compares */
243 case nir_op_b32all_fequal2
:
244 case nir_op_b32all_fequal3
:
245 case nir_op_b32all_fequal4
:
246 case nir_op_b32any_fnequal2
:
247 case nir_op_b32any_fnequal3
:
248 case nir_op_b32any_fnequal4
:
249 case nir_op_b32all_iequal2
:
250 case nir_op_b32all_iequal3
:
251 case nir_op_b32all_iequal4
:
252 case nir_op_b32any_inequal2
:
253 case nir_op_b32any_inequal3
:
254 case nir_op_b32any_inequal4
:
257 if (!specs
->has_halti2_instructions
)
268 etna_lower_alu_impl(nir_function_impl
*impl
, struct etna_compile
*c
)
270 nir_shader
*shader
= impl
->function
->shader
;
273 nir_builder_init(&b
, impl
);
275 /* in a seperate loop so we can apply the multiple-uniform logic to the new fmul */
276 nir_foreach_block(block
, impl
) {
277 nir_foreach_instr_safe(instr
, block
) {
278 if (instr
->type
!= nir_instr_type_alu
)
281 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
282 /* multiply sin/cos src by constant
283 * TODO: do this earlier (but it breaks const_prop opt)
285 if (alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
) {
286 b
.cursor
= nir_before_instr(instr
);
288 nir_ssa_def
*imm
= c
->specs
->has_new_transcendentals
?
289 nir_imm_float(&b
, 1.0 / M_PI
) :
290 nir_imm_float(&b
, 2.0 / M_PI
);
292 nir_instr_rewrite_src(instr
, &alu
->src
[0].src
,
293 nir_src_for_ssa(nir_fmul(&b
, alu
->src
[0].src
.ssa
, imm
)));
296 /* change transcendental ops to vec2 and insert vec1 mul for the result
297 * TODO: do this earlier (but it breaks with optimizations)
299 if (c
->specs
->has_new_transcendentals
&& (
300 alu
->op
== nir_op_fdiv
|| alu
->op
== nir_op_flog2
||
301 alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
)) {
302 nir_ssa_def
*ssa
= &alu
->dest
.dest
.ssa
;
304 assert(ssa
->num_components
== 1);
306 nir_alu_instr
*mul
= nir_alu_instr_create(shader
, nir_op_fmul
);
307 mul
->src
[0].src
= mul
->src
[1].src
= nir_src_for_ssa(ssa
);
308 mul
->src
[1].swizzle
[0] = 1;
310 mul
->dest
.write_mask
= 1;
311 nir_ssa_dest_init(&mul
->instr
, &mul
->dest
.dest
, 1, 32, NULL
);
313 ssa
->num_components
= 2;
315 mul
->dest
.saturate
= alu
->dest
.saturate
;
316 alu
->dest
.saturate
= 0;
318 nir_instr_insert_after(instr
, &mul
->instr
);
320 nir_ssa_def_rewrite_uses_after(ssa
, nir_src_for_ssa(&mul
->dest
.dest
.ssa
), &mul
->instr
);
326 static void etna_lower_alu(nir_shader
*shader
, struct etna_compile
*c
)
328 nir_foreach_function(function
, shader
) {
330 etna_lower_alu_impl(function
->impl
, c
);
335 emit_inst(struct etna_compile
*c
, struct etna_inst
*inst
)
337 c
->code
[c
->inst_ptr
++] = *inst
;
340 /* to map nir srcs should to etna_inst srcs */
342 SRC_0_1_2
= (0 << 0) | (1 << 2) | (2 << 4),
343 SRC_0_1_X
= (0 << 0) | (1 << 2) | (3 << 4),
344 SRC_0_X_X
= (0 << 0) | (3 << 2) | (3 << 4),
345 SRC_0_X_1
= (0 << 0) | (3 << 2) | (1 << 4),
346 SRC_0_1_0
= (0 << 0) | (1 << 2) | (0 << 4),
347 SRC_X_X_0
= (3 << 0) | (3 << 2) | (0 << 4),
348 SRC_0_X_0
= (0 << 0) | (3 << 2) | (0 << 4),
351 /* info to translate a nir op to etna_inst */
352 struct etna_op_info
{
353 uint8_t opcode
; /* INST_OPCODE_ */
354 uint8_t src
; /* SRC_ enum */
355 uint8_t cond
; /* INST_CONDITION_ */
356 uint8_t type
; /* INST_TYPE_ */
359 static const struct etna_op_info etna_ops
[] = {
360 [0 ... nir_num_opcodes
- 1] = {0xff},
363 #define OPCT(nir, op, src, cond, type) [nir_op_##nir] = { \
366 INST_CONDITION_##cond, \
369 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32)
370 #define IOPC(nir, op, src, cond) OPCT(nir, op, src, cond, S32)
371 #define UOPC(nir, op, src, cond) OPCT(nir, op, src, cond, U32)
372 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
373 #define IOP(nir, op, src) IOPC(nir, op, src, TRUE)
374 #define UOP(nir, op, src) UOPC(nir, op, src, TRUE)
375 OP(mov
, MOV
, X_X_0
), OP(fneg
, MOV
, X_X_0
), OP(fabs
, MOV
, X_X_0
), OP(fsat
, MOV
, X_X_0
),
376 OP(fmul
, MUL
, 0_1_X
), OP(fadd
, ADD
, 0_X_1
), OP(ffma
, MAD
, 0_1_2
),
377 OP(fdot2
, DP2
, 0_1_X
), OP(fdot3
, DP3
, 0_1_X
), OP(fdot4
, DP4
, 0_1_X
),
378 OPC(fmin
, SELECT
, 0_1_0
, GT
), OPC(fmax
, SELECT
, 0_1_0
, LT
),
379 OP(ffract
, FRC
, X_X_0
), OP(frcp
, RCP
, X_X_0
), OP(frsq
, RSQ
, X_X_0
),
380 OP(fsqrt
, SQRT
, X_X_0
), OP(fsin
, SIN
, X_X_0
), OP(fcos
, COS
, X_X_0
),
381 OP(fsign
, SIGN
, X_X_0
), OP(ffloor
, FLOOR
, X_X_0
), OP(fceil
, CEIL
, X_X_0
),
382 OP(flog2
, LOG
, X_X_0
), OP(fexp2
, EXP
, X_X_0
),
383 OPC(seq
, SET
, 0_1_X
, EQ
), OPC(sne
, SET
, 0_1_X
, NE
), OPC(sge
, SET
, 0_1_X
, GE
), OPC(slt
, SET
, 0_1_X
, LT
),
384 OPC(fcsel
, SELECT
, 0_1_2
, NZ
),
385 OP(fdiv
, DIV
, 0_1_X
),
386 OP(fddx
, DSX
, 0_X_0
), OP(fddy
, DSY
, 0_X_0
),
389 IOP(i2f32
, I2F
, 0_X_X
),
390 UOP(u2f32
, I2F
, 0_X_X
),
391 IOP(f2i32
, F2I
, 0_X_X
),
392 UOP(f2u32
, F2I
, 0_X_X
),
393 UOP(b2f32
, AND
, 0_X_X
), /* AND with fui(1.0f) */
394 UOP(b2i32
, AND
, 0_X_X
), /* AND with 1 */
395 OPC(f2b32
, CMP
, 0_X_X
, NE
), /* != 0.0 */
396 UOPC(i2b32
, CMP
, 0_X_X
, NE
), /* != 0 */
399 IOP(iadd
, ADD
, 0_X_1
),
400 IOP(imul
, IMULLO0
, 0_1_X
),
401 /* IOP(imad, IMADLO0, 0_1_2), */
402 IOP(ineg
, ADD
, X_X_0
), /* ADD 0, -x */
403 IOP(iabs
, IABS
, X_X_0
),
404 IOP(isign
, SIGN
, X_X_0
),
405 IOPC(imin
, SELECT
, 0_1_0
, GT
),
406 IOPC(imax
, SELECT
, 0_1_0
, LT
),
407 UOPC(umin
, SELECT
, 0_1_0
, GT
),
408 UOPC(umax
, SELECT
, 0_1_0
, LT
),
411 UOPC(b32csel
, SELECT
, 0_1_2
, NZ
),
413 /* compare with int result */
414 OPC(feq32
, CMP
, 0_1_X
, EQ
),
415 OPC(fne32
, CMP
, 0_1_X
, NE
),
416 OPC(fge32
, CMP
, 0_1_X
, GE
),
417 OPC(flt32
, CMP
, 0_1_X
, LT
),
418 IOPC(ieq32
, CMP
, 0_1_X
, EQ
),
419 IOPC(ine32
, CMP
, 0_1_X
, NE
),
420 IOPC(ige32
, CMP
, 0_1_X
, GE
),
421 IOPC(ilt32
, CMP
, 0_1_X
, LT
),
422 UOPC(uge32
, CMP
, 0_1_X
, GE
),
423 UOPC(ult32
, CMP
, 0_1_X
, LT
),
427 IOP(iand
, AND
, 0_X_1
),
428 IOP(ixor
, XOR
, 0_X_1
),
429 IOP(inot
, NOT
, X_X_0
),
430 IOP(ishl
, LSHIFT
, 0_X_1
),
431 IOP(ishr
, RSHIFT
, 0_X_1
),
432 UOP(ushr
, RSHIFT
, 0_X_1
),
436 etna_emit_block_start(struct etna_compile
*c
, unsigned block
)
438 c
->block_ptr
[block
] = c
->inst_ptr
;
442 etna_emit_alu(struct etna_compile
*c
, nir_op op
, struct etna_inst_dst dst
,
443 struct etna_inst_src src
[3], bool saturate
)
445 struct etna_op_info ei
= etna_ops
[op
];
446 unsigned swiz_scalar
= INST_SWIZ_BROADCAST(ffs(dst
.write_mask
) - 1);
448 assert(ei
.opcode
!= 0xff);
450 struct etna_inst inst
= {
463 if (c
->specs
->has_new_transcendentals
)
471 /* scalar instructions we want src to be in x component */
472 src
[0].swiz
= inst_swiz_compose(src
[0].swiz
, swiz_scalar
);
473 src
[1].swiz
= inst_swiz_compose(src
[1].swiz
, swiz_scalar
);
475 /* deal with instructions which don't have 1:1 mapping */
477 inst
.src
[2] = etna_immediate_float(1.0f
);
480 inst
.src
[2] = etna_immediate_int(1);
483 inst
.src
[1] = etna_immediate_float(0.0f
);
486 inst
.src
[1] = etna_immediate_int(0);
489 inst
.src
[0] = etna_immediate_int(0);
496 /* set the "true" value for CMP instructions */
497 if (inst
.opcode
== INST_OPCODE_CMP
)
498 inst
.src
[2] = etna_immediate_int(-1);
500 for (unsigned j
= 0; j
< 3; j
++) {
501 unsigned i
= ((ei
.src
>> j
*2) & 3);
503 inst
.src
[j
] = src
[i
];
510 etna_emit_tex(struct etna_compile
*c
, nir_texop op
, unsigned texid
, unsigned dst_swiz
,
511 struct etna_inst_dst dst
, struct etna_inst_src coord
,
512 struct etna_inst_src lod_bias
, struct etna_inst_src compare
)
514 struct etna_inst inst
= {
516 .tex
.id
= texid
+ (is_fs(c
) ? 0 : c
->specs
->vertex_sampler_offset
),
517 .tex
.swiz
= dst_swiz
,
522 inst
.src
[1] = lod_bias
;
525 inst
.src
[2] = compare
;
528 case nir_texop_tex
: inst
.opcode
= INST_OPCODE_TEXLD
; break;
529 case nir_texop_txb
: inst
.opcode
= INST_OPCODE_TEXLDB
; break;
530 case nir_texop_txl
: inst
.opcode
= INST_OPCODE_TEXLDL
; break;
539 etna_emit_jump(struct etna_compile
*c
, unsigned block
, struct etna_inst_src condition
)
541 if (!condition
.use
) {
542 emit_inst(c
, &(struct etna_inst
) {.opcode
= INST_OPCODE_BRANCH
, .imm
= block
});
546 struct etna_inst inst
= {
547 .opcode
= INST_OPCODE_BRANCH
,
548 .cond
= INST_CONDITION_NOT
,
549 .type
= INST_TYPE_U32
,
553 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
558 etna_emit_discard(struct etna_compile
*c
, struct etna_inst_src condition
)
560 if (!condition
.use
) {
561 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_TEXKILL
});
565 struct etna_inst inst
= {
566 .opcode
= INST_OPCODE_TEXKILL
,
567 .cond
= INST_CONDITION_NZ
,
568 .type
= (c
->specs
->halti
< 2) ? INST_TYPE_F32
: INST_TYPE_U32
,
571 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
576 etna_emit_output(struct etna_compile
*c
, nir_variable
*var
, struct etna_inst_src src
)
578 struct etna_shader_io_file
*sf
= &c
->variant
->outfile
;
581 switch (var
->data
.location
) {
582 case FRAG_RESULT_COLOR
:
583 case FRAG_RESULT_DATA0
: /* DATA0 is used by gallium shaders for color */
584 c
->variant
->ps_color_out_reg
= src
.reg
;
586 case FRAG_RESULT_DEPTH
:
587 c
->variant
->ps_depth_out_reg
= src
.reg
;
590 unreachable("Unsupported fs output");
595 switch (var
->data
.location
) {
596 case VARYING_SLOT_POS
:
597 c
->variant
->vs_pos_out_reg
= src
.reg
;
599 case VARYING_SLOT_PSIZ
:
600 c
->variant
->vs_pointsize_out_reg
= src
.reg
;
603 sf
->reg
[sf
->num_reg
].reg
= src
.reg
;
604 sf
->reg
[sf
->num_reg
].slot
= var
->data
.location
;
605 sf
->reg
[sf
->num_reg
].num_components
= glsl_get_components(var
->type
);
612 etna_emit_load_ubo(struct etna_compile
*c
, struct etna_inst_dst dst
,
613 struct etna_inst_src src
, struct etna_inst_src base
)
615 /* convert float offset back to integer */
616 if (c
->specs
->halti
< 2) {
617 emit_inst(c
, &(struct etna_inst
) {
618 .opcode
= INST_OPCODE_F2I
,
619 .type
= INST_TYPE_U32
,
624 emit_inst(c
, &(struct etna_inst
) {
625 .opcode
= INST_OPCODE_LOAD
,
626 .type
= INST_TYPE_U32
,
630 .rgroup
= INST_RGROUP_TEMP
,
632 .swiz
= INST_SWIZ_BROADCAST(ffs(dst
.write_mask
) - 1)
640 emit_inst(c
, &(struct etna_inst
) {
641 .opcode
= INST_OPCODE_LOAD
,
642 .type
= INST_TYPE_U32
,
649 #define OPT(nir, pass, ...) ({ \
650 bool this_progress = false; \
651 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
654 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
657 etna_optimize_loop(nir_shader
*s
)
663 OPT_V(s
, nir_lower_vars_to_ssa
);
664 progress
|= OPT(s
, nir_opt_copy_prop_vars
);
665 progress
|= OPT(s
, nir_copy_prop
);
666 progress
|= OPT(s
, nir_opt_dce
);
667 progress
|= OPT(s
, nir_opt_cse
);
668 progress
|= OPT(s
, nir_opt_peephole_select
, 16, true, true);
669 progress
|= OPT(s
, nir_opt_intrinsics
);
670 progress
|= OPT(s
, nir_opt_algebraic
);
671 progress
|= OPT(s
, nir_opt_constant_folding
);
672 progress
|= OPT(s
, nir_opt_dead_cf
);
673 if (OPT(s
, nir_opt_trivial_continues
)) {
675 /* If nir_opt_trivial_continues makes progress, then we need to clean
676 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
679 OPT(s
, nir_copy_prop
);
682 progress
|= OPT(s
, nir_opt_loop_unroll
, nir_var_all
);
683 progress
|= OPT(s
, nir_opt_if
, false);
684 progress
|= OPT(s
, nir_opt_remove_phis
);
685 progress
|= OPT(s
, nir_opt_undef
);
691 etna_glsl_type_size(const struct glsl_type
*type
, bool bindless
)
693 return glsl_count_attribute_slots(type
, false);
697 copy_uniform_state_to_shader(struct etna_shader_variant
*sobj
, uint64_t *consts
, unsigned count
)
699 struct etna_shader_uniform_info
*uinfo
= &sobj
->uniforms
;
701 uinfo
->imm_count
= count
* 4;
702 uinfo
->imm_data
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_data
));
703 uinfo
->imm_contents
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_contents
));
705 for (unsigned i
= 0; i
< uinfo
->imm_count
; i
++) {
706 uinfo
->imm_data
[i
] = consts
[i
];
707 uinfo
->imm_contents
[i
] = consts
[i
] >> 32;
710 etna_set_shader_uniforms_dirty_flags(sobj
);
713 #include "etnaviv_compiler_nir_emit.h"
716 etna_compile_shader_nir(struct etna_shader_variant
*v
)
721 struct etna_compile
*c
= CALLOC_STRUCT(etna_compile
);
726 c
->specs
= v
->shader
->specs
;
727 c
->nir
= nir_shader_clone(NULL
, v
->shader
->nir
);
729 nir_shader
*s
= c
->nir
;
730 const struct etna_specs
*specs
= c
->specs
;
732 v
->stage
= s
->info
.stage
;
733 v
->num_loops
= 0; /* TODO */
734 v
->vs_id_in_reg
= -1;
735 v
->vs_pos_out_reg
= -1;
736 v
->vs_pointsize_out_reg
= -1;
737 v
->ps_color_out_reg
= 0; /* 0 for shader that doesn't write fragcolor.. */
738 v
->ps_depth_out_reg
= -1;
740 /* setup input linking */
741 struct etna_shader_io_file
*sf
= &v
->infile
;
742 if (s
->info
.stage
== MESA_SHADER_VERTEX
) {
743 nir_foreach_variable(var
, &s
->inputs
) {
744 unsigned idx
= var
->data
.driver_location
;
745 sf
->reg
[idx
].reg
= idx
;
746 sf
->reg
[idx
].slot
= var
->data
.location
;
747 sf
->reg
[idx
].num_components
= glsl_get_components(var
->type
);
748 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
752 nir_foreach_variable(var
, &s
->inputs
) {
753 unsigned idx
= var
->data
.driver_location
;
754 sf
->reg
[idx
].reg
= idx
+ 1;
755 sf
->reg
[idx
].slot
= var
->data
.location
;
756 sf
->reg
[idx
].num_components
= glsl_get_components(var
->type
);
757 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
760 assert(sf
->num_reg
== count
);
763 NIR_PASS_V(s
, nir_lower_io
, ~nir_var_shader_out
, etna_glsl_type_size
,
764 (nir_lower_io_options
)0);
766 OPT_V(s
, nir_lower_regs_to_ssa
);
767 OPT_V(s
, nir_lower_vars_to_ssa
);
768 OPT_V(s
, nir_lower_indirect_derefs
, nir_var_all
);
769 OPT_V(s
, nir_lower_tex
, &(struct nir_lower_tex_options
) { .lower_txp
= ~0u });
770 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
772 etna_optimize_loop(s
);
774 OPT_V(s
, etna_lower_io
, v
);
776 /* lower pre-halti2 to float (halti0 has integers, but only scalar..) */
777 if (c
->specs
->halti
< 2) {
778 /* use opt_algebraic between int_to_float and boot_to_float because
779 * int_to_float emits ftrunc, and ftrunc lowering generates bool ops
781 OPT_V(s
, nir_lower_int_to_float
);
782 OPT_V(s
, nir_opt_algebraic
);
783 OPT_V(s
, nir_lower_bool_to_float
);
785 OPT_V(s
, nir_lower_idiv
, nir_lower_idiv_fast
);
786 OPT_V(s
, nir_lower_bool_to_int32
);
789 etna_optimize_loop(s
);
791 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
792 nir_print_shader(s
, stdout
);
794 while( OPT(s
, nir_opt_vectorize
) );
795 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
797 NIR_PASS_V(s
, nir_remove_dead_variables
, nir_var_function_temp
);
798 NIR_PASS_V(s
, nir_opt_algebraic_late
);
800 NIR_PASS_V(s
, nir_move_vec_src_uses_to_dest
);
801 NIR_PASS_V(s
, nir_copy_prop
);
802 /* only HW supported integer source mod is ineg for iadd instruction (?) */
803 NIR_PASS_V(s
, nir_lower_to_source_mods
, ~nir_lower_int_source_mods
);
804 /* need copy prop after uses_to_dest, and before src mods: see
805 * dEQP-GLES2.functional.shaders.random.all_features.fragment.95
808 NIR_PASS_V(s
, nir_opt_dce
);
810 NIR_PASS_V(s
, etna_lower_alu
, c
);
812 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
813 nir_print_shader(s
, stdout
);
815 unsigned block_ptr
[nir_shader_get_entrypoint(s
)->num_blocks
];
816 c
->block_ptr
= block_ptr
;
819 ASSERTED
bool ok
= emit_shader(c
, &v
->num_temps
, &num_consts
);
822 /* empty shader, emit NOP */
824 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_NOP
});
826 /* assemble instructions, fixing up labels */
827 uint32_t *code
= MALLOC(c
->inst_ptr
* 16);
828 for (unsigned i
= 0; i
< c
->inst_ptr
; i
++) {
829 struct etna_inst
*inst
= &c
->code
[i
];
830 if (inst
->opcode
== INST_OPCODE_BRANCH
)
831 inst
->imm
= block_ptr
[inst
->imm
];
833 inst
->halti5
= specs
->halti
>= 5;
834 etna_assemble(&code
[i
* 4], inst
);
837 v
->code_size
= c
->inst_ptr
* 4;
839 v
->needs_icache
= c
->inst_ptr
> specs
->max_instructions
;
841 copy_uniform_state_to_shader(v
, c
->consts
, num_consts
);
843 if (s
->info
.stage
== MESA_SHADER_FRAGMENT
) {
844 v
->input_count_unk8
= 31; /* XXX what is this */
845 assert(v
->ps_depth_out_reg
<= 0);
851 v
->input_count_unk8
= DIV_ROUND_UP(v
->infile
.num_reg
+ 4, 16); /* XXX what is this */
853 /* fill in "mystery meat" load balancing value. This value determines how
854 * work is scheduled between VS and PS
855 * in the unified shader architecture. More precisely, it is determined from
856 * the number of VS outputs, as well as chip-specific
857 * vertex output buffer size, vertex cache size, and the number of shader
860 * XXX this is a conservative estimate, the "optimal" value is only known for
861 * sure at link time because some
862 * outputs may be unused and thus unmapped. Then again, in the general use
863 * case with GLSL the vertex and fragment
864 * shaders are linked already before submitting to Gallium, thus all outputs
867 * note: TGSI compiler counts all outputs (including position and pointsize), here
868 * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
869 * TODO: might have a problem that we don't count pointsize when it is used
872 int half_out
= v
->outfile
.num_reg
/ 2 + 1;
875 uint32_t b
= ((20480 / (specs
->vertex_output_buffer_size
-
876 2 * half_out
* specs
->vertex_cache_size
)) +
879 uint32_t a
= (b
+ 256 / (specs
->shader_core_count
* half_out
)) / 2;
880 v
->vs_load_balancing
= VIVS_VS_LOAD_BALANCING_A(MIN2(a
, 255)) |
881 VIVS_VS_LOAD_BALANCING_B(MIN2(b
, 255)) |
882 VIVS_VS_LOAD_BALANCING_C(0x3f) |
883 VIVS_VS_LOAD_BALANCING_D(0x0f);
891 etna_destroy_shader_nir(struct etna_shader_variant
*shader
)
896 FREE(shader
->uniforms
.imm_data
);
897 FREE(shader
->uniforms
.imm_contents
);
901 extern const char *tgsi_swizzle_names
[];
903 etna_dump_shader_nir(const struct etna_shader_variant
*shader
)
905 if (shader
->stage
== MESA_SHADER_VERTEX
)
910 etna_disasm(shader
->code
, shader
->code_size
, PRINT_RAW
);
912 printf("num loops: %i\n", shader
->num_loops
);
913 printf("num temps: %i\n", shader
->num_temps
);
914 printf("immediates:\n");
915 for (int idx
= 0; idx
< shader
->uniforms
.imm_count
; ++idx
) {
916 printf(" [%i].%s = %f (0x%08x) (%d)\n",
918 tgsi_swizzle_names
[idx
% 4],
919 *((float *)&shader
->uniforms
.imm_data
[idx
]),
920 shader
->uniforms
.imm_data
[idx
],
921 shader
->uniforms
.imm_contents
[idx
]);
924 for (int idx
= 0; idx
< shader
->infile
.num_reg
; ++idx
) {
925 printf(" [%i] name=%s comps=%i\n", shader
->infile
.reg
[idx
].reg
,
926 (shader
->stage
== MESA_SHADER_VERTEX
) ?
927 gl_vert_attrib_name(shader
->infile
.reg
[idx
].slot
) :
928 gl_varying_slot_name(shader
->infile
.reg
[idx
].slot
),
929 shader
->infile
.reg
[idx
].num_components
);
931 printf("outputs:\n");
932 for (int idx
= 0; idx
< shader
->outfile
.num_reg
; ++idx
) {
933 printf(" [%i] name=%s comps=%i\n", shader
->outfile
.reg
[idx
].reg
,
934 (shader
->stage
== MESA_SHADER_VERTEX
) ?
935 gl_varying_slot_name(shader
->outfile
.reg
[idx
].slot
) :
936 gl_frag_result_name(shader
->outfile
.reg
[idx
].slot
),
937 shader
->outfile
.reg
[idx
].num_components
);
939 printf("special:\n");
940 if (shader
->stage
== MESA_SHADER_VERTEX
) {
941 printf(" vs_pos_out_reg=%i\n", shader
->vs_pos_out_reg
);
942 printf(" vs_pointsize_out_reg=%i\n", shader
->vs_pointsize_out_reg
);
943 printf(" vs_load_balancing=0x%08x\n", shader
->vs_load_balancing
);
945 printf(" ps_color_out_reg=%i\n", shader
->ps_color_out_reg
);
946 printf(" ps_depth_out_reg=%i\n", shader
->ps_depth_out_reg
);
948 printf(" input_count_unk8=0x%08x\n", shader
->input_count_unk8
);
951 static const struct etna_shader_inout
*
952 etna_shader_vs_lookup(const struct etna_shader_variant
*sobj
,
953 const struct etna_shader_inout
*in
)
955 for (int i
= 0; i
< sobj
->outfile
.num_reg
; i
++)
956 if (sobj
->outfile
.reg
[i
].slot
== in
->slot
)
957 return &sobj
->outfile
.reg
[i
];
963 etna_link_shader_nir(struct etna_shader_link_info
*info
,
964 const struct etna_shader_variant
*vs
,
965 const struct etna_shader_variant
*fs
)
968 /* For each fragment input we need to find the associated vertex shader
969 * output, which can be found by matching on semantic name and index. A
970 * binary search could be used because the vs outputs are sorted by their
971 * semantic index and grouped by semantic type by fill_in_vs_outputs.
973 assert(fs
->infile
.num_reg
< ETNA_NUM_INPUTS
);
974 info
->pcoord_varying_comp_ofs
= -1;
976 for (int idx
= 0; idx
< fs
->infile
.num_reg
; ++idx
) {
977 const struct etna_shader_inout
*fsio
= &fs
->infile
.reg
[idx
];
978 const struct etna_shader_inout
*vsio
= etna_shader_vs_lookup(vs
, fsio
);
979 struct etna_varying
*varying
;
980 bool interpolate_always
= true;
982 assert(fsio
->reg
> 0 && fsio
->reg
<= ARRAY_SIZE(info
->varyings
));
984 if (fsio
->reg
> info
->num_varyings
)
985 info
->num_varyings
= fsio
->reg
;
987 varying
= &info
->varyings
[fsio
->reg
- 1];
988 varying
->num_components
= fsio
->num_components
;
990 if (!interpolate_always
) /* colors affected by flat shading */
991 varying
->pa_attributes
= 0x200;
992 else /* texture coord or other bypasses flat shading */
993 varying
->pa_attributes
= 0x2f1;
995 varying
->use
[0] = VARYING_COMPONENT_USE_UNUSED
;
996 varying
->use
[1] = VARYING_COMPONENT_USE_UNUSED
;
997 varying
->use
[2] = VARYING_COMPONENT_USE_UNUSED
;
998 varying
->use
[3] = VARYING_COMPONENT_USE_UNUSED
;
1000 /* point coord is an input to the PS without matching VS output,
1001 * so it gets a varying slot without being assigned a VS register.
1003 if (fsio
->slot
== VARYING_SLOT_PNTC
) {
1004 varying
->use
[0] = VARYING_COMPONENT_USE_POINTCOORD_X
;
1005 varying
->use
[1] = VARYING_COMPONENT_USE_POINTCOORD_Y
;
1007 info
->pcoord_varying_comp_ofs
= comp_ofs
;
1009 if (vsio
== NULL
) { /* not found -- link error */
1010 BUG("Semantic value not found in vertex shader outputs\n");
1013 varying
->reg
= vsio
->reg
;
1016 comp_ofs
+= varying
->num_components
;
1019 assert(info
->num_varyings
== fs
->infile
.num_reg
);