2 * Copyright (c) 2012-2019 Etnaviv Project
3 * Copyright (c) 2019 Zodiac Inflight Innovations
5 * Permission is hereby granted, free of charge, to any person obtaining a
6 * copy of this software and associated documentation files (the "Software"),
7 * to deal in the Software without restriction, including without limitation
8 * the rights to use, copy, modify, merge, publish, distribute, sub license,
9 * and/or sell copies of the Software, and to permit persons to whom the
10 * Software is furnished to do so, subject to the following conditions:
12 * The above copyright notice and this permission notice (including the
13 * next paragraph) shall be included in all copies or substantial portions
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
22 * DEALINGS IN THE SOFTWARE.
25 * Jonathan Marek <jonathan@marek.ca>
26 * Wladimir J. van der Laan <laanwj@gmail.com>
29 #include "etnaviv_compiler.h"
30 #include "etnaviv_asm.h"
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_disasm.h"
34 #include "etnaviv_uniforms.h"
35 #include "etnaviv_util.h"
38 #include "util/u_memory.h"
39 #include "util/register_allocate.h"
40 #include "compiler/nir/nir_builder.h"
41 #include "compiler/nir/nir_worklist.h"
43 #include "tgsi/tgsi_strings.h"
44 #include "util/u_half.h"
48 #define is_fs(c) ((c)->nir->info.stage == MESA_SHADER_FRAGMENT)
49 const struct etna_specs
*specs
;
50 struct etna_shader_variant
*variant
;
52 /* block # to instr index */
56 int inst_ptr
; /* current instruction pointer */
57 struct etna_inst code
[ETNA_MAX_INSTRUCTIONS
* ETNA_INST_SIZE
];
60 uint64_t consts
[ETNA_MAX_IMM
];
62 /* There was an error during compilation */
66 /* io related lowering
67 * run after lower_int_to_float because it adds i2f/f2i ops
70 etna_lower_io(nir_shader
*shader
, struct etna_shader_variant
*v
)
72 nir_foreach_function(function
, shader
) {
74 nir_builder_init(&b
, function
->impl
);
76 nir_foreach_block(block
, function
->impl
) {
77 nir_foreach_instr_safe(instr
, block
) {
78 if (instr
->type
== nir_instr_type_intrinsic
) {
79 nir_intrinsic_instr
*intr
= nir_instr_as_intrinsic(instr
);
81 switch (intr
->intrinsic
) {
82 case nir_intrinsic_load_front_face
: {
83 /* HW front_face is 0.0/1.0, not 0/~0u for bool
84 * lower with a comparison with 0
86 intr
->dest
.ssa
.bit_size
= 32;
88 b
.cursor
= nir_after_instr(instr
);
90 nir_ssa_def
*ssa
= nir_ine(&b
, &intr
->dest
.ssa
, nir_imm_int(&b
, 0));
92 nir_instr_as_alu(ssa
->parent_instr
)->op
= nir_op_ieq
;
94 nir_ssa_def_rewrite_uses_after(&intr
->dest
.ssa
,
98 case nir_intrinsic_store_deref
: {
99 nir_deref_instr
*deref
= nir_src_as_deref(intr
->src
[0]);
100 if (shader
->info
.stage
!= MESA_SHADER_FRAGMENT
|| !v
->key
.frag_rb_swap
)
103 assert(deref
->deref_type
== nir_deref_type_var
);
105 if (deref
->var
->data
.location
!= FRAG_RESULT_COLOR
&&
106 deref
->var
->data
.location
!= FRAG_RESULT_DATA0
)
109 b
.cursor
= nir_before_instr(instr
);
111 nir_ssa_def
*ssa
= nir_mov(&b
, intr
->src
[1].ssa
);
112 nir_alu_instr
*alu
= nir_instr_as_alu(ssa
->parent_instr
);
113 alu
->src
[0].swizzle
[0] = 2;
114 alu
->src
[0].swizzle
[2] = 0;
115 nir_instr_rewrite_src(instr
, &intr
->src
[1], nir_src_for_ssa(ssa
));
117 case nir_intrinsic_load_uniform
: {
118 /* multiply by 16 and convert to int */
119 b
.cursor
= nir_before_instr(instr
);
120 nir_ssa_def
*ssa
= nir_imul(&b
, intr
->src
[0].ssa
, nir_imm_int(&b
, 16));
121 nir_instr_rewrite_src(instr
, &intr
->src
[0], nir_src_for_ssa(ssa
));
128 if (instr
->type
!= nir_instr_type_tex
)
131 nir_tex_instr
*tex
= nir_instr_as_tex(instr
);
132 nir_src
*coord
= NULL
;
133 nir_src
*lod_bias
= NULL
;
134 unsigned lod_bias_idx
;
136 assert(tex
->sampler_index
== tex
->texture_index
);
138 for (unsigned i
= 0; i
< tex
->num_srcs
; i
++) {
139 switch (tex
->src
[i
].src_type
) {
140 case nir_tex_src_coord
:
141 coord
= &tex
->src
[i
].src
;
143 case nir_tex_src_bias
:
144 case nir_tex_src_lod
:
146 lod_bias
= &tex
->src
[i
].src
;
149 case nir_tex_src_comparator
:
157 if (tex
->sampler_dim
== GLSL_SAMPLER_DIM_RECT
) {
158 /* use a dummy load_uniform here to represent texcoord scale */
159 b
.cursor
= nir_before_instr(instr
);
160 nir_intrinsic_instr
*load
=
161 nir_intrinsic_instr_create(b
.shader
, nir_intrinsic_load_uniform
);
162 nir_intrinsic_set_base(load
, ~tex
->sampler_index
);
163 load
->num_components
= 2;
164 load
->src
[0] = nir_src_for_ssa(nir_imm_float(&b
, 0.0f
));
165 nir_ssa_dest_init(&load
->instr
, &load
->dest
, 2, 32, NULL
);
166 nir_intrinsic_set_type(load
, nir_type_float
);
168 nir_builder_instr_insert(&b
, &load
->instr
);
170 nir_ssa_def
*new_coord
= nir_fmul(&b
, coord
->ssa
, &load
->dest
.ssa
);
171 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(new_coord
));
174 /* pre HALTI5 needs texture sources in a single source */
176 if (!lod_bias
|| v
->shader
->specs
->halti
>= 5)
179 assert(coord
&& lod_bias
&& tex
->coord_components
< 4);
181 nir_alu_instr
*vec
= nir_alu_instr_create(shader
, nir_op_vec4
);
182 for (unsigned i
= 0; i
< tex
->coord_components
; i
++) {
183 vec
->src
[i
].src
= nir_src_for_ssa(coord
->ssa
);
184 vec
->src
[i
].swizzle
[0] = i
;
186 for (unsigned i
= tex
->coord_components
; i
< 4; i
++)
187 vec
->src
[i
].src
= nir_src_for_ssa(lod_bias
->ssa
);
189 vec
->dest
.write_mask
= 0xf;
190 nir_ssa_dest_init(&vec
->instr
, &vec
->dest
.dest
, 4, 32, NULL
);
192 nir_tex_instr_remove_src(tex
, lod_bias_idx
);
193 nir_instr_rewrite_src(&tex
->instr
, coord
, nir_src_for_ssa(&vec
->dest
.dest
.ssa
));
194 tex
->coord_components
= 4;
196 nir_instr_insert_before(&tex
->instr
, &vec
->instr
);
203 etna_alu_to_scalar_filter_cb(const nir_instr
*instr
, const void *data
)
205 const struct etna_specs
*specs
= data
;
207 if (instr
->type
!= nir_instr_type_alu
)
210 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
222 /* TODO: can do better than alu_to_scalar for vector compares */
223 case nir_op_b32all_fequal2
:
224 case nir_op_b32all_fequal3
:
225 case nir_op_b32all_fequal4
:
226 case nir_op_b32any_fnequal2
:
227 case nir_op_b32any_fnequal3
:
228 case nir_op_b32any_fnequal4
:
229 case nir_op_b32all_iequal2
:
230 case nir_op_b32all_iequal3
:
231 case nir_op_b32all_iequal4
:
232 case nir_op_b32any_inequal2
:
233 case nir_op_b32any_inequal3
:
234 case nir_op_b32any_inequal4
:
237 if (!specs
->has_halti2_instructions
)
248 etna_lower_alu_impl(nir_function_impl
*impl
, struct etna_compile
*c
)
250 nir_shader
*shader
= impl
->function
->shader
;
253 nir_builder_init(&b
, impl
);
255 /* in a seperate loop so we can apply the multiple-uniform logic to the new fmul */
256 nir_foreach_block(block
, impl
) {
257 nir_foreach_instr_safe(instr
, block
) {
258 if (instr
->type
!= nir_instr_type_alu
)
261 nir_alu_instr
*alu
= nir_instr_as_alu(instr
);
262 /* multiply sin/cos src by constant
263 * TODO: do this earlier (but it breaks const_prop opt)
265 if (alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
) {
266 b
.cursor
= nir_before_instr(instr
);
268 nir_ssa_def
*imm
= c
->specs
->has_new_transcendentals
?
269 nir_imm_float(&b
, 1.0 / M_PI
) :
270 nir_imm_float(&b
, 2.0 / M_PI
);
272 nir_instr_rewrite_src(instr
, &alu
->src
[0].src
,
273 nir_src_for_ssa(nir_fmul(&b
, alu
->src
[0].src
.ssa
, imm
)));
276 /* change transcendental ops to vec2 and insert vec1 mul for the result
277 * TODO: do this earlier (but it breaks with optimizations)
279 if (c
->specs
->has_new_transcendentals
&& (
280 alu
->op
== nir_op_fdiv
|| alu
->op
== nir_op_flog2
||
281 alu
->op
== nir_op_fsin
|| alu
->op
== nir_op_fcos
)) {
282 nir_ssa_def
*ssa
= &alu
->dest
.dest
.ssa
;
284 assert(ssa
->num_components
== 1);
286 nir_alu_instr
*mul
= nir_alu_instr_create(shader
, nir_op_fmul
);
287 mul
->src
[0].src
= mul
->src
[1].src
= nir_src_for_ssa(ssa
);
288 mul
->src
[1].swizzle
[0] = 1;
290 mul
->dest
.write_mask
= 1;
291 nir_ssa_dest_init(&mul
->instr
, &mul
->dest
.dest
, 1, 32, NULL
);
293 ssa
->num_components
= 2;
295 mul
->dest
.saturate
= alu
->dest
.saturate
;
296 alu
->dest
.saturate
= 0;
298 nir_instr_insert_after(instr
, &mul
->instr
);
300 nir_ssa_def_rewrite_uses_after(ssa
, nir_src_for_ssa(&mul
->dest
.dest
.ssa
), &mul
->instr
);
306 static void etna_lower_alu(nir_shader
*shader
, struct etna_compile
*c
)
308 nir_foreach_function(function
, shader
) {
310 etna_lower_alu_impl(function
->impl
, c
);
315 emit_inst(struct etna_compile
*c
, struct etna_inst
*inst
)
317 c
->code
[c
->inst_ptr
++] = *inst
;
320 /* to map nir srcs should to etna_inst srcs */
322 SRC_0_1_2
= (0 << 0) | (1 << 2) | (2 << 4),
323 SRC_0_1_X
= (0 << 0) | (1 << 2) | (3 << 4),
324 SRC_0_X_X
= (0 << 0) | (3 << 2) | (3 << 4),
325 SRC_0_X_1
= (0 << 0) | (3 << 2) | (1 << 4),
326 SRC_0_1_0
= (0 << 0) | (1 << 2) | (0 << 4),
327 SRC_X_X_0
= (3 << 0) | (3 << 2) | (0 << 4),
328 SRC_0_X_0
= (0 << 0) | (3 << 2) | (0 << 4),
331 /* info to translate a nir op to etna_inst */
332 struct etna_op_info
{
333 uint8_t opcode
; /* INST_OPCODE_ */
334 uint8_t src
; /* SRC_ enum */
335 uint8_t cond
; /* INST_CONDITION_ */
336 uint8_t type
; /* INST_TYPE_ */
339 static const struct etna_op_info etna_ops
[] = {
340 [0 ... nir_num_opcodes
- 1] = {0xff},
343 #define OPCT(nir, op, src, cond, type) [nir_op_##nir] = { \
346 INST_CONDITION_##cond, \
349 #define OPC(nir, op, src, cond) OPCT(nir, op, src, cond, F32)
350 #define IOPC(nir, op, src, cond) OPCT(nir, op, src, cond, S32)
351 #define UOPC(nir, op, src, cond) OPCT(nir, op, src, cond, U32)
352 #define OP(nir, op, src) OPC(nir, op, src, TRUE)
353 #define IOP(nir, op, src) IOPC(nir, op, src, TRUE)
354 #define UOP(nir, op, src) UOPC(nir, op, src, TRUE)
355 OP(mov
, MOV
, X_X_0
), OP(fneg
, MOV
, X_X_0
), OP(fabs
, MOV
, X_X_0
), OP(fsat
, MOV
, X_X_0
),
356 OP(fmul
, MUL
, 0_1_X
), OP(fadd
, ADD
, 0_X_1
), OP(ffma
, MAD
, 0_1_2
),
357 OP(fdot2
, DP2
, 0_1_X
), OP(fdot3
, DP3
, 0_1_X
), OP(fdot4
, DP4
, 0_1_X
),
358 OPC(fmin
, SELECT
, 0_1_0
, GT
), OPC(fmax
, SELECT
, 0_1_0
, LT
),
359 OP(ffract
, FRC
, X_X_0
), OP(frcp
, RCP
, X_X_0
), OP(frsq
, RSQ
, X_X_0
),
360 OP(fsqrt
, SQRT
, X_X_0
), OP(fsin
, SIN
, X_X_0
), OP(fcos
, COS
, X_X_0
),
361 OP(fsign
, SIGN
, X_X_0
), OP(ffloor
, FLOOR
, X_X_0
), OP(fceil
, CEIL
, X_X_0
),
362 OP(flog2
, LOG
, X_X_0
), OP(fexp2
, EXP
, X_X_0
),
363 OPC(seq
, SET
, 0_1_X
, EQ
), OPC(sne
, SET
, 0_1_X
, NE
), OPC(sge
, SET
, 0_1_X
, GE
), OPC(slt
, SET
, 0_1_X
, LT
),
364 OPC(fcsel
, SELECT
, 0_1_2
, NZ
),
365 OP(fdiv
, DIV
, 0_1_X
),
366 OP(fddx
, DSX
, 0_X_0
), OP(fddy
, DSY
, 0_X_0
),
369 IOP(i2f32
, I2F
, 0_X_X
),
370 UOP(u2f32
, I2F
, 0_X_X
),
371 IOP(f2i32
, F2I
, 0_X_X
),
372 UOP(f2u32
, F2I
, 0_X_X
),
373 UOP(b2f32
, AND
, 0_X_X
), /* AND with fui(1.0f) */
374 UOP(b2i32
, AND
, 0_X_X
), /* AND with 1 */
375 OPC(f2b32
, CMP
, 0_X_X
, NE
), /* != 0.0 */
376 UOPC(i2b32
, CMP
, 0_X_X
, NE
), /* != 0 */
379 IOP(iadd
, ADD
, 0_X_1
),
380 IOP(imul
, IMULLO0
, 0_1_X
),
381 /* IOP(imad, IMADLO0, 0_1_2), */
382 IOP(ineg
, ADD
, X_X_0
), /* ADD 0, -x */
383 IOP(iabs
, IABS
, X_X_0
),
384 IOP(isign
, SIGN
, X_X_0
),
385 IOPC(imin
, SELECT
, 0_1_0
, GT
),
386 IOPC(imax
, SELECT
, 0_1_0
, LT
),
387 UOPC(umin
, SELECT
, 0_1_0
, GT
),
388 UOPC(umax
, SELECT
, 0_1_0
, LT
),
391 UOPC(b32csel
, SELECT
, 0_1_2
, NZ
),
393 /* compare with int result */
394 OPC(feq32
, CMP
, 0_1_X
, EQ
),
395 OPC(fne32
, CMP
, 0_1_X
, NE
),
396 OPC(fge32
, CMP
, 0_1_X
, GE
),
397 OPC(flt32
, CMP
, 0_1_X
, LT
),
398 IOPC(ieq32
, CMP
, 0_1_X
, EQ
),
399 IOPC(ine32
, CMP
, 0_1_X
, NE
),
400 IOPC(ige32
, CMP
, 0_1_X
, GE
),
401 IOPC(ilt32
, CMP
, 0_1_X
, LT
),
402 UOPC(uge32
, CMP
, 0_1_X
, GE
),
403 UOPC(ult32
, CMP
, 0_1_X
, LT
),
407 IOP(iand
, AND
, 0_X_1
),
408 IOP(ixor
, XOR
, 0_X_1
),
409 IOP(inot
, NOT
, X_X_0
),
410 IOP(ishl
, LSHIFT
, 0_X_1
),
411 IOP(ishr
, RSHIFT
, 0_X_1
),
412 UOP(ushr
, RSHIFT
, 0_X_1
),
416 etna_emit_block_start(struct etna_compile
*c
, unsigned block
)
418 c
->block_ptr
[block
] = c
->inst_ptr
;
422 etna_emit_alu(struct etna_compile
*c
, nir_op op
, struct etna_inst_dst dst
,
423 struct etna_inst_src src
[3], bool saturate
)
425 struct etna_op_info ei
= etna_ops
[op
];
426 unsigned swiz_scalar
= INST_SWIZ_BROADCAST(ffs(dst
.write_mask
) - 1);
428 assert(ei
.opcode
!= 0xff);
430 struct etna_inst inst
= {
443 if (c
->specs
->has_new_transcendentals
)
451 /* scalar instructions we want src to be in x component */
452 src
[0].swiz
= inst_swiz_compose(src
[0].swiz
, swiz_scalar
);
453 src
[1].swiz
= inst_swiz_compose(src
[1].swiz
, swiz_scalar
);
455 /* deal with instructions which don't have 1:1 mapping */
457 inst
.src
[2] = etna_immediate_float(1.0f
);
460 inst
.src
[2] = etna_immediate_int(1);
463 inst
.src
[1] = etna_immediate_float(0.0f
);
466 inst
.src
[1] = etna_immediate_int(0);
469 inst
.src
[0] = etna_immediate_int(0);
476 /* set the "true" value for CMP instructions */
477 if (inst
.opcode
== INST_OPCODE_CMP
)
478 inst
.src
[2] = etna_immediate_int(-1);
480 for (unsigned j
= 0; j
< 3; j
++) {
481 unsigned i
= ((ei
.src
>> j
*2) & 3);
483 inst
.src
[j
] = src
[i
];
490 etna_emit_tex(struct etna_compile
*c
, nir_texop op
, unsigned texid
, unsigned dst_swiz
,
491 struct etna_inst_dst dst
, struct etna_inst_src coord
,
492 struct etna_inst_src lod_bias
, struct etna_inst_src compare
)
494 struct etna_inst inst
= {
496 .tex
.id
= texid
+ (is_fs(c
) ? 0 : c
->specs
->vertex_sampler_offset
),
497 .tex
.swiz
= dst_swiz
,
502 inst
.src
[1] = lod_bias
;
505 inst
.src
[2] = compare
;
508 case nir_texop_tex
: inst
.opcode
= INST_OPCODE_TEXLD
; break;
509 case nir_texop_txb
: inst
.opcode
= INST_OPCODE_TEXLDB
; break;
510 case nir_texop_txl
: inst
.opcode
= INST_OPCODE_TEXLDL
; break;
519 etna_emit_jump(struct etna_compile
*c
, unsigned block
, struct etna_inst_src condition
)
521 if (!condition
.use
) {
522 emit_inst(c
, &(struct etna_inst
) {.opcode
= INST_OPCODE_BRANCH
, .imm
= block
});
526 struct etna_inst inst
= {
527 .opcode
= INST_OPCODE_BRANCH
,
528 .cond
= INST_CONDITION_NOT
,
529 .type
= INST_TYPE_U32
,
533 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
538 etna_emit_discard(struct etna_compile
*c
, struct etna_inst_src condition
)
540 if (!condition
.use
) {
541 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_TEXKILL
});
545 struct etna_inst inst
= {
546 .opcode
= INST_OPCODE_TEXKILL
,
547 .cond
= INST_CONDITION_NZ
,
548 .type
= (c
->specs
->halti
< 2) ? INST_TYPE_F32
: INST_TYPE_U32
,
551 inst
.src
[0].swiz
= INST_SWIZ_BROADCAST(inst
.src
[0].swiz
& 3);
556 etna_emit_output(struct etna_compile
*c
, nir_variable
*var
, struct etna_inst_src src
)
558 struct etna_shader_io_file
*sf
= &c
->variant
->outfile
;
561 switch (var
->data
.location
) {
562 case FRAG_RESULT_COLOR
:
563 case FRAG_RESULT_DATA0
: /* DATA0 is used by gallium shaders for color */
564 c
->variant
->ps_color_out_reg
= src
.reg
;
566 case FRAG_RESULT_DEPTH
:
567 c
->variant
->ps_depth_out_reg
= src
.reg
;
570 unreachable("Unsupported fs output");
575 switch (var
->data
.location
) {
576 case VARYING_SLOT_POS
:
577 c
->variant
->vs_pos_out_reg
= src
.reg
;
579 case VARYING_SLOT_PSIZ
:
580 c
->variant
->vs_pointsize_out_reg
= src
.reg
;
583 sf
->reg
[sf
->num_reg
].reg
= src
.reg
;
584 sf
->reg
[sf
->num_reg
].slot
= var
->data
.location
;
585 sf
->reg
[sf
->num_reg
].num_components
= glsl_get_components(var
->type
);
592 etna_emit_load_ubo(struct etna_compile
*c
, struct etna_inst_dst dst
,
593 struct etna_inst_src src
, struct etna_inst_src base
)
595 /* convert float offset back to integer */
596 if (c
->specs
->halti
< 2) {
597 emit_inst(c
, &(struct etna_inst
) {
598 .opcode
= INST_OPCODE_F2I
,
599 .type
= INST_TYPE_U32
,
604 emit_inst(c
, &(struct etna_inst
) {
605 .opcode
= INST_OPCODE_LOAD
,
606 .type
= INST_TYPE_U32
,
610 .rgroup
= INST_RGROUP_TEMP
,
612 .swiz
= INST_SWIZ_BROADCAST(ffs(dst
.write_mask
) - 1)
620 emit_inst(c
, &(struct etna_inst
) {
621 .opcode
= INST_OPCODE_LOAD
,
622 .type
= INST_TYPE_U32
,
629 #define OPT(nir, pass, ...) ({ \
630 bool this_progress = false; \
631 NIR_PASS(this_progress, nir, pass, ##__VA_ARGS__); \
634 #define OPT_V(nir, pass, ...) NIR_PASS_V(nir, pass, ##__VA_ARGS__)
637 etna_optimize_loop(nir_shader
*s
)
643 OPT_V(s
, nir_lower_vars_to_ssa
);
644 progress
|= OPT(s
, nir_opt_copy_prop_vars
);
645 progress
|= OPT(s
, nir_copy_prop
);
646 progress
|= OPT(s
, nir_opt_dce
);
647 progress
|= OPT(s
, nir_opt_cse
);
648 progress
|= OPT(s
, nir_opt_peephole_select
, 16, true, true);
649 progress
|= OPT(s
, nir_opt_intrinsics
);
650 progress
|= OPT(s
, nir_opt_algebraic
);
651 progress
|= OPT(s
, nir_opt_constant_folding
);
652 progress
|= OPT(s
, nir_opt_dead_cf
);
653 if (OPT(s
, nir_opt_trivial_continues
)) {
655 /* If nir_opt_trivial_continues makes progress, then we need to clean
656 * things up if we want any hope of nir_opt_if or nir_opt_loop_unroll
659 OPT(s
, nir_copy_prop
);
662 progress
|= OPT(s
, nir_opt_loop_unroll
, nir_var_all
);
663 progress
|= OPT(s
, nir_opt_if
, false);
664 progress
|= OPT(s
, nir_opt_remove_phis
);
665 progress
|= OPT(s
, nir_opt_undef
);
671 etna_glsl_type_size(const struct glsl_type
*type
, bool bindless
)
673 return glsl_count_attribute_slots(type
, false);
677 copy_uniform_state_to_shader(struct etna_shader_variant
*sobj
, uint64_t *consts
, unsigned count
)
679 struct etna_shader_uniform_info
*uinfo
= &sobj
->uniforms
;
681 uinfo
->imm_count
= count
* 4;
682 uinfo
->imm_data
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_data
));
683 uinfo
->imm_contents
= MALLOC(uinfo
->imm_count
* sizeof(*uinfo
->imm_contents
));
685 for (unsigned i
= 0; i
< uinfo
->imm_count
; i
++) {
686 uinfo
->imm_data
[i
] = consts
[i
];
687 uinfo
->imm_contents
[i
] = consts
[i
] >> 32;
690 etna_set_shader_uniforms_dirty_flags(sobj
);
693 #include "etnaviv_compiler_nir_emit.h"
696 etna_compile_shader_nir(struct etna_shader_variant
*v
)
701 struct etna_compile
*c
= CALLOC_STRUCT(etna_compile
);
706 c
->specs
= v
->shader
->specs
;
707 c
->nir
= nir_shader_clone(NULL
, v
->shader
->nir
);
709 nir_shader
*s
= c
->nir
;
710 const struct etna_specs
*specs
= c
->specs
;
712 v
->stage
= s
->info
.stage
;
713 v
->num_loops
= 0; /* TODO */
714 v
->vs_id_in_reg
= -1;
715 v
->vs_pos_out_reg
= -1;
716 v
->vs_pointsize_out_reg
= -1;
717 v
->ps_color_out_reg
= 0; /* 0 for shader that doesn't write fragcolor.. */
718 v
->ps_depth_out_reg
= -1;
720 /* setup input linking */
721 struct etna_shader_io_file
*sf
= &v
->infile
;
722 if (s
->info
.stage
== MESA_SHADER_VERTEX
) {
723 nir_foreach_variable(var
, &s
->inputs
) {
724 unsigned idx
= var
->data
.driver_location
;
725 sf
->reg
[idx
].reg
= idx
;
726 sf
->reg
[idx
].slot
= var
->data
.location
;
727 sf
->reg
[idx
].num_components
= glsl_get_components(var
->type
);
728 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
732 nir_foreach_variable(var
, &s
->inputs
) {
733 unsigned idx
= var
->data
.driver_location
;
734 sf
->reg
[idx
].reg
= idx
+ 1;
735 sf
->reg
[idx
].slot
= var
->data
.location
;
736 sf
->reg
[idx
].num_components
= glsl_get_components(var
->type
);
737 sf
->num_reg
= MAX2(sf
->num_reg
, idx
+1);
740 assert(sf
->num_reg
== count
);
743 NIR_PASS_V(s
, nir_lower_io
, ~nir_var_shader_out
, etna_glsl_type_size
,
744 (nir_lower_io_options
)0);
746 OPT_V(s
, nir_lower_regs_to_ssa
);
747 OPT_V(s
, nir_lower_vars_to_ssa
);
748 OPT_V(s
, nir_lower_indirect_derefs
, nir_var_all
);
749 OPT_V(s
, nir_lower_tex
, &(struct nir_lower_tex_options
) { .lower_txp
= ~0u });
750 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
752 etna_optimize_loop(s
);
754 OPT_V(s
, etna_lower_io
, v
);
756 if (v
->shader
->specs
->vs_need_z_div
)
757 NIR_PASS_V(s
, nir_lower_clip_halfz
);
759 /* lower pre-halti2 to float (halti0 has integers, but only scalar..) */
760 if (c
->specs
->halti
< 2) {
761 /* use opt_algebraic between int_to_float and boot_to_float because
762 * int_to_float emits ftrunc, and ftrunc lowering generates bool ops
764 OPT_V(s
, nir_lower_int_to_float
);
765 OPT_V(s
, nir_opt_algebraic
);
766 OPT_V(s
, nir_lower_bool_to_float
);
768 OPT_V(s
, nir_lower_idiv
, nir_lower_idiv_fast
);
769 OPT_V(s
, nir_lower_bool_to_int32
);
772 etna_optimize_loop(s
);
774 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
775 nir_print_shader(s
, stdout
);
777 while( OPT(s
, nir_opt_vectorize
) );
778 OPT_V(s
, nir_lower_alu_to_scalar
, etna_alu_to_scalar_filter_cb
, specs
);
780 NIR_PASS_V(s
, nir_remove_dead_variables
, nir_var_function_temp
);
781 NIR_PASS_V(s
, nir_opt_algebraic_late
);
783 NIR_PASS_V(s
, nir_move_vec_src_uses_to_dest
);
784 NIR_PASS_V(s
, nir_copy_prop
);
785 /* only HW supported integer source mod is ineg for iadd instruction (?) */
786 NIR_PASS_V(s
, nir_lower_to_source_mods
, ~nir_lower_int_source_mods
);
787 /* need copy prop after uses_to_dest, and before src mods: see
788 * dEQP-GLES2.functional.shaders.random.all_features.fragment.95
791 NIR_PASS_V(s
, nir_opt_dce
);
793 NIR_PASS_V(s
, etna_lower_alu
, c
);
795 if (DBG_ENABLED(ETNA_DBG_DUMP_SHADERS
))
796 nir_print_shader(s
, stdout
);
798 unsigned block_ptr
[nir_shader_get_entrypoint(s
)->num_blocks
];
799 c
->block_ptr
= block_ptr
;
802 ASSERTED
bool ok
= emit_shader(c
, &v
->num_temps
, &num_consts
);
805 /* empty shader, emit NOP */
807 emit_inst(c
, &(struct etna_inst
) { .opcode
= INST_OPCODE_NOP
});
809 /* assemble instructions, fixing up labels */
810 uint32_t *code
= MALLOC(c
->inst_ptr
* 16);
811 for (unsigned i
= 0; i
< c
->inst_ptr
; i
++) {
812 struct etna_inst
*inst
= &c
->code
[i
];
813 if (inst
->opcode
== INST_OPCODE_BRANCH
)
814 inst
->imm
= block_ptr
[inst
->imm
];
816 inst
->halti5
= specs
->halti
>= 5;
817 etna_assemble(&code
[i
* 4], inst
);
820 v
->code_size
= c
->inst_ptr
* 4;
822 v
->needs_icache
= c
->inst_ptr
> specs
->max_instructions
;
824 copy_uniform_state_to_shader(v
, c
->consts
, num_consts
);
826 if (s
->info
.stage
== MESA_SHADER_FRAGMENT
) {
827 v
->input_count_unk8
= 31; /* XXX what is this */
828 assert(v
->ps_depth_out_reg
<= 0);
834 v
->input_count_unk8
= DIV_ROUND_UP(v
->infile
.num_reg
+ 4, 16); /* XXX what is this */
836 /* fill in "mystery meat" load balancing value. This value determines how
837 * work is scheduled between VS and PS
838 * in the unified shader architecture. More precisely, it is determined from
839 * the number of VS outputs, as well as chip-specific
840 * vertex output buffer size, vertex cache size, and the number of shader
843 * XXX this is a conservative estimate, the "optimal" value is only known for
844 * sure at link time because some
845 * outputs may be unused and thus unmapped. Then again, in the general use
846 * case with GLSL the vertex and fragment
847 * shaders are linked already before submitting to Gallium, thus all outputs
850 * note: TGSI compiler counts all outputs (including position and pointsize), here
851 * v->outfile.num_reg only counts varyings, +1 to compensate for the position output
852 * TODO: might have a problem that we don't count pointsize when it is used
855 int half_out
= v
->outfile
.num_reg
/ 2 + 1;
858 uint32_t b
= ((20480 / (specs
->vertex_output_buffer_size
-
859 2 * half_out
* specs
->vertex_cache_size
)) +
862 uint32_t a
= (b
+ 256 / (specs
->shader_core_count
* half_out
)) / 2;
863 v
->vs_load_balancing
= VIVS_VS_LOAD_BALANCING_A(MIN2(a
, 255)) |
864 VIVS_VS_LOAD_BALANCING_B(MIN2(b
, 255)) |
865 VIVS_VS_LOAD_BALANCING_C(0x3f) |
866 VIVS_VS_LOAD_BALANCING_D(0x0f);
874 etna_destroy_shader_nir(struct etna_shader_variant
*shader
)
879 FREE(shader
->uniforms
.imm_data
);
880 FREE(shader
->uniforms
.imm_contents
);
884 extern const char *tgsi_swizzle_names
[];
886 etna_dump_shader_nir(const struct etna_shader_variant
*shader
)
888 if (shader
->stage
== MESA_SHADER_VERTEX
)
893 etna_disasm(shader
->code
, shader
->code_size
, PRINT_RAW
);
895 printf("num loops: %i\n", shader
->num_loops
);
896 printf("num temps: %i\n", shader
->num_temps
);
897 printf("immediates:\n");
898 for (int idx
= 0; idx
< shader
->uniforms
.imm_count
; ++idx
) {
899 printf(" [%i].%s = %f (0x%08x) (%d)\n",
901 tgsi_swizzle_names
[idx
% 4],
902 *((float *)&shader
->uniforms
.imm_data
[idx
]),
903 shader
->uniforms
.imm_data
[idx
],
904 shader
->uniforms
.imm_contents
[idx
]);
907 for (int idx
= 0; idx
< shader
->infile
.num_reg
; ++idx
) {
908 printf(" [%i] name=%s comps=%i\n", shader
->infile
.reg
[idx
].reg
,
909 (shader
->stage
== MESA_SHADER_VERTEX
) ?
910 gl_vert_attrib_name(shader
->infile
.reg
[idx
].slot
) :
911 gl_varying_slot_name(shader
->infile
.reg
[idx
].slot
),
912 shader
->infile
.reg
[idx
].num_components
);
914 printf("outputs:\n");
915 for (int idx
= 0; idx
< shader
->outfile
.num_reg
; ++idx
) {
916 printf(" [%i] name=%s comps=%i\n", shader
->outfile
.reg
[idx
].reg
,
917 (shader
->stage
== MESA_SHADER_VERTEX
) ?
918 gl_varying_slot_name(shader
->outfile
.reg
[idx
].slot
) :
919 gl_frag_result_name(shader
->outfile
.reg
[idx
].slot
),
920 shader
->outfile
.reg
[idx
].num_components
);
922 printf("special:\n");
923 if (shader
->stage
== MESA_SHADER_VERTEX
) {
924 printf(" vs_pos_out_reg=%i\n", shader
->vs_pos_out_reg
);
925 printf(" vs_pointsize_out_reg=%i\n", shader
->vs_pointsize_out_reg
);
926 printf(" vs_load_balancing=0x%08x\n", shader
->vs_load_balancing
);
928 printf(" ps_color_out_reg=%i\n", shader
->ps_color_out_reg
);
929 printf(" ps_depth_out_reg=%i\n", shader
->ps_depth_out_reg
);
931 printf(" input_count_unk8=0x%08x\n", shader
->input_count_unk8
);
934 static const struct etna_shader_inout
*
935 etna_shader_vs_lookup(const struct etna_shader_variant
*sobj
,
936 const struct etna_shader_inout
*in
)
938 for (int i
= 0; i
< sobj
->outfile
.num_reg
; i
++)
939 if (sobj
->outfile
.reg
[i
].slot
== in
->slot
)
940 return &sobj
->outfile
.reg
[i
];
946 etna_link_shader_nir(struct etna_shader_link_info
*info
,
947 const struct etna_shader_variant
*vs
,
948 const struct etna_shader_variant
*fs
)
951 /* For each fragment input we need to find the associated vertex shader
952 * output, which can be found by matching on semantic name and index. A
953 * binary search could be used because the vs outputs are sorted by their
954 * semantic index and grouped by semantic type by fill_in_vs_outputs.
956 assert(fs
->infile
.num_reg
< ETNA_NUM_INPUTS
);
957 info
->pcoord_varying_comp_ofs
= -1;
959 for (int idx
= 0; idx
< fs
->infile
.num_reg
; ++idx
) {
960 const struct etna_shader_inout
*fsio
= &fs
->infile
.reg
[idx
];
961 const struct etna_shader_inout
*vsio
= etna_shader_vs_lookup(vs
, fsio
);
962 struct etna_varying
*varying
;
963 bool interpolate_always
= true;
965 assert(fsio
->reg
> 0 && fsio
->reg
<= ARRAY_SIZE(info
->varyings
));
967 if (fsio
->reg
> info
->num_varyings
)
968 info
->num_varyings
= fsio
->reg
;
970 varying
= &info
->varyings
[fsio
->reg
- 1];
971 varying
->num_components
= fsio
->num_components
;
973 if (!interpolate_always
) /* colors affected by flat shading */
974 varying
->pa_attributes
= 0x200;
975 else /* texture coord or other bypasses flat shading */
976 varying
->pa_attributes
= 0x2f1;
978 varying
->use
[0] = VARYING_COMPONENT_USE_UNUSED
;
979 varying
->use
[1] = VARYING_COMPONENT_USE_UNUSED
;
980 varying
->use
[2] = VARYING_COMPONENT_USE_UNUSED
;
981 varying
->use
[3] = VARYING_COMPONENT_USE_UNUSED
;
983 /* point coord is an input to the PS without matching VS output,
984 * so it gets a varying slot without being assigned a VS register.
986 if (fsio
->slot
== VARYING_SLOT_PNTC
) {
987 varying
->use
[0] = VARYING_COMPONENT_USE_POINTCOORD_X
;
988 varying
->use
[1] = VARYING_COMPONENT_USE_POINTCOORD_Y
;
990 info
->pcoord_varying_comp_ofs
= comp_ofs
;
992 if (vsio
== NULL
) { /* not found -- link error */
993 BUG("Semantic value not found in vertex shader outputs\n");
996 varying
->reg
= vsio
->reg
;
999 comp_ofs
+= varying
->num_components
;
1002 assert(info
->num_varyings
== fs
->infile
.num_reg
);