5bca37ca524efe6fe1dced45dc390d4012f012fc
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_context.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 * Christian Gmeiner <christian.gmeiner@gmail.com>
26 */
27
28 #include "etnaviv_context.h"
29
30 #include "etnaviv_blend.h"
31 #include "etnaviv_clear_blit.h"
32 #include "etnaviv_compiler.h"
33 #include "etnaviv_debug.h"
34 #include "etnaviv_emit.h"
35 #include "etnaviv_fence.h"
36 #include "etnaviv_query.h"
37 #include "etnaviv_query_hw.h"
38 #include "etnaviv_rasterizer.h"
39 #include "etnaviv_resource.h"
40 #include "etnaviv_screen.h"
41 #include "etnaviv_shader.h"
42 #include "etnaviv_state.h"
43 #include "etnaviv_surface.h"
44 #include "etnaviv_texture.h"
45 #include "etnaviv_transfer.h"
46 #include "etnaviv_translate.h"
47 #include "etnaviv_zsa.h"
48
49 #include "pipe/p_context.h"
50 #include "pipe/p_state.h"
51 #include "util/hash_table.h"
52 #include "util/u_blitter.h"
53 #include "util/u_helpers.h"
54 #include "util/u_memory.h"
55 #include "util/u_prim.h"
56 #include "util/u_upload_mgr.h"
57
58 #include "hw/common.xml.h"
59
60 static inline void
61 etna_emit_nop_with_data(struct etna_cmd_stream *stream, uint32_t value)
62 {
63 etna_cmd_stream_emit(stream, VIV_FE_NOP_HEADER_OP_NOP);
64 etna_cmd_stream_emit(stream, value);
65 }
66
67 static void
68 etna_emit_string_marker(struct pipe_context *pctx, const char *string, int len)
69 {
70 struct etna_context *ctx = etna_context(pctx);
71 struct etna_cmd_stream *stream = ctx->stream;
72 const uint32_t *buf = (const void *)string;
73
74 etna_cmd_stream_reserve(stream, len * 2);
75
76 while (len >= 4) {
77 etna_emit_nop_with_data(stream, *buf);
78 buf++;
79 len -= 4;
80 }
81
82 /* copy remainder bytes without reading past end of input string */
83 if (len > 0) {
84 uint32_t w = 0;
85 memcpy(&w, buf, len);
86 etna_emit_nop_with_data(stream, w);
87 }
88 }
89
90 static void
91 etna_context_destroy(struct pipe_context *pctx)
92 {
93 struct etna_context *ctx = etna_context(pctx);
94
95 mtx_lock(&ctx->lock);
96 if (ctx->used_resources_read) {
97
98 /*
99 * There should be no resources tracked in the context when it's being
100 * destroyed. Be sure there are none to avoid memory leaks on buggy
101 * programs.
102 */
103 set_foreach(ctx->used_resources_read, entry) {
104 struct etna_resource *rsc = (struct etna_resource *)entry->key;
105
106 _mesa_set_remove_key(rsc->pending_ctx, ctx);
107 }
108 _mesa_set_destroy(ctx->used_resources_read, NULL);
109
110 }
111 if (ctx->used_resources_write) {
112
113 /*
114 * There should be no resources tracked in the context when it's being
115 * destroyed. Be sure there are none to avoid memory leaks on buggy
116 * programs.
117 */
118 set_foreach(ctx->used_resources_write, entry) {
119 struct etna_resource *rsc = (struct etna_resource *)entry->key;
120
121 _mesa_set_remove_key(rsc->pending_ctx, ctx);
122 }
123 _mesa_set_destroy(ctx->used_resources_write, NULL);
124
125 }
126 mtx_unlock(&ctx->lock);
127
128 if (ctx->dummy_rt)
129 etna_bo_del(ctx->dummy_rt);
130
131 util_copy_framebuffer_state(&ctx->framebuffer_s, NULL);
132
133 if (ctx->primconvert)
134 util_primconvert_destroy(ctx->primconvert);
135
136 if (ctx->blitter)
137 util_blitter_destroy(ctx->blitter);
138
139 if (pctx->stream_uploader)
140 u_upload_destroy(pctx->stream_uploader);
141
142 if (ctx->stream)
143 etna_cmd_stream_del(ctx->stream);
144
145 slab_destroy_child(&ctx->transfer_pool);
146
147 if (ctx->in_fence_fd != -1)
148 close(ctx->in_fence_fd);
149
150 mtx_destroy(&ctx->lock);
151
152 FREE(pctx);
153 }
154
155 /* Update render state where needed based on draw operation */
156 static void
157 etna_update_state_for_draw(struct etna_context *ctx, const struct pipe_draw_info *info)
158 {
159 /* Handle primitive restart:
160 * - If not an indexed draw, we don't care about the state of the primitive restart bit.
161 * - Otherwise, set the bit in INDEX_STREAM_CONTROL in the index buffer state
162 * accordingly
163 * - If the value of the INDEX_STREAM_CONTROL register changed due to this, or
164 * primitive restart is enabled and the restart index changed, mark the index
165 * buffer state as dirty
166 */
167
168 if (info->index_size) {
169 uint32_t new_control = ctx->index_buffer.FE_INDEX_STREAM_CONTROL;
170
171 if (info->primitive_restart)
172 new_control |= VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
173 else
174 new_control &= ~VIVS_FE_INDEX_STREAM_CONTROL_PRIMITIVE_RESTART;
175
176 if (ctx->index_buffer.FE_INDEX_STREAM_CONTROL != new_control ||
177 (info->primitive_restart && ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX != info->restart_index)) {
178 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = new_control;
179 ctx->index_buffer.FE_PRIMITIVE_RESTART_INDEX = info->restart_index;
180 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
181 }
182 }
183 }
184
185 static bool
186 etna_get_vs(struct etna_context *ctx, struct etna_shader_key key)
187 {
188 const struct etna_shader_variant *old = ctx->shader.vs;
189
190 ctx->shader.vs = etna_shader_variant(ctx->shader.bind_vs, key, &ctx->debug);
191
192 if (!ctx->shader.vs)
193 return false;
194
195 if (old != ctx->shader.vs)
196 ctx->dirty |= ETNA_DIRTY_SHADER;
197
198 return true;
199 }
200
201 static bool
202 etna_get_fs(struct etna_context *ctx, struct etna_shader_key key)
203 {
204 const struct etna_shader_variant *old = ctx->shader.fs;
205
206 ctx->shader.fs = etna_shader_variant(ctx->shader.bind_fs, key, &ctx->debug);
207
208 if (!ctx->shader.fs)
209 return false;
210
211 if (old != ctx->shader.fs)
212 ctx->dirty |= ETNA_DIRTY_SHADER;
213
214 return true;
215 }
216
217 static void
218 etna_draw_vbo(struct pipe_context *pctx, const struct pipe_draw_info *info)
219 {
220 struct etna_context *ctx = etna_context(pctx);
221 struct pipe_framebuffer_state *pfb = &ctx->framebuffer_s;
222 uint32_t draw_mode;
223 unsigned i;
224
225 if (!info->count_from_stream_output && !info->indirect &&
226 !info->primitive_restart &&
227 !u_trim_pipe_prim(info->mode, (unsigned*)&info->count))
228 return;
229
230 if (ctx->vertex_elements == NULL || ctx->vertex_elements->num_elements == 0)
231 return; /* Nothing to do */
232
233 if (!(ctx->prim_hwsupport & (1 << info->mode))) {
234 struct primconvert_context *primconvert = ctx->primconvert;
235 util_primconvert_save_rasterizer_state(primconvert, ctx->rasterizer);
236 util_primconvert_draw_vbo(primconvert, info);
237 return;
238 }
239
240 int prims = u_decomposed_prims_for_vertices(info->mode, info->count);
241 if (unlikely(prims <= 0)) {
242 DBG("Invalid draw primitive mode=%i or no primitives to be drawn", info->mode);
243 return;
244 }
245
246 draw_mode = translate_draw_mode(info->mode);
247 if (draw_mode == ETNA_NO_MATCH) {
248 BUG("Unsupported draw mode");
249 return;
250 }
251
252 /* Upload a user index buffer. */
253 unsigned index_offset = 0;
254 struct pipe_resource *indexbuf = NULL;
255
256 if (info->index_size) {
257 indexbuf = info->has_user_indices ? NULL : info->index.resource;
258 if (info->has_user_indices &&
259 !util_upload_index_buffer(pctx, info, &indexbuf, &index_offset, 4)) {
260 BUG("Index buffer upload failed.");
261 return;
262 }
263 /* Add start to index offset, when rendering indexed */
264 index_offset += info->start * info->index_size;
265
266 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = etna_resource(indexbuf)->bo;
267 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = index_offset;
268 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = ETNA_RELOC_READ;
269 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = translate_index_size(info->index_size);
270
271 if (!ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo) {
272 BUG("Unsupported or no index buffer");
273 return;
274 }
275 } else {
276 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.bo = 0;
277 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.offset = 0;
278 ctx->index_buffer.FE_INDEX_STREAM_BASE_ADDR.flags = 0;
279 ctx->index_buffer.FE_INDEX_STREAM_CONTROL = 0;
280 }
281 ctx->dirty |= ETNA_DIRTY_INDEX_BUFFER;
282
283 struct etna_shader_key key = {
284 .front_ccw = ctx->rasterizer->front_ccw,
285 };
286
287 if (pfb->cbufs[0])
288 key.frag_rb_swap = !!translate_pe_format_rb_swap(pfb->cbufs[0]->format);
289
290 if (!etna_get_vs(ctx, key) || !etna_get_fs(ctx, key)) {
291 BUG("compiled shaders are not okay");
292 return;
293 }
294
295 /* Update any derived state */
296 if (!etna_state_update(ctx))
297 return;
298
299 mtx_lock(&ctx->lock);
300
301 /*
302 * Figure out the buffers/features we need:
303 */
304 if (etna_depth_enabled(ctx))
305 resource_written(ctx, pfb->zsbuf->texture);
306
307 if (etna_stencil_enabled(ctx))
308 resource_written(ctx, pfb->zsbuf->texture);
309
310 for (i = 0; i < pfb->nr_cbufs; i++) {
311 struct pipe_resource *surf;
312
313 if (!pfb->cbufs[i])
314 continue;
315
316 surf = pfb->cbufs[i]->texture;
317 resource_written(ctx, surf);
318 }
319
320 /* Mark constant buffers as being read */
321 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_VERTEX].enabled_mask)
322 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_VERTEX].cb[i].buffer);
323
324 foreach_bit(i, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].enabled_mask)
325 resource_read(ctx, ctx->constant_buffer[PIPE_SHADER_FRAGMENT].cb[i].buffer);
326
327 /* Mark VBOs as being read */
328 foreach_bit(i, ctx->vertex_buffer.enabled_mask) {
329 assert(!ctx->vertex_buffer.vb[i].is_user_buffer);
330 resource_read(ctx, ctx->vertex_buffer.vb[i].buffer.resource);
331 }
332
333 /* Mark index buffer as being read */
334 resource_read(ctx, indexbuf);
335
336 /* Mark textures as being read */
337 for (i = 0; i < PIPE_MAX_SAMPLERS; i++) {
338 if (ctx->sampler_view[i]) {
339 resource_read(ctx, ctx->sampler_view[i]->texture);
340
341 /* if texture was modified since the last update,
342 * we need to clear the texture cache and possibly
343 * resolve/update ts
344 */
345 etna_update_sampler_source(ctx->sampler_view[i], i);
346 }
347 }
348
349 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
350 resource_written(ctx, hq->prsc);
351
352 ctx->stats.prims_emitted += u_reduced_prims_for_vertices(info->mode, info->count);
353 ctx->stats.draw_calls++;
354
355 /* Update state for this draw operation */
356 etna_update_state_for_draw(ctx, info);
357
358 /* First, sync state, then emit DRAW_PRIMITIVES or DRAW_INDEXED_PRIMITIVES */
359 etna_emit_state(ctx);
360
361 if (ctx->specs.halti >= 2) {
362 /* On HALTI2+ (GC3000 and higher) only use instanced drawing commands, as the blob does */
363 etna_draw_instanced(ctx->stream, info->index_size, draw_mode, info->instance_count,
364 info->count, info->index_size ? info->index_bias : info->start);
365 } else {
366 if (info->index_size)
367 etna_draw_indexed_primitives(ctx->stream, draw_mode, 0, prims, info->index_bias);
368 else
369 etna_draw_primitives(ctx->stream, draw_mode, info->start, prims);
370 }
371
372 if (DBG_ENABLED(ETNA_DBG_DRAW_STALL)) {
373 /* Stall the FE after every draw operation. This allows better
374 * debug of GPU hang conditions, as the FE will indicate which
375 * draw op has caused the hang. */
376 etna_stall(ctx->stream, SYNC_RECIPIENT_FE, SYNC_RECIPIENT_PE);
377 }
378 mtx_unlock(&ctx->lock);
379
380 if (DBG_ENABLED(ETNA_DBG_FLUSH_ALL))
381 pctx->flush(pctx, NULL, 0);
382
383 if (ctx->framebuffer_s.cbufs[0])
384 etna_resource(ctx->framebuffer_s.cbufs[0]->texture)->seqno++;
385 if (ctx->framebuffer_s.zsbuf)
386 etna_resource(ctx->framebuffer_s.zsbuf->texture)->seqno++;
387 if (info->index_size && indexbuf != info->index.resource)
388 pipe_resource_reference(&indexbuf, NULL);
389 }
390
391 static void
392 etna_reset_gpu_state(struct etna_context *ctx)
393 {
394 struct etna_cmd_stream *stream = ctx->stream;
395
396 etna_set_state(stream, VIVS_GL_API_MODE, VIVS_GL_API_MODE_OPENGL);
397 etna_set_state(stream, VIVS_GL_VERTEX_ELEMENT_CONFIG, 0x00000001);
398 /* blob sets this to 0x40000031 on GC7000, seems to make no difference,
399 * but keep it in mind if depth behaves strangely. */
400 etna_set_state(stream, VIVS_RA_EARLY_DEPTH, 0x00000031);
401 etna_set_state(stream, VIVS_PA_W_CLIP_LIMIT, 0x34000001);
402 etna_set_state(stream, VIVS_PA_FLAGS, 0x00000000); /* blob sets ZCONVERT_BYPASS on GC3000+, this messes up z for us */
403 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A80, 0x38a01404);
404 etna_set_state(stream, VIVS_PA_VIEWPORT_UNK00A84, fui(8192.0));
405 etna_set_state(stream, VIVS_PA_ZFARCLIPPING, 0x00000000);
406 etna_set_state(stream, VIVS_RA_HDEPTH_CONTROL, 0x00007000);
407 etna_set_state(stream, VIVS_PS_CONTROL_EXT, 0x00000000);
408
409 /* There is no HALTI0 specific state */
410 if (ctx->specs.halti >= 1) { /* Only on HALTI1+ */
411 etna_set_state(stream, VIVS_VS_HALTI1_UNK00884, 0x00000808);
412 }
413 if (ctx->specs.halti >= 2) { /* Only on HALTI2+ */
414 etna_set_state(stream, VIVS_RA_UNK00E0C, 0x00000000);
415 }
416 if (ctx->specs.halti >= 3) { /* Only on HALTI3+ */
417 etna_set_state(stream, VIVS_PS_HALTI3_UNK0103C, 0x76543210);
418 }
419 if (ctx->specs.halti >= 4) { /* Only on HALTI4+ */
420 etna_set_state(stream, VIVS_PS_MSAA_CONFIG, 0x6fffffff & 0xf70fffff & 0xfff6ffff &
421 0xffff6fff & 0xfffff6ff & 0xffffff7f);
422 etna_set_state(stream, VIVS_PE_HALTI4_UNK014C0, 0x00000000);
423 }
424 if (ctx->specs.halti >= 5) { /* Only on HALTI5+ */
425 etna_set_state(stream, VIVS_NTE_DESCRIPTOR_UNK14C40, 0x00000001);
426 etna_set_state(stream, VIVS_FE_HALTI5_UNK007D8, 0x00000002);
427 etna_set_state(stream, VIVS_FE_HALTI5_ID_CONFIG, 0x00000000);
428 etna_set_state(stream, VIVS_PS_SAMPLER_BASE, 0x00000000);
429 etna_set_state(stream, VIVS_VS_SAMPLER_BASE, 0x00000020);
430 etna_set_state(stream, VIVS_SH_CONFIG, VIVS_SH_CONFIG_RTNE_ROUNDING);
431 } else { /* Only on pre-HALTI5 */
432 etna_set_state(stream, VIVS_GL_UNK03838, 0x00000000);
433 etna_set_state(stream, VIVS_GL_UNK03854, 0x00000000);
434 }
435
436 if (!ctx->specs.use_blt) {
437 /* Enable SINGLE_BUFFER for resolve, if supported */
438 etna_set_state(stream, VIVS_RS_SINGLE_BUFFER, COND(ctx->specs.single_buffer, VIVS_RS_SINGLE_BUFFER_ENABLE));
439 }
440
441 if (ctx->specs.halti >= 5) {
442 /* TXDESC cache flush - do this once at the beginning, as texture
443 * descriptors are only written by the CPU once, then patched by the kernel
444 * before command stream submission. It does not need flushing if the
445 * referenced image data changes.
446 */
447 etna_set_state(stream, VIVS_NTE_DESCRIPTOR_FLUSH, 0);
448 etna_set_state(stream, VIVS_GL_FLUSH_CACHE,
449 VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK12 |
450 VIVS_GL_FLUSH_CACHE_DESCRIPTOR_UNK13);
451
452 /* Icache invalidate (should do this on shader change?) */
453 etna_set_state(stream, VIVS_VS_ICACHE_INVALIDATE,
454 VIVS_VS_ICACHE_INVALIDATE_UNK0 | VIVS_VS_ICACHE_INVALIDATE_UNK1 |
455 VIVS_VS_ICACHE_INVALIDATE_UNK2 | VIVS_VS_ICACHE_INVALIDATE_UNK3 |
456 VIVS_VS_ICACHE_INVALIDATE_UNK4);
457 }
458
459 ctx->dirty = ~0L;
460 ctx->dirty_sampler_views = ~0L;
461 }
462
463 static void
464 etna_flush(struct pipe_context *pctx, struct pipe_fence_handle **fence,
465 enum pipe_flush_flags flags)
466 {
467 struct etna_context *ctx = etna_context(pctx);
468 int out_fence_fd = -1;
469
470 mtx_lock(&ctx->lock);
471
472 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
473 etna_hw_query_suspend(hq, ctx);
474
475 etna_cmd_stream_flush(ctx->stream, ctx->in_fence_fd,
476 (flags & PIPE_FLUSH_FENCE_FD) ? &out_fence_fd : NULL);
477
478 list_for_each_entry(struct etna_hw_query, hq, &ctx->active_hw_queries, node)
479 etna_hw_query_resume(hq, ctx);
480
481 if (fence)
482 *fence = etna_fence_create(pctx, out_fence_fd);
483
484 /*
485 * Go through all _resources_ pending in this _context_ and mark them as
486 * not pending in this _context_ anymore, since they were just flushed.
487 */
488 set_foreach(ctx->used_resources_read, entry) {
489 struct etna_resource *rsc = (struct etna_resource *)entry->key;
490 struct pipe_resource *referenced = &rsc->base;
491
492 _mesa_set_remove_key(rsc->pending_ctx, ctx);
493
494 /* if resource has no pending ctx's reset its status */
495 if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
496 rsc->status &= ~ETNA_PENDING_READ;
497
498 pipe_resource_reference(&referenced, NULL);
499 }
500 _mesa_set_clear(ctx->used_resources_read, NULL);
501
502 set_foreach(ctx->used_resources_write, entry) {
503 struct etna_resource *rsc = (struct etna_resource *)entry->key;
504 struct pipe_resource *referenced = &rsc->base;
505
506 _mesa_set_remove_key(rsc->pending_ctx, ctx);
507
508 /* if resource has no pending ctx's reset its status */
509 if (_mesa_set_next_entry(rsc->pending_ctx, NULL) == NULL)
510 rsc->status &= ~ETNA_PENDING_WRITE;
511
512 pipe_resource_reference(&referenced, NULL);
513 }
514 _mesa_set_clear(ctx->used_resources_write, NULL);
515
516 etna_reset_gpu_state(ctx);
517 mtx_unlock(&ctx->lock);
518 }
519
520 static void
521 etna_context_force_flush(struct etna_cmd_stream *stream, void *priv)
522 {
523 struct pipe_context *pctx = priv;
524
525 pctx->flush(pctx, NULL, 0);
526
527 }
528
529 static void
530 etna_set_debug_callback(struct pipe_context *pctx,
531 const struct pipe_debug_callback *cb)
532 {
533 struct etna_context *ctx = etna_context(pctx);
534
535 if (cb)
536 ctx->debug = *cb;
537 else
538 memset(&ctx->debug, 0, sizeof(ctx->debug));
539 }
540
541 struct pipe_context *
542 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags)
543 {
544 struct etna_context *ctx = CALLOC_STRUCT(etna_context);
545 struct etna_screen *screen;
546 struct pipe_context *pctx;
547
548 if (ctx == NULL)
549 return NULL;
550
551 pctx = &ctx->base;
552 pctx->priv = ctx;
553 pctx->screen = pscreen;
554 pctx->stream_uploader = u_upload_create_default(pctx);
555 if (!pctx->stream_uploader)
556 goto fail;
557 pctx->const_uploader = pctx->stream_uploader;
558
559 screen = etna_screen(pscreen);
560 ctx->stream = etna_cmd_stream_new(screen->pipe, 0x2000,
561 &etna_context_force_flush, pctx);
562 if (ctx->stream == NULL)
563 goto fail;
564
565 ctx->used_resources_read = _mesa_set_create(NULL, _mesa_hash_pointer,
566 _mesa_key_pointer_equal);
567 if (!ctx->used_resources_read)
568 goto fail;
569
570 ctx->used_resources_write = _mesa_set_create(NULL, _mesa_hash_pointer,
571 _mesa_key_pointer_equal);
572 if (!ctx->used_resources_write)
573 goto fail;
574
575 mtx_init(&ctx->lock, mtx_recursive);
576
577 /* context ctxate setup */
578 ctx->specs = screen->specs;
579 ctx->screen = screen;
580 /* need some sane default in case state tracker doesn't set some state: */
581 ctx->sample_mask = 0xffff;
582
583 /* Set sensible defaults for state */
584 etna_reset_gpu_state(ctx);
585
586 ctx->in_fence_fd = -1;
587
588 pctx->destroy = etna_context_destroy;
589 pctx->draw_vbo = etna_draw_vbo;
590 pctx->flush = etna_flush;
591 pctx->set_debug_callback = etna_set_debug_callback;
592 pctx->create_fence_fd = etna_create_fence_fd;
593 pctx->fence_server_sync = etna_fence_server_sync;
594 pctx->emit_string_marker = etna_emit_string_marker;
595
596 /* creation of compile states */
597 pctx->create_blend_state = etna_blend_state_create;
598 pctx->create_rasterizer_state = etna_rasterizer_state_create;
599 pctx->create_depth_stencil_alpha_state = etna_zsa_state_create;
600
601 etna_clear_blit_init(pctx);
602 etna_query_context_init(pctx);
603 etna_state_init(pctx);
604 etna_surface_init(pctx);
605 etna_shader_init(pctx);
606 etna_texture_init(pctx);
607 etna_transfer_init(pctx);
608
609 ctx->blitter = util_blitter_create(pctx);
610 if (!ctx->blitter)
611 goto fail;
612
613 /* Generate the bitmask of supported draw primitives. */
614 ctx->prim_hwsupport = 1 << PIPE_PRIM_POINTS |
615 1 << PIPE_PRIM_LINES |
616 1 << PIPE_PRIM_LINE_STRIP |
617 1 << PIPE_PRIM_TRIANGLES |
618 1 << PIPE_PRIM_TRIANGLE_FAN;
619
620 /* TODO: The bug relates only to indexed draws, but here we signal
621 * that there is no support for triangle strips at all. This should
622 * be refined.
623 */
624 if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, BUG_FIXES8))
625 ctx->prim_hwsupport |= 1 << PIPE_PRIM_TRIANGLE_STRIP;
626
627 if (VIV_FEATURE(ctx->screen, chipMinorFeatures2, LINE_LOOP))
628 ctx->prim_hwsupport |= 1 << PIPE_PRIM_LINE_LOOP;
629
630 ctx->primconvert = util_primconvert_create(pctx, ctx->prim_hwsupport);
631 if (!ctx->primconvert)
632 goto fail;
633
634 slab_create_child(&ctx->transfer_pool, &screen->transfer_pool);
635 list_inithead(&ctx->active_hw_queries);
636
637 /* create dummy RT buffer, used when rendering with no color buffer */
638 ctx->dummy_rt = etna_bo_new(ctx->screen->dev, 64 * 64 * 4,
639 DRM_ETNA_GEM_CACHE_WC);
640 if (!ctx->dummy_rt)
641 goto fail;
642
643 ctx->dummy_rt_reloc.bo = ctx->dummy_rt;
644 ctx->dummy_rt_reloc.offset = 0;
645 ctx->dummy_rt_reloc.flags = ETNA_RELOC_READ | ETNA_RELOC_WRITE;
646
647 if (screen->specs.halti >= 5) {
648 /* Create an empty dummy texture descriptor */
649 ctx->dummy_desc_bo = etna_bo_new(ctx->screen->dev, 0x100, DRM_ETNA_GEM_CACHE_WC);
650 if (!ctx->dummy_desc_bo)
651 goto fail;
652 uint32_t *buf = etna_bo_map(ctx->dummy_desc_bo);
653 etna_bo_cpu_prep(ctx->dummy_desc_bo, DRM_ETNA_PREP_WRITE);
654 memset(buf, 0, 0x100);
655 etna_bo_cpu_fini(ctx->dummy_desc_bo);
656 ctx->DUMMY_DESC_ADDR.bo = ctx->dummy_desc_bo;
657 ctx->DUMMY_DESC_ADDR.offset = 0;
658 ctx->DUMMY_DESC_ADDR.flags = ETNA_RELOC_READ;
659 }
660
661 return pctx;
662
663 fail:
664 pctx->destroy(pctx);
665
666 return NULL;
667 }