virgl: remove virgl_transfer_queue_lists
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_context.h
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 * Christian Gmeiner <christian.gmeiner@gmail.com>
26 */
27
28 #ifndef H_ETNAVIV_CONTEXT
29 #define H_ETNAVIV_CONTEXT
30
31 #include <stdint.h>
32
33 #include "etnaviv_resource.h"
34 #include "etnaviv_tiling.h"
35 #include "indices/u_primconvert.h"
36 #include "pipe/p_context.h"
37 #include "pipe/p_defines.h"
38 #include "pipe/p_format.h"
39 #include "pipe/p_shader_tokens.h"
40 #include "pipe/p_state.h"
41 #include "util/slab.h"
42
43 struct pipe_screen;
44 struct etna_shader_variant;
45 struct etna_sampler_ts;
46
47 struct etna_index_buffer {
48 struct etna_reloc FE_INDEX_STREAM_BASE_ADDR;
49 uint32_t FE_INDEX_STREAM_CONTROL;
50 uint32_t FE_PRIMITIVE_RESTART_INDEX;
51 };
52
53 struct etna_shader_input {
54 int vs_reg; /* VS input register */
55 };
56
57 enum etna_varying_special {
58 ETNA_VARYING_VSOUT = 0, /* from VS */
59 ETNA_VARYING_POINTCOORD, /* point texture coord */
60 };
61
62 struct etna_shader_varying {
63 int num_components;
64 enum etna_varying_special special;
65 int pa_attributes;
66 int vs_reg; /* VS output register */
67 };
68
69 struct etna_transfer {
70 struct pipe_transfer base;
71 struct pipe_resource *rsc;
72 void *staging;
73 void *mapped;
74 };
75
76 struct etna_vertexbuf_state {
77 struct pipe_vertex_buffer vb[PIPE_MAX_ATTRIBS];
78 struct compiled_set_vertex_buffer cvb[PIPE_MAX_ATTRIBS];
79 unsigned count;
80 uint32_t enabled_mask;
81 };
82
83 struct etna_shader_state {
84 void *bind_vs, *bind_fs;
85 struct etna_shader_variant *vs, *fs;
86 };
87
88 enum etna_immediate_contents {
89 ETNA_IMMEDIATE_UNUSED = 0,
90 ETNA_IMMEDIATE_CONSTANT,
91 ETNA_IMMEDIATE_TEXRECT_SCALE_X,
92 ETNA_IMMEDIATE_TEXRECT_SCALE_Y,
93 };
94
95 struct etna_shader_uniform_info {
96 enum etna_immediate_contents *imm_contents;
97 uint32_t *imm_data;
98 uint32_t imm_count;
99 uint32_t const_count;
100 };
101
102 struct etna_context {
103 struct pipe_context base;
104
105 /* GPU-specific implementation to emit texture state */
106 void (*emit_texture_state)(struct etna_context *pctx);
107 /* Get sampler TS pointer for sampler view */
108 struct etna_sampler_ts *(*ts_for_sampler_view)(struct pipe_sampler_view *pview);
109
110 struct etna_specs specs;
111 struct etna_screen *screen;
112 struct etna_cmd_stream *stream;
113
114 /* which state objects need to be re-emit'd: */
115 enum {
116 ETNA_DIRTY_BLEND = (1 << 0),
117 ETNA_DIRTY_SAMPLERS = (1 << 1),
118 ETNA_DIRTY_RASTERIZER = (1 << 2),
119 ETNA_DIRTY_ZSA = (1 << 3),
120 ETNA_DIRTY_VERTEX_ELEMENTS = (1 << 4),
121 ETNA_DIRTY_BLEND_COLOR = (1 << 6),
122 ETNA_DIRTY_STENCIL_REF = (1 << 7),
123 ETNA_DIRTY_SAMPLE_MASK = (1 << 8),
124 ETNA_DIRTY_VIEWPORT = (1 << 9),
125 ETNA_DIRTY_FRAMEBUFFER = (1 << 10),
126 ETNA_DIRTY_SCISSOR = (1 << 11),
127 ETNA_DIRTY_SAMPLER_VIEWS = (1 << 12),
128 ETNA_DIRTY_CONSTBUF = (1 << 13),
129 ETNA_DIRTY_VERTEX_BUFFERS = (1 << 14),
130 ETNA_DIRTY_INDEX_BUFFER = (1 << 15),
131 ETNA_DIRTY_SHADER = (1 << 16),
132 ETNA_DIRTY_TS = (1 << 17),
133 ETNA_DIRTY_TEXTURE_CACHES = (1 << 18),
134 ETNA_DIRTY_DERIVE_TS = (1 << 19),
135 } dirty;
136
137 uint32_t prim_hwsupport;
138 struct primconvert_context *primconvert;
139
140 struct slab_child_pool transfer_pool;
141 struct blitter_context *blitter;
142
143 /* compiled bindable state */
144 unsigned sample_mask;
145 struct pipe_blend_state *blend;
146 unsigned num_fragment_samplers;
147 uint32_t active_samplers;
148 struct pipe_sampler_state *sampler[PIPE_MAX_SAMPLERS];
149 struct pipe_rasterizer_state *rasterizer;
150 struct pipe_depth_stencil_alpha_state *zsa;
151 struct compiled_vertex_elements_state *vertex_elements;
152 struct compiled_shader_state shader_state;
153
154 /* to simplify the emit process we store pre compiled state objects,
155 * which got 'compiled' during state change. */
156 struct compiled_blend_color blend_color;
157 struct compiled_stencil_ref stencil_ref;
158 struct compiled_framebuffer_state framebuffer;
159 struct compiled_scissor_state scissor;
160 struct compiled_viewport_state viewport;
161 unsigned num_fragment_sampler_views;
162 uint32_t active_sampler_views;
163 uint32_t dirty_sampler_views;
164 struct pipe_sampler_view *sampler_view[PIPE_MAX_SAMPLERS];
165 struct pipe_constant_buffer constant_buffer[PIPE_SHADER_TYPES];
166 struct etna_vertexbuf_state vertex_buffer;
167 struct etna_index_buffer index_buffer;
168 struct etna_shader_state shader;
169
170 /* saved parameter-like state. these are mainly kept around for the blitter */
171 struct pipe_framebuffer_state framebuffer_s;
172 struct pipe_stencil_ref stencil_ref_s;
173 struct pipe_viewport_state viewport_s;
174 struct pipe_scissor_state scissor_s;
175
176 /* cached state of entire GPU */
177 struct etna_3d_state gpu3d;
178
179 /* stats/counters */
180 struct {
181 uint64_t prims_emitted;
182 uint64_t draw_calls;
183 uint64_t rs_operations;
184 } stats;
185
186 struct pipe_debug_callback debug;
187 int in_fence_fd;
188
189 /* list of active hardware queries */
190 struct list_head active_hw_queries;
191
192 struct etna_bo *dummy_rt;
193 struct etna_reloc dummy_rt_reloc;
194 };
195
196 static inline struct etna_context *
197 etna_context(struct pipe_context *pctx)
198 {
199 return (struct etna_context *)pctx;
200 }
201
202 static inline struct etna_transfer *
203 etna_transfer(struct pipe_transfer *p)
204 {
205 return (struct etna_transfer *)p;
206 }
207
208 struct pipe_context *
209 etna_context_create(struct pipe_screen *pscreen, void *priv, unsigned flags);
210
211 #endif