src/gallium/drivers/etnaviv/etnaviv_resource.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_resource.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_screen.h"
  34 #include "etnaviv_translate.h"
  35
  36 #include "util/hash_table.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
  43 {
  44    switch (modifier) {
  45    case DRM_FORMAT_MOD_VIVANTE_TILED:
  46       return ETNA_LAYOUT_TILED;
  47    case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
  48       return ETNA_LAYOUT_SUPER_TILED;
  49    case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
  50       return ETNA_LAYOUT_MULTI_TILED;
  51    case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
  52       return ETNA_LAYOUT_MULTI_SUPERTILED;
  53    case DRM_FORMAT_MOD_LINEAR:
  54    default:
  55       return ETNA_LAYOUT_LINEAR;
  56    }
  57 }
  58
  59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
  60 {
  61    switch (layout) {
  62    case ETNA_LAYOUT_TILED:
  63       return DRM_FORMAT_MOD_VIVANTE_TILED;
  64    case ETNA_LAYOUT_SUPER_TILED:
  65       return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
  66    case ETNA_LAYOUT_MULTI_TILED:
  67       return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
  68    case ETNA_LAYOUT_MULTI_SUPERTILED:
  69       return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
  70    case ETNA_LAYOUT_LINEAR:
  71       return DRM_FORMAT_MOD_LINEAR;
  72    default:
  73       return DRM_FORMAT_MOD_INVALID;
  74    }
  75 }
  76
  77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
  78  * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
  79  * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
  80  * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
  81  */
  82 bool
  83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
  84                               struct etna_resource *rsc)
  85 {
  86    struct etna_screen *screen = etna_screen(pscreen);
  87    size_t rt_ts_size, ts_layer_stride;
  88    size_t ts_bits_per_tile, bytes_per_tile;
  89    uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
  90    int8_t ts_compress_fmt;
  91
  92    assert(!rsc->ts_bo);
  93
  94    /* pre-v4 compression is largely useless, so disable it when not wanted for MSAA
  95     * v4 compression can be enabled everywhere without any known drawback,
  96     * except that in-place resolve must go through a slower path
  97     */
  98    ts_compress_fmt = (screen->specs.v4_compression || rsc->base.nr_samples > 1) ?
  99                       translate_ts_format(rsc->base.format) : -1;
 100
 101    if (screen->specs.halti >= 5) {
 102       /* enable 256B ts mode with compression, as it improves performance
 103        * the size of the resource might also determine if we want to use it or not
 104        */
 105       if (ts_compress_fmt >= 0)
 106          ts_mode = TS_MODE_256B;
 107
 108       ts_bits_per_tile = 4;
 109       bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
 110    } else {
 111       ts_bits_per_tile = screen->specs.bits_per_tile;
 112       bytes_per_tile = 64;
 113    }
 114
 115    ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
 116                                         bytes_per_tile * 8 / ts_bits_per_tile),
 117                            0x100 * screen->specs.pixel_pipes);
 118    rt_ts_size = ts_layer_stride * rsc->base.array_size;
 119    if (rt_ts_size == 0)
 120       return true;
 121
 122    DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
 123          rsc, rt_ts_size);
 124
 125    struct etna_bo *rt_ts;
 126    rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
 127
 128    if (unlikely(!rt_ts)) {
 129       BUG("Problem allocating tile status for resource");
 130       return false;
 131    }
 132
 133    rsc->ts_bo = rt_ts;
 134    rsc->levels[0].ts_offset = 0;
 135    rsc->levels[0].ts_layer_stride = ts_layer_stride;
 136    rsc->levels[0].ts_size = rt_ts_size;
 137    rsc->levels[0].ts_mode = ts_mode;
 138    rsc->levels[0].ts_compress_fmt = ts_compress_fmt;
 139
 140    return true;
 141 }
 142
 143 static boolean
 144 etna_screen_can_create_resource(struct pipe_screen *pscreen,
 145                                 const struct pipe_resource *templat)
 146 {
 147    struct etna_screen *screen = etna_screen(pscreen);
 148    if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
 149       return false;
 150
 151    /* templat->bind is not set here, so we must use the minimum sizes */
 152    uint max_size =
 153       MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
 154
 155    if (templat->width0 > max_size || templat->height0 > max_size)
 156       return false;
 157
 158    return true;
 159 }
 160
 161 static unsigned
 162 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
 163               unsigned msaa_xscale, unsigned msaa_yscale)
 164 {
 165    struct pipe_resource *prsc = &rsc->base;
 166    unsigned level, size = 0;
 167    unsigned width = prsc->width0;
 168    unsigned height = prsc->height0;
 169    unsigned depth = prsc->depth0;
 170
 171    for (level = 0; level <= prsc->last_level; level++) {
 172       struct etna_resource_level *mip = &rsc->levels[level];
 173
 174       mip->width = width;
 175       mip->height = height;
 176       mip->padded_width = align(width * msaa_xscale, paddingX);
 177       mip->padded_height = align(height * msaa_yscale, paddingY);
 178       mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
 179       mip->offset = size;
 180       mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
 181       mip->size = prsc->array_size * mip->layer_stride;
 182
 183       /* align levels to 64 bytes to be able to render to them */
 184       size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
 185
 186       width = u_minify(width, 1);
 187       height = u_minify(height, 1);
 188       depth = u_minify(depth, 1);
 189    }
 190
 191    return size;
 192 }
 193
 194 /* Is rs alignment needed? */
 195 static bool is_rs_align(struct etna_screen *screen,
 196                         const struct pipe_resource *tmpl)
 197 {
 198    return screen->specs.use_blt ? false : (
 199       VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
 200       !etna_resource_sampler_only(tmpl));
 201 }
 202
 203 /* Create a new resource object, using the given template info */
 204 struct pipe_resource *
 205 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
 206                     enum etna_resource_addressing_mode mode, uint64_t modifier,
 207                     const struct pipe_resource *templat)
 208 {
 209    struct etna_screen *screen = etna_screen(pscreen);
 210    struct etna_resource *rsc;
 211    unsigned size;
 212
 213    DBG_F(ETNA_DBG_RESOURCE_MSGS,
 214          "target=%d, format=%s, %ux%ux%u, array_size=%u, "
 215          "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
 216          templat->target, util_format_name(templat->format), templat->width0,
 217          templat->height0, templat->depth0, templat->array_size,
 218          templat->last_level, templat->nr_samples, templat->usage,
 219          templat->bind, templat->flags);
 220
 221    /* Determine scaling for antialiasing, allow override using debug flag */
 222    int nr_samples = templat->nr_samples;
 223    if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 224        !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
 225       if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
 226          nr_samples = 2;
 227       if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
 228          nr_samples = 4;
 229    }
 230
 231    int msaa_xscale = 1, msaa_yscale = 1;
 232    if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
 233       /* Number of samples not supported */
 234       return NULL;
 235    }
 236
 237    /* Determine needed padding (alignment of height/width) */
 238    unsigned paddingX = 0, paddingY = 0;
 239    unsigned halign = TEXTURE_HALIGN_FOUR;
 240    if (!util_format_is_compressed(templat->format)) {
 241       /* If we have the TEXTURE_HALIGN feature, we can always align to the
 242        * resolve engine's width.  If not, we must not align resources used
 243        * only for textures. If this GPU uses the BLT engine, never do RS align.
 244        */
 245       etna_layout_multiple(layout, screen->specs.pixel_pipes,
 246                            is_rs_align (screen, templat),
 247                            &paddingX, &paddingY, &halign);
 248       assert(paddingX && paddingY);
 249    } else {
 250       /* Compressed textures are padded to their block size, but we don't have
 251        * to do anything special for that. */
 252       paddingX = 1;
 253       paddingY = 1;
 254    }
 255
 256    if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
 257       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 258
 259    if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
 260       struct pipe_resource scanout_templat = *templat;
 261       struct renderonly_scanout *scanout;
 262       struct winsys_handle handle;
 263
 264       /* pad scanout buffer size to be compatible with the RS */
 265       if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
 266          etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
 267
 268       scanout_templat.width0 = align(scanout_templat.width0, paddingX);
 269       scanout_templat.height0 = align(scanout_templat.height0, paddingY);
 270
 271       scanout = renderonly_scanout_for_resource(&scanout_templat,
 272                                                 screen->ro, &handle);
 273       if (!scanout)
 274          return NULL;
 275
 276       assert(handle.type == WINSYS_HANDLE_TYPE_FD);
 277       handle.modifier = modifier;
 278       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
 279                                                         &handle,
 280                                                         PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
 281       close(handle.handle);
 282       if (!rsc)
 283          return NULL;
 284
 285       rsc->scanout = scanout;
 286
 287       return &rsc->base;
 288    }
 289
 290    rsc = CALLOC_STRUCT(etna_resource);
 291    if (!rsc)
 292       return NULL;
 293
 294    rsc->base = *templat;
 295    rsc->base.screen = pscreen;
 296    rsc->base.nr_samples = nr_samples;
 297    rsc->layout = layout;
 298    rsc->halign = halign;
 299    rsc->addressing_mode = mode;
 300
 301    pipe_reference_init(&rsc->base.reference, 1);
 302
 303    size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
 304
 305    uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
 306    if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
 307       flags |= DRM_ETNA_GEM_FORCE_MMU;
 308    struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
 309    if (unlikely(bo == NULL)) {
 310       BUG("Problem allocating video memory for resource");
 311       goto free_rsc;
 312    }
 313
 314    rsc->bo = bo;
 315    rsc->ts_bo = 0; /* TS is only created when first bound to surface */
 316
 317    if (DBG_ENABLED(ETNA_DBG_ZERO)) {
 318       void *map = etna_bo_map(bo);
 319       memset(map, 0, size);
 320    }
 321
 322    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 323                                        _mesa_key_pointer_equal);
 324    if (!rsc->pending_ctx)
 325       goto free_rsc;
 326
 327    return &rsc->base;
 328
 329 free_rsc:
 330    FREE(rsc);
 331    return NULL;
 332 }
 333
 334 static struct pipe_resource *
 335 etna_resource_create(struct pipe_screen *pscreen,
 336                      const struct pipe_resource *templat)
 337 {
 338    struct etna_screen *screen = etna_screen(pscreen);
 339
 340    /* Figure out what tiling and address mode to use -- for now, assume that
 341     * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
 342     * (supported on gc880 and gc2000 at least), but not sure how it works.
 343     * Buffers always have LINEAR layout.
 344     */
 345    unsigned layout = ETNA_LAYOUT_LINEAR;
 346    enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
 347
 348    if (etna_resource_sampler_only(templat)) {
 349       /* The buffer is only used for texturing, so create something
 350        * directly compatible with the sampler.  Such a buffer can
 351        * never be rendered to. */
 352       layout = ETNA_LAYOUT_TILED;
 353
 354       if (util_format_is_compressed(templat->format))
 355          layout = ETNA_LAYOUT_LINEAR;
 356    } else if (templat->target != PIPE_BUFFER) {
 357       bool want_multitiled = false;
 358       bool want_supertiled = screen->specs.can_supertile;
 359
 360       /* When this GPU supports single-buffer rendering, don't ever enable
 361        * multi-tiling. This replicates the blob behavior on GC3000.
 362        */
 363       if (!screen->specs.single_buffer)
 364          want_multitiled = screen->specs.pixel_pipes > 1;
 365
 366       /* Keep single byte blocksized resources as tiled, since we
 367        * are unable to use the RS blit to de-tile them. However,
 368        * if they're used as a render target or depth/stencil, they
 369        * must be multi-tiled for GPUs with multiple pixel pipes.
 370        * Ignore depth/stencil here, but it is an error for a render
 371        * target.
 372        */
 373       if (util_format_get_blocksize(templat->format) == 1 &&
 374           !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
 375          assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
 376          want_multitiled = want_supertiled = false;
 377       }
 378
 379       layout = ETNA_LAYOUT_BIT_TILE;
 380       if (want_multitiled)
 381          layout |= ETNA_LAYOUT_BIT_MULTI;
 382       if (want_supertiled)
 383          layout |= ETNA_LAYOUT_BIT_SUPER;
 384    }
 385
 386    if (templat->target == PIPE_TEXTURE_3D)
 387       layout = ETNA_LAYOUT_LINEAR;
 388
 389    /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
 390    return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
 391 }
 392
 393 enum modifier_priority {
 394    MODIFIER_PRIORITY_INVALID = 0,
 395    MODIFIER_PRIORITY_LINEAR,
 396    MODIFIER_PRIORITY_SPLIT_TILED,
 397    MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
 398    MODIFIER_PRIORITY_TILED,
 399    MODIFIER_PRIORITY_SUPER_TILED,
 400 };
 401
 402 const uint64_t priority_to_modifier[] = {
 403    [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
 404    [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
 405    [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
 406    [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
 407    [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
 408    [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
 409 };
 410
 411 static uint64_t
 412 select_best_modifier(const struct etna_screen * screen,
 413                      const uint64_t *modifiers, const unsigned count)
 414 {
 415    enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
 416
 417    for (int i = 0; i < count; i++) {
 418       switch (modifiers[i]) {
 419       case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
 420          if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
 421              !screen->specs.can_supertile)
 422             break;
 423          prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
 424          break;
 425       case DRM_FORMAT_MOD_VIVANTE_TILED:
 426          if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
 427             break;
 428          prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
 429          break;
 430       case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
 431          if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
 432             break;
 433          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
 434          break;
 435       case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
 436          if (screen->specs.pixel_pipes < 2)
 437             break;
 438          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
 439          break;
 440       case DRM_FORMAT_MOD_LINEAR:
 441          prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
 442          break;
 443       case DRM_FORMAT_MOD_INVALID:
 444       default:
 445          break;
 446       }
 447    }
 448
 449    return priority_to_modifier[prio];
 450 }
 451
 452 static struct pipe_resource *
 453 etna_resource_create_modifiers(struct pipe_screen *pscreen,
 454                                const struct pipe_resource *templat,
 455                                const uint64_t *modifiers, int count)
 456 {
 457    struct etna_screen *screen = etna_screen(pscreen);
 458    struct pipe_resource tmpl = *templat;
 459    uint64_t modifier = select_best_modifier(screen, modifiers, count);
 460
 461    if (modifier == DRM_FORMAT_MOD_INVALID)
 462       return NULL;
 463
 464    /*
 465     * We currently assume that all buffers allocated through this interface
 466     * should be scanout enabled.
 467     */
 468    tmpl.bind |= PIPE_BIND_SCANOUT;
 469
 470    return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
 471                               ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
 472 }
 473
 474 static void
 475 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 476 {
 477    struct etna_resource *res = etna_resource(prsc);
 478
 479    if (res->external)
 480       etna_resource(res->external)->seqno++;
 481    else
 482       res->seqno++;
 483 }
 484
 485 static void
 486 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 487 {
 488    struct etna_screen *screen = etna_screen(pscreen);
 489    struct etna_resource *rsc = etna_resource(prsc);
 490
 491    mtx_lock(&screen->lock);
 492    _mesa_set_remove_key(screen->used_resources, rsc);
 493    _mesa_set_destroy(rsc->pending_ctx, NULL);
 494    mtx_unlock(&screen->lock);
 495
 496    if (rsc->bo)
 497       etna_bo_del(rsc->bo);
 498
 499    if (rsc->ts_bo)
 500       etna_bo_del(rsc->ts_bo);
 501
 502    if (rsc->scanout)
 503       renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
 504
 505    pipe_resource_reference(&rsc->texture, NULL);
 506    pipe_resource_reference(&rsc->external, NULL);
 507
 508    for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
 509       FREE(rsc->levels[i].patch_offsets);
 510
 511    FREE(rsc);
 512 }
 513
 514 static struct pipe_resource *
 515 etna_resource_from_handle(struct pipe_screen *pscreen,
 516                           const struct pipe_resource *tmpl,
 517                           struct winsys_handle *handle, unsigned usage)
 518 {
 519    struct etna_screen *screen = etna_screen(pscreen);
 520    struct etna_resource *rsc;
 521    struct etna_resource_level *level;
 522    struct pipe_resource *prsc;
 523    struct pipe_resource *ptiled = NULL;
 524
 525    DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
 526        "nr_samples=%u, usage=%u, bind=%x, flags=%x",
 527        tmpl->target, util_format_name(tmpl->format), tmpl->width0,
 528        tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
 529        tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
 530
 531    rsc = CALLOC_STRUCT(etna_resource);
 532    if (!rsc)
 533       return NULL;
 534
 535    level = &rsc->levels[0];
 536    prsc = &rsc->base;
 537
 538    *prsc = *tmpl;
 539
 540    pipe_reference_init(&prsc->reference, 1);
 541    prsc->screen = pscreen;
 542
 543    rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
 544    if (!rsc->bo)
 545       goto fail;
 546
 547    rsc->seqno = 1;
 548    rsc->layout = modifier_to_layout(handle->modifier);
 549    rsc->halign = TEXTURE_HALIGN_FOUR;
 550    rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
 551
 552
 553    level->width = tmpl->width0;
 554    level->height = tmpl->height0;
 555
 556    /* Determine padding of the imported resource. */
 557    unsigned paddingX = 0, paddingY = 0;
 558    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
 559                         is_rs_align(screen, tmpl),
 560                         &paddingX, &paddingY, &rsc->halign);
 561
 562    if (!screen->specs.use_blt)
 563       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 564    level->padded_width = align(level->width, paddingX);
 565    level->padded_height = align(level->height, paddingY);
 566
 567    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
 568                                                                   level->padded_height);
 569    level->size = level->layer_stride;
 570
 571    /* The DDX must give us a BO which conforms to our padding size.
 572     * The stride of the BO must be greater or equal to our padded
 573     * stride. The size of the BO must accomodate the padded height. */
 574    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
 575       BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
 576           level->stride, util_format_get_stride(tmpl->format, level->padded_width),
 577           util_format_name(tmpl->format));
 578       goto fail;
 579    }
 580    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
 581       BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
 582           etna_bo_size(rsc->bo), level->stride * level->padded_height,
 583           util_format_name(tmpl->format));
 584       goto fail;
 585    }
 586
 587    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 588                                        _mesa_key_pointer_equal);
 589    if (!rsc->pending_ctx)
 590       goto fail;
 591
 592    if (rsc->layout == ETNA_LAYOUT_LINEAR) {
 593       /*
 594        * Both sampler and pixel pipes can't handle linear, create a compatible
 595        * base resource, where we can attach the imported buffer as an external
 596        * resource.
 597        */
 598       struct pipe_resource tiled_templat = *tmpl;
 599
 600       /*
 601        * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
 602        * this function to import the scanout buffer and get a tiled resource.
 603        */
 604       tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
 605
 606       ptiled = etna_resource_create(pscreen, &tiled_templat);
 607       if (!ptiled)
 608          goto fail;
 609
 610       etna_resource(ptiled)->external = prsc;
 611
 612       return ptiled;
 613    }
 614
 615    return prsc;
 616
 617 fail:
 618    etna_resource_destroy(pscreen, prsc);
 619    if (ptiled)
 620       etna_resource_destroy(pscreen, ptiled);
 621
 622    return NULL;
 623 }
 624
 625 static boolean
 626 etna_resource_get_handle(struct pipe_screen *pscreen,
 627                          struct pipe_context *pctx,
 628                          struct pipe_resource *prsc,
 629                          struct winsys_handle *handle, unsigned usage)
 630 {
 631    struct etna_resource *rsc = etna_resource(prsc);
 632    /* Scanout is always attached to the base resource */
 633    struct renderonly_scanout *scanout = rsc->scanout;
 634
 635    /*
 636     * External resources are preferred, so a import->export chain of
 637     * render/sampler incompatible buffers yield the same handle.
 638     */
 639    if (rsc->external)
 640       rsc = etna_resource(rsc->external);
 641
 642    handle->stride = rsc->levels[0].stride;
 643    handle->offset = rsc->levels[0].offset;
 644    handle->modifier = layout_to_modifier(rsc->layout);
 645
 646    if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
 647       return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
 648    } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
 649       if (renderonly_get_handle(scanout, handle)) {
 650          return TRUE;
 651       } else {
 652          handle->handle = etna_bo_handle(rsc->bo);
 653          return TRUE;
 654       }
 655    } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
 656       handle->handle = etna_bo_dmabuf(rsc->bo);
 657       return TRUE;
 658    } else {
 659       return FALSE;
 660    }
 661 }
 662
 663 void
 664 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
 665                    enum etna_resource_status status)
 666 {
 667    struct etna_screen *screen = ctx->screen;
 668    struct etna_resource *rsc;
 669
 670    if (!prsc)
 671       return;
 672
 673    rsc = etna_resource(prsc);
 674
 675    mtx_lock(&screen->lock);
 676
 677    /*
 678     * if we are pending read or write by any other context or
 679     * if reading a resource pending a write, then
 680     * flush all the contexts to maintain coherency
 681     */
 682    if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
 683        ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
 684       set_foreach(rsc->pending_ctx, entry) {
 685          struct etna_context *extctx = (struct etna_context *)entry->key;
 686          struct pipe_context *pctx = &extctx->base;
 687
 688          if (extctx == ctx)
 689             continue;
 690
 691          pctx->flush(pctx, NULL, 0);
 692          /* It's safe to clear the status here. If we need to flush it means
 693           * either another context had the resource in exclusive (write) use,
 694           * or we transition the resource to exclusive use in our context.
 695           * In both cases the new status accurately reflects the resource use
 696           * after the flush.
 697           */
 698          rsc->status = 0;
 699       }
 700    }
 701
 702    rsc->status |= status;
 703
 704    _mesa_set_add(screen->used_resources, rsc);
 705    _mesa_set_add(rsc->pending_ctx, ctx);
 706
 707    mtx_unlock(&screen->lock);
 708 }
 709
 710 bool
 711 etna_resource_has_valid_ts(struct etna_resource *rsc)
 712 {
 713    if (!rsc->ts_bo)
 714       return false;
 715
 716    for (int level = 0; level <= rsc->base.last_level; level++)
 717       if (rsc->levels[level].ts_valid)
 718          return true;
 719
 720    return false;
 721 }
 722
 723 void
 724 etna_resource_screen_init(struct pipe_screen *pscreen)
 725 {
 726    pscreen->can_create_resource = etna_screen_can_create_resource;
 727    pscreen->resource_create = etna_resource_create;
 728    pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
 729    pscreen->resource_from_handle = etna_resource_from_handle;
 730    pscreen->resource_get_handle = etna_resource_get_handle;
 731    pscreen->resource_changed = etna_resource_changed;
 732    pscreen->resource_destroy = etna_resource_destroy;
 733 }