radeonsi: fix is_oneway_access_only for image stores
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_resource.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
35
36 #include "util/u_inlines.h"
37 #include "util/u_memory.h"
38
39 #include <drm_fourcc.h>
40
41 #ifndef DRM_FORMAT_MOD_INVALID
42 #define DRM_FORMAT_MOD_INVALID ((1ULL<<56) - 1)
43 #endif
44
45 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
46 {
47 switch (modifier) {
48 case DRM_FORMAT_MOD_VIVANTE_TILED:
49 return ETNA_LAYOUT_TILED;
50 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
51 return ETNA_LAYOUT_SUPER_TILED;
52 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
53 return ETNA_LAYOUT_MULTI_TILED;
54 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
55 return ETNA_LAYOUT_MULTI_SUPERTILED;
56 case DRM_FORMAT_MOD_LINEAR:
57 default:
58 return ETNA_LAYOUT_LINEAR;
59 }
60 }
61
62 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
63 {
64 switch (layout) {
65 case ETNA_LAYOUT_TILED:
66 return DRM_FORMAT_MOD_VIVANTE_TILED;
67 case ETNA_LAYOUT_SUPER_TILED:
68 return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
69 case ETNA_LAYOUT_MULTI_TILED:
70 return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
71 case ETNA_LAYOUT_MULTI_SUPERTILED:
72 return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
73 case ETNA_LAYOUT_LINEAR:
74 return DRM_FORMAT_MOD_LINEAR;
75 default:
76 return DRM_FORMAT_MOD_INVALID;
77 }
78 }
79
80 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
81 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
82 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
83 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
84 */
85 bool
86 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
87 struct etna_resource *rsc)
88 {
89 struct etna_screen *screen = etna_screen(pscreen);
90 size_t rt_ts_size, ts_layer_stride, pixels;
91
92 assert(!rsc->ts_bo);
93
94 /* TS only for level 0 -- XXX is this formula correct? */
95 pixels = rsc->levels[0].layer_stride / util_format_get_blocksize(rsc->base.format);
96 ts_layer_stride = align(pixels * screen->specs.bits_per_tile / 0x80,
97 0x100 * screen->specs.pixel_pipes);
98 rt_ts_size = ts_layer_stride * rsc->base.array_size;
99 if (rt_ts_size == 0)
100 return true;
101
102 DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
103 rsc, rt_ts_size);
104
105 struct etna_bo *rt_ts;
106 rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
107
108 if (unlikely(!rt_ts)) {
109 BUG("Problem allocating tile status for resource");
110 return false;
111 }
112
113 rsc->ts_bo = rt_ts;
114 rsc->levels[0].ts_offset = 0;
115 rsc->levels[0].ts_layer_stride = ts_layer_stride;
116 rsc->levels[0].ts_size = rt_ts_size;
117
118 /* It is important to initialize the TS, as random pattern
119 * can result in crashes. Do this on the CPU as this only happens once
120 * per surface anyway and it's a small area, so it may not be worth
121 * queuing this to the GPU. */
122 void *ts_map = etna_bo_map(rt_ts);
123 memset(ts_map, screen->specs.ts_clear_value, rt_ts_size);
124
125 return true;
126 }
127
128 static boolean
129 etna_screen_can_create_resource(struct pipe_screen *pscreen,
130 const struct pipe_resource *templat)
131 {
132 struct etna_screen *screen = etna_screen(pscreen);
133 if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
134 return false;
135
136 /* templat->bind is not set here, so we must use the minimum sizes */
137 uint max_size =
138 MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
139
140 if (templat->width0 > max_size || templat->height0 > max_size)
141 return false;
142
143 return true;
144 }
145
146 static unsigned
147 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
148 unsigned msaa_xscale, unsigned msaa_yscale)
149 {
150 struct pipe_resource *prsc = &rsc->base;
151 unsigned level, size = 0;
152 unsigned width = prsc->width0;
153 unsigned height = prsc->height0;
154 unsigned depth = prsc->depth0;
155
156 for (level = 0; level <= prsc->last_level; level++) {
157 struct etna_resource_level *mip = &rsc->levels[level];
158
159 mip->width = width;
160 mip->height = height;
161 mip->padded_width = align(width * msaa_xscale, paddingX);
162 mip->padded_height = align(height * msaa_yscale, paddingY);
163 mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
164 mip->offset = size;
165 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
166 mip->size = prsc->array_size * mip->layer_stride;
167
168 /* align levels to 64 bytes to be able to render to them */
169 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
170
171 width = u_minify(width, 1);
172 height = u_minify(height, 1);
173 depth = u_minify(depth, 1);
174 }
175
176 return size;
177 }
178
179 /* Is rs alignment needed? */
180 static bool is_rs_align(struct etna_screen *screen,
181 const struct pipe_resource *tmpl)
182 {
183 return screen->specs.use_blt ? false : (
184 VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
185 !etna_resource_sampler_only(tmpl));
186 }
187
188 /* Create a new resource object, using the given template info */
189 struct pipe_resource *
190 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
191 uint64_t modifier, const struct pipe_resource *templat)
192 {
193 struct etna_screen *screen = etna_screen(pscreen);
194 struct etna_resource *rsc;
195 unsigned size;
196
197 DBG_F(ETNA_DBG_RESOURCE_MSGS,
198 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
199 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
200 templat->target, util_format_name(templat->format), templat->width0,
201 templat->height0, templat->depth0, templat->array_size,
202 templat->last_level, templat->nr_samples, templat->usage,
203 templat->bind, templat->flags);
204
205 /* Determine scaling for antialiasing, allow override using debug flag */
206 int nr_samples = templat->nr_samples;
207 if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
208 !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
209 if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
210 nr_samples = 2;
211 if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
212 nr_samples = 4;
213 }
214
215 int msaa_xscale = 1, msaa_yscale = 1;
216 if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
217 /* Number of samples not supported */
218 return NULL;
219 }
220
221 /* Determine needed padding (alignment of height/width) */
222 unsigned paddingX = 0, paddingY = 0;
223 unsigned halign = TEXTURE_HALIGN_FOUR;
224 if (!util_format_is_compressed(templat->format)) {
225 /* If we have the TEXTURE_HALIGN feature, we can always align to the
226 * resolve engine's width. If not, we must not align resources used
227 * only for textures. If this GPU uses the BLT engine, never do RS align.
228 */
229 etna_layout_multiple(layout, screen->specs.pixel_pipes,
230 is_rs_align (screen, templat),
231 &paddingX, &paddingY, &halign);
232 assert(paddingX && paddingY);
233 } else {
234 /* Compressed textures are padded to their block size, but we don't have
235 * to do anything special for that. */
236 paddingX = 1;
237 paddingY = 1;
238 }
239
240 if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
241 etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
242
243 if (templat->bind & PIPE_BIND_SCANOUT) {
244 struct pipe_resource scanout_templat = *templat;
245 struct renderonly_scanout *scanout;
246 struct winsys_handle handle;
247
248 /* pad scanout buffer size to be compatible with the RS */
249 if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
250 etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
251
252 scanout_templat.width0 = align(scanout_templat.width0, paddingX);
253 scanout_templat.height0 = align(scanout_templat.height0, paddingY);
254
255 scanout = renderonly_scanout_for_resource(&scanout_templat,
256 screen->ro, &handle);
257 if (!scanout)
258 return NULL;
259
260 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
261 handle.modifier = modifier;
262 rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
263 &handle,
264 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
265 close(handle.handle);
266 if (!rsc)
267 return NULL;
268
269 rsc->scanout = scanout;
270
271 return &rsc->base;
272 }
273
274 rsc = CALLOC_STRUCT(etna_resource);
275 if (!rsc)
276 return NULL;
277
278 rsc->base = *templat;
279 rsc->base.screen = pscreen;
280 rsc->base.nr_samples = nr_samples;
281 rsc->layout = layout;
282 rsc->halign = halign;
283
284 pipe_reference_init(&rsc->base.reference, 1);
285 list_inithead(&rsc->list);
286
287 size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
288
289 uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
290 if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
291 flags |= DRM_ETNA_GEM_FORCE_MMU;
292 struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
293 if (unlikely(bo == NULL)) {
294 BUG("Problem allocating video memory for resource");
295 goto free_rsc;
296 }
297
298 rsc->bo = bo;
299 rsc->ts_bo = 0; /* TS is only created when first bound to surface */
300
301 if (DBG_ENABLED(ETNA_DBG_ZERO)) {
302 void *map = etna_bo_map(bo);
303 memset(map, 0, size);
304 }
305
306 return &rsc->base;
307
308 free_rsc:
309 FREE(rsc);
310 return NULL;
311 }
312
313 static struct pipe_resource *
314 etna_resource_create(struct pipe_screen *pscreen,
315 const struct pipe_resource *templat)
316 {
317 struct etna_screen *screen = etna_screen(pscreen);
318
319 /* Figure out what tiling to use -- for now, assume that texture cannot be linear.
320 * there is a capability LINEAR_TEXTURE_SUPPORT (supported on gc880 and
321 * gc2000 at least), but not sure how it works.
322 * Buffers always have LINEAR layout.
323 */
324 unsigned layout = ETNA_LAYOUT_LINEAR;
325 if (etna_resource_sampler_only(templat)) {
326 /* The buffer is only used for texturing, so create something
327 * directly compatible with the sampler. Such a buffer can
328 * never be rendered to. */
329 layout = ETNA_LAYOUT_TILED;
330
331 if (util_format_is_compressed(templat->format))
332 layout = ETNA_LAYOUT_LINEAR;
333 } else if (templat->target != PIPE_BUFFER) {
334 bool want_multitiled = false;
335 bool want_supertiled = screen->specs.can_supertile;
336
337 /* When this GPU supports single-buffer rendering, don't ever enable
338 * multi-tiling. This replicates the blob behavior on GC3000.
339 */
340 if (!screen->specs.single_buffer)
341 want_multitiled = screen->specs.pixel_pipes > 1;
342
343 /* Keep single byte blocksized resources as tiled, since we
344 * are unable to use the RS blit to de-tile them. However,
345 * if they're used as a render target or depth/stencil, they
346 * must be multi-tiled for GPUs with multiple pixel pipes.
347 * Ignore depth/stencil here, but it is an error for a render
348 * target.
349 */
350 if (util_format_get_blocksize(templat->format) == 1 &&
351 !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
352 assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
353 want_multitiled = want_supertiled = false;
354 }
355
356 layout = ETNA_LAYOUT_BIT_TILE;
357 if (want_multitiled)
358 layout |= ETNA_LAYOUT_BIT_MULTI;
359 if (want_supertiled)
360 layout |= ETNA_LAYOUT_BIT_SUPER;
361 }
362
363 if (templat->target == PIPE_TEXTURE_3D)
364 layout = ETNA_LAYOUT_LINEAR;
365
366 /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
367 return etna_resource_alloc(pscreen, layout, DRM_FORMAT_MOD_LINEAR, templat);
368 }
369
370 enum modifier_priority {
371 MODIFIER_PRIORITY_INVALID = 0,
372 MODIFIER_PRIORITY_LINEAR,
373 MODIFIER_PRIORITY_SPLIT_TILED,
374 MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
375 MODIFIER_PRIORITY_TILED,
376 MODIFIER_PRIORITY_SUPER_TILED,
377 };
378
379 const uint64_t priority_to_modifier[] = {
380 [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
381 [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
382 [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
383 [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
384 [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
385 [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
386 };
387
388 static uint64_t
389 select_best_modifier(const struct etna_screen * screen,
390 const uint64_t *modifiers, const unsigned count)
391 {
392 enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
393
394 for (int i = 0; i < count; i++) {
395 switch (modifiers[i]) {
396 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
397 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
398 !screen->specs.can_supertile)
399 break;
400 prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
401 break;
402 case DRM_FORMAT_MOD_VIVANTE_TILED:
403 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
404 break;
405 prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
406 break;
407 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
408 if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
409 break;
410 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
411 break;
412 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
413 if (screen->specs.pixel_pipes < 2)
414 break;
415 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
416 break;
417 case DRM_FORMAT_MOD_LINEAR:
418 prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
419 break;
420 case DRM_FORMAT_MOD_INVALID:
421 default:
422 break;
423 }
424 }
425
426 return priority_to_modifier[prio];
427 }
428
429 static struct pipe_resource *
430 etna_resource_create_modifiers(struct pipe_screen *pscreen,
431 const struct pipe_resource *templat,
432 const uint64_t *modifiers, int count)
433 {
434 struct etna_screen *screen = etna_screen(pscreen);
435 struct pipe_resource tmpl = *templat;
436 uint64_t modifier = select_best_modifier(screen, modifiers, count);
437
438 if (modifier == DRM_FORMAT_MOD_INVALID)
439 return NULL;
440
441 /*
442 * We currently assume that all buffers allocated through this interface
443 * should be scanout enabled.
444 */
445 tmpl.bind |= PIPE_BIND_SCANOUT;
446
447 return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
448 modifier, &tmpl);
449 }
450
451 static void
452 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
453 {
454 struct etna_resource *res = etna_resource(prsc);
455
456 if (res->external)
457 etna_resource(res->external)->seqno++;
458 else
459 res->seqno++;
460 }
461
462 static void
463 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
464 {
465 struct etna_resource *rsc = etna_resource(prsc);
466
467 if (rsc->bo)
468 etna_bo_del(rsc->bo);
469
470 if (rsc->ts_bo)
471 etna_bo_del(rsc->ts_bo);
472
473 if (rsc->scanout)
474 renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
475
476 list_delinit(&rsc->list);
477
478 pipe_resource_reference(&rsc->texture, NULL);
479 pipe_resource_reference(&rsc->external, NULL);
480
481 FREE(rsc);
482 }
483
484 static struct pipe_resource *
485 etna_resource_from_handle(struct pipe_screen *pscreen,
486 const struct pipe_resource *tmpl,
487 struct winsys_handle *handle, unsigned usage)
488 {
489 struct etna_screen *screen = etna_screen(pscreen);
490 struct etna_resource *rsc;
491 struct etna_resource_level *level;
492 struct pipe_resource *prsc;
493 struct pipe_resource *ptiled = NULL;
494
495 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
496 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
497 tmpl->target, util_format_name(tmpl->format), tmpl->width0,
498 tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
499 tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
500
501 rsc = CALLOC_STRUCT(etna_resource);
502 if (!rsc)
503 return NULL;
504
505 level = &rsc->levels[0];
506 prsc = &rsc->base;
507
508 *prsc = *tmpl;
509
510 pipe_reference_init(&prsc->reference, 1);
511 list_inithead(&rsc->list);
512 prsc->screen = pscreen;
513
514 rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
515 if (!rsc->bo)
516 goto fail;
517
518 rsc->seqno = 1;
519 rsc->layout = modifier_to_layout(handle->modifier);
520 rsc->halign = TEXTURE_HALIGN_FOUR;
521
522
523 level->width = tmpl->width0;
524 level->height = tmpl->height0;
525
526 /* Determine padding of the imported resource. */
527 unsigned paddingX = 0, paddingY = 0;
528 etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
529 is_rs_align(screen, tmpl),
530 &paddingX, &paddingY, &rsc->halign);
531
532 if (!screen->specs.use_blt)
533 etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
534 level->padded_width = align(level->width, paddingX);
535 level->padded_height = align(level->height, paddingY);
536
537 level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
538 level->padded_height);
539 level->size = level->layer_stride;
540
541 /* The DDX must give us a BO which conforms to our padding size.
542 * The stride of the BO must be greater or equal to our padded
543 * stride. The size of the BO must accomodate the padded height. */
544 if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
545 BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
546 level->stride, util_format_get_stride(tmpl->format, level->padded_width),
547 util_format_name(tmpl->format));
548 goto fail;
549 }
550 if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
551 BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
552 etna_bo_size(rsc->bo), level->stride * level->padded_height,
553 util_format_name(tmpl->format));
554 goto fail;
555 }
556
557 if (rsc->layout == ETNA_LAYOUT_LINEAR) {
558 /*
559 * Both sampler and pixel pipes can't handle linear, create a compatible
560 * base resource, where we can attach the imported buffer as an external
561 * resource.
562 */
563 struct pipe_resource tiled_templat = *tmpl;
564
565 /*
566 * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
567 * this function to import the scanout buffer and get a tiled resource.
568 */
569 tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
570
571 ptiled = etna_resource_create(pscreen, &tiled_templat);
572 if (!ptiled)
573 goto fail;
574
575 etna_resource(ptiled)->external = prsc;
576
577 return ptiled;
578 }
579
580 return prsc;
581
582 fail:
583 etna_resource_destroy(pscreen, prsc);
584 if (ptiled)
585 etna_resource_destroy(pscreen, ptiled);
586
587 return NULL;
588 }
589
590 static boolean
591 etna_resource_get_handle(struct pipe_screen *pscreen,
592 struct pipe_context *pctx,
593 struct pipe_resource *prsc,
594 struct winsys_handle *handle, unsigned usage)
595 {
596 struct etna_resource *rsc = etna_resource(prsc);
597 /* Scanout is always attached to the base resource */
598 struct renderonly_scanout *scanout = rsc->scanout;
599
600 /*
601 * External resources are preferred, so a import->export chain of
602 * render/sampler incompatible buffers yield the same handle.
603 */
604 if (rsc->external)
605 rsc = etna_resource(rsc->external);
606
607 handle->stride = rsc->levels[0].stride;
608 handle->modifier = layout_to_modifier(rsc->layout);
609
610 if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
611 return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
612 } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
613 if (renderonly_get_handle(scanout, handle)) {
614 return TRUE;
615 } else {
616 handle->handle = etna_bo_handle(rsc->bo);
617 return TRUE;
618 }
619 } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
620 handle->handle = etna_bo_dmabuf(rsc->bo);
621 return TRUE;
622 } else {
623 return FALSE;
624 }
625 }
626
627 void
628 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
629 enum etna_resource_status status)
630 {
631 struct etna_resource *rsc;
632
633 if (!prsc)
634 return;
635
636 rsc = etna_resource(prsc);
637 rsc->status |= status;
638
639 /* TODO resources can actually be shared across contexts,
640 * so I'm not sure a single list-head will do the trick? */
641 debug_assert((rsc->pending_ctx == ctx) || !rsc->pending_ctx);
642 list_delinit(&rsc->list);
643 list_addtail(&rsc->list, &ctx->used_resources);
644 rsc->pending_ctx = ctx;
645 }
646
647 bool
648 etna_resource_has_valid_ts(struct etna_resource *rsc)
649 {
650 if (!rsc->ts_bo)
651 return false;
652
653 for (int level = 0; level <= rsc->base.last_level; level++)
654 if (rsc->levels[level].ts_valid)
655 return true;
656
657 return false;
658 }
659
660 void
661 etna_resource_screen_init(struct pipe_screen *pscreen)
662 {
663 pscreen->can_create_resource = etna_screen_can_create_resource;
664 pscreen->resource_create = etna_resource_create;
665 pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
666 pscreen->resource_from_handle = etna_resource_from_handle;
667 pscreen->resource_get_handle = etna_resource_get_handle;
668 pscreen->resource_changed = etna_resource_changed;
669 pscreen->resource_destroy = etna_resource_destroy;
670 }