etnaviv: remove initial CPU ts clear
[mesa.git] / src / gallium / drivers / etnaviv / etnaviv_resource.c
1 /*
2 * Copyright (c) 2012-2015 Etnaviv Project
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sub license,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice (including the
12 * next paragraph) shall be included in all copies or substantial portions
13 * of the Software.
14 *
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
21 * DEALINGS IN THE SOFTWARE.
22 *
23 * Authors:
24 * Wladimir J. van der Laan <laanwj@gmail.com>
25 */
26
27 #include "etnaviv_resource.h"
28
29 #include "hw/common.xml.h"
30
31 #include "etnaviv_context.h"
32 #include "etnaviv_debug.h"
33 #include "etnaviv_screen.h"
34 #include "etnaviv_translate.h"
35
36 #include "util/hash_table.h"
37 #include "util/u_inlines.h"
38 #include "util/u_memory.h"
39
40 #include "drm-uapi/drm_fourcc.h"
41
42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
43 {
44 switch (modifier) {
45 case DRM_FORMAT_MOD_VIVANTE_TILED:
46 return ETNA_LAYOUT_TILED;
47 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
48 return ETNA_LAYOUT_SUPER_TILED;
49 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
50 return ETNA_LAYOUT_MULTI_TILED;
51 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
52 return ETNA_LAYOUT_MULTI_SUPERTILED;
53 case DRM_FORMAT_MOD_LINEAR:
54 default:
55 return ETNA_LAYOUT_LINEAR;
56 }
57 }
58
59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
60 {
61 switch (layout) {
62 case ETNA_LAYOUT_TILED:
63 return DRM_FORMAT_MOD_VIVANTE_TILED;
64 case ETNA_LAYOUT_SUPER_TILED:
65 return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
66 case ETNA_LAYOUT_MULTI_TILED:
67 return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
68 case ETNA_LAYOUT_MULTI_SUPERTILED:
69 return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
70 case ETNA_LAYOUT_LINEAR:
71 return DRM_FORMAT_MOD_LINEAR;
72 default:
73 return DRM_FORMAT_MOD_INVALID;
74 }
75 }
76
77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
78 * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
79 * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
80 * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
81 */
82 bool
83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
84 struct etna_resource *rsc)
85 {
86 struct etna_screen *screen = etna_screen(pscreen);
87 size_t rt_ts_size, ts_layer_stride;
88 size_t ts_bits_per_tile, bytes_per_tile;
89 uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
90
91 assert(!rsc->ts_bo);
92
93 if (screen->specs.halti >= 5) {
94 ts_bits_per_tile = 4;
95 bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
96 } else {
97 ts_bits_per_tile = screen->specs.bits_per_tile;
98 bytes_per_tile = 64;
99 }
100
101 ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
102 bytes_per_tile * 8 / ts_bits_per_tile),
103 0x100 * screen->specs.pixel_pipes);
104 rt_ts_size = ts_layer_stride * rsc->base.array_size;
105 if (rt_ts_size == 0)
106 return true;
107
108 DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
109 rsc, rt_ts_size);
110
111 struct etna_bo *rt_ts;
112 rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
113
114 if (unlikely(!rt_ts)) {
115 BUG("Problem allocating tile status for resource");
116 return false;
117 }
118
119 rsc->ts_bo = rt_ts;
120 rsc->levels[0].ts_offset = 0;
121 rsc->levels[0].ts_layer_stride = ts_layer_stride;
122 rsc->levels[0].ts_size = rt_ts_size;
123 rsc->levels[0].ts_mode = ts_mode;
124
125 return true;
126 }
127
128 static boolean
129 etna_screen_can_create_resource(struct pipe_screen *pscreen,
130 const struct pipe_resource *templat)
131 {
132 struct etna_screen *screen = etna_screen(pscreen);
133 if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
134 return false;
135
136 /* templat->bind is not set here, so we must use the minimum sizes */
137 uint max_size =
138 MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
139
140 if (templat->width0 > max_size || templat->height0 > max_size)
141 return false;
142
143 return true;
144 }
145
146 static unsigned
147 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
148 unsigned msaa_xscale, unsigned msaa_yscale)
149 {
150 struct pipe_resource *prsc = &rsc->base;
151 unsigned level, size = 0;
152 unsigned width = prsc->width0;
153 unsigned height = prsc->height0;
154 unsigned depth = prsc->depth0;
155
156 for (level = 0; level <= prsc->last_level; level++) {
157 struct etna_resource_level *mip = &rsc->levels[level];
158
159 mip->width = width;
160 mip->height = height;
161 mip->padded_width = align(width * msaa_xscale, paddingX);
162 mip->padded_height = align(height * msaa_yscale, paddingY);
163 mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
164 mip->offset = size;
165 mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
166 mip->size = prsc->array_size * mip->layer_stride;
167
168 /* align levels to 64 bytes to be able to render to them */
169 size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
170
171 width = u_minify(width, 1);
172 height = u_minify(height, 1);
173 depth = u_minify(depth, 1);
174 }
175
176 return size;
177 }
178
179 /* Is rs alignment needed? */
180 static bool is_rs_align(struct etna_screen *screen,
181 const struct pipe_resource *tmpl)
182 {
183 return screen->specs.use_blt ? false : (
184 VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
185 !etna_resource_sampler_only(tmpl));
186 }
187
188 /* Create a new resource object, using the given template info */
189 struct pipe_resource *
190 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
191 enum etna_resource_addressing_mode mode, uint64_t modifier,
192 const struct pipe_resource *templat)
193 {
194 struct etna_screen *screen = etna_screen(pscreen);
195 struct etna_resource *rsc;
196 unsigned size;
197
198 DBG_F(ETNA_DBG_RESOURCE_MSGS,
199 "target=%d, format=%s, %ux%ux%u, array_size=%u, "
200 "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
201 templat->target, util_format_name(templat->format), templat->width0,
202 templat->height0, templat->depth0, templat->array_size,
203 templat->last_level, templat->nr_samples, templat->usage,
204 templat->bind, templat->flags);
205
206 /* Determine scaling for antialiasing, allow override using debug flag */
207 int nr_samples = templat->nr_samples;
208 if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
209 !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
210 if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
211 nr_samples = 2;
212 if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
213 nr_samples = 4;
214 }
215
216 int msaa_xscale = 1, msaa_yscale = 1;
217 if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
218 /* Number of samples not supported */
219 return NULL;
220 }
221
222 /* Determine needed padding (alignment of height/width) */
223 unsigned paddingX = 0, paddingY = 0;
224 unsigned halign = TEXTURE_HALIGN_FOUR;
225 if (!util_format_is_compressed(templat->format)) {
226 /* If we have the TEXTURE_HALIGN feature, we can always align to the
227 * resolve engine's width. If not, we must not align resources used
228 * only for textures. If this GPU uses the BLT engine, never do RS align.
229 */
230 etna_layout_multiple(layout, screen->specs.pixel_pipes,
231 is_rs_align (screen, templat),
232 &paddingX, &paddingY, &halign);
233 assert(paddingX && paddingY);
234 } else {
235 /* Compressed textures are padded to their block size, but we don't have
236 * to do anything special for that. */
237 paddingX = 1;
238 paddingY = 1;
239 }
240
241 if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
242 etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
243
244 if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
245 struct pipe_resource scanout_templat = *templat;
246 struct renderonly_scanout *scanout;
247 struct winsys_handle handle;
248
249 /* pad scanout buffer size to be compatible with the RS */
250 if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
251 etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
252
253 scanout_templat.width0 = align(scanout_templat.width0, paddingX);
254 scanout_templat.height0 = align(scanout_templat.height0, paddingY);
255
256 scanout = renderonly_scanout_for_resource(&scanout_templat,
257 screen->ro, &handle);
258 if (!scanout)
259 return NULL;
260
261 assert(handle.type == WINSYS_HANDLE_TYPE_FD);
262 handle.modifier = modifier;
263 rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
264 &handle,
265 PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
266 close(handle.handle);
267 if (!rsc)
268 return NULL;
269
270 rsc->scanout = scanout;
271
272 return &rsc->base;
273 }
274
275 rsc = CALLOC_STRUCT(etna_resource);
276 if (!rsc)
277 return NULL;
278
279 rsc->base = *templat;
280 rsc->base.screen = pscreen;
281 rsc->base.nr_samples = nr_samples;
282 rsc->layout = layout;
283 rsc->halign = halign;
284 rsc->addressing_mode = mode;
285
286 pipe_reference_init(&rsc->base.reference, 1);
287
288 size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
289
290 uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
291 if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
292 flags |= DRM_ETNA_GEM_FORCE_MMU;
293 struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
294 if (unlikely(bo == NULL)) {
295 BUG("Problem allocating video memory for resource");
296 goto free_rsc;
297 }
298
299 rsc->bo = bo;
300 rsc->ts_bo = 0; /* TS is only created when first bound to surface */
301
302 if (DBG_ENABLED(ETNA_DBG_ZERO)) {
303 void *map = etna_bo_map(bo);
304 memset(map, 0, size);
305 }
306
307 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
308 _mesa_key_pointer_equal);
309 if (!rsc->pending_ctx)
310 goto free_rsc;
311
312 return &rsc->base;
313
314 free_rsc:
315 FREE(rsc);
316 return NULL;
317 }
318
319 static struct pipe_resource *
320 etna_resource_create(struct pipe_screen *pscreen,
321 const struct pipe_resource *templat)
322 {
323 struct etna_screen *screen = etna_screen(pscreen);
324
325 /* Figure out what tiling and address mode to use -- for now, assume that
326 * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
327 * (supported on gc880 and gc2000 at least), but not sure how it works.
328 * Buffers always have LINEAR layout.
329 */
330 unsigned layout = ETNA_LAYOUT_LINEAR;
331 enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
332
333 if (etna_resource_sampler_only(templat)) {
334 /* The buffer is only used for texturing, so create something
335 * directly compatible with the sampler. Such a buffer can
336 * never be rendered to. */
337 layout = ETNA_LAYOUT_TILED;
338
339 if (util_format_is_compressed(templat->format))
340 layout = ETNA_LAYOUT_LINEAR;
341 } else if (templat->target != PIPE_BUFFER) {
342 bool want_multitiled = false;
343 bool want_supertiled = screen->specs.can_supertile;
344
345 /* When this GPU supports single-buffer rendering, don't ever enable
346 * multi-tiling. This replicates the blob behavior on GC3000.
347 */
348 if (!screen->specs.single_buffer)
349 want_multitiled = screen->specs.pixel_pipes > 1;
350
351 /* Keep single byte blocksized resources as tiled, since we
352 * are unable to use the RS blit to de-tile them. However,
353 * if they're used as a render target or depth/stencil, they
354 * must be multi-tiled for GPUs with multiple pixel pipes.
355 * Ignore depth/stencil here, but it is an error for a render
356 * target.
357 */
358 if (util_format_get_blocksize(templat->format) == 1 &&
359 !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
360 assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
361 want_multitiled = want_supertiled = false;
362 }
363
364 layout = ETNA_LAYOUT_BIT_TILE;
365 if (want_multitiled)
366 layout |= ETNA_LAYOUT_BIT_MULTI;
367 if (want_supertiled)
368 layout |= ETNA_LAYOUT_BIT_SUPER;
369 }
370
371 if (templat->target == PIPE_TEXTURE_3D)
372 layout = ETNA_LAYOUT_LINEAR;
373
374 /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
375 return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
376 }
377
378 enum modifier_priority {
379 MODIFIER_PRIORITY_INVALID = 0,
380 MODIFIER_PRIORITY_LINEAR,
381 MODIFIER_PRIORITY_SPLIT_TILED,
382 MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
383 MODIFIER_PRIORITY_TILED,
384 MODIFIER_PRIORITY_SUPER_TILED,
385 };
386
387 const uint64_t priority_to_modifier[] = {
388 [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
389 [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
390 [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
391 [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
392 [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
393 [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
394 };
395
396 static uint64_t
397 select_best_modifier(const struct etna_screen * screen,
398 const uint64_t *modifiers, const unsigned count)
399 {
400 enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
401
402 for (int i = 0; i < count; i++) {
403 switch (modifiers[i]) {
404 case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
405 if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
406 !screen->specs.can_supertile)
407 break;
408 prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
409 break;
410 case DRM_FORMAT_MOD_VIVANTE_TILED:
411 if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
412 break;
413 prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
414 break;
415 case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
416 if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
417 break;
418 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
419 break;
420 case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
421 if (screen->specs.pixel_pipes < 2)
422 break;
423 prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
424 break;
425 case DRM_FORMAT_MOD_LINEAR:
426 prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
427 break;
428 case DRM_FORMAT_MOD_INVALID:
429 default:
430 break;
431 }
432 }
433
434 return priority_to_modifier[prio];
435 }
436
437 static struct pipe_resource *
438 etna_resource_create_modifiers(struct pipe_screen *pscreen,
439 const struct pipe_resource *templat,
440 const uint64_t *modifiers, int count)
441 {
442 struct etna_screen *screen = etna_screen(pscreen);
443 struct pipe_resource tmpl = *templat;
444 uint64_t modifier = select_best_modifier(screen, modifiers, count);
445
446 if (modifier == DRM_FORMAT_MOD_INVALID)
447 return NULL;
448
449 /*
450 * We currently assume that all buffers allocated through this interface
451 * should be scanout enabled.
452 */
453 tmpl.bind |= PIPE_BIND_SCANOUT;
454
455 return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
456 ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
457 }
458
459 static void
460 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
461 {
462 struct etna_resource *res = etna_resource(prsc);
463
464 if (res->external)
465 etna_resource(res->external)->seqno++;
466 else
467 res->seqno++;
468 }
469
470 static void
471 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
472 {
473 struct etna_screen *screen = etna_screen(pscreen);
474 struct etna_resource *rsc = etna_resource(prsc);
475
476 mtx_lock(&screen->lock);
477 _mesa_set_remove_key(screen->used_resources, rsc);
478 _mesa_set_destroy(rsc->pending_ctx, NULL);
479 mtx_unlock(&screen->lock);
480
481 if (rsc->bo)
482 etna_bo_del(rsc->bo);
483
484 if (rsc->ts_bo)
485 etna_bo_del(rsc->ts_bo);
486
487 if (rsc->scanout)
488 renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
489
490 pipe_resource_reference(&rsc->texture, NULL);
491 pipe_resource_reference(&rsc->external, NULL);
492
493 for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
494 FREE(rsc->levels[i].patch_offsets);
495
496 FREE(rsc);
497 }
498
499 static struct pipe_resource *
500 etna_resource_from_handle(struct pipe_screen *pscreen,
501 const struct pipe_resource *tmpl,
502 struct winsys_handle *handle, unsigned usage)
503 {
504 struct etna_screen *screen = etna_screen(pscreen);
505 struct etna_resource *rsc;
506 struct etna_resource_level *level;
507 struct pipe_resource *prsc;
508 struct pipe_resource *ptiled = NULL;
509
510 DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
511 "nr_samples=%u, usage=%u, bind=%x, flags=%x",
512 tmpl->target, util_format_name(tmpl->format), tmpl->width0,
513 tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
514 tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
515
516 rsc = CALLOC_STRUCT(etna_resource);
517 if (!rsc)
518 return NULL;
519
520 level = &rsc->levels[0];
521 prsc = &rsc->base;
522
523 *prsc = *tmpl;
524
525 pipe_reference_init(&prsc->reference, 1);
526 prsc->screen = pscreen;
527
528 rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
529 if (!rsc->bo)
530 goto fail;
531
532 rsc->seqno = 1;
533 rsc->layout = modifier_to_layout(handle->modifier);
534 rsc->halign = TEXTURE_HALIGN_FOUR;
535 rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
536
537
538 level->width = tmpl->width0;
539 level->height = tmpl->height0;
540
541 /* Determine padding of the imported resource. */
542 unsigned paddingX = 0, paddingY = 0;
543 etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
544 is_rs_align(screen, tmpl),
545 &paddingX, &paddingY, &rsc->halign);
546
547 if (!screen->specs.use_blt)
548 etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
549 level->padded_width = align(level->width, paddingX);
550 level->padded_height = align(level->height, paddingY);
551
552 level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
553 level->padded_height);
554 level->size = level->layer_stride;
555
556 /* The DDX must give us a BO which conforms to our padding size.
557 * The stride of the BO must be greater or equal to our padded
558 * stride. The size of the BO must accomodate the padded height. */
559 if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
560 BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
561 level->stride, util_format_get_stride(tmpl->format, level->padded_width),
562 util_format_name(tmpl->format));
563 goto fail;
564 }
565 if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
566 BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
567 etna_bo_size(rsc->bo), level->stride * level->padded_height,
568 util_format_name(tmpl->format));
569 goto fail;
570 }
571
572 rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
573 _mesa_key_pointer_equal);
574 if (!rsc->pending_ctx)
575 goto fail;
576
577 if (rsc->layout == ETNA_LAYOUT_LINEAR) {
578 /*
579 * Both sampler and pixel pipes can't handle linear, create a compatible
580 * base resource, where we can attach the imported buffer as an external
581 * resource.
582 */
583 struct pipe_resource tiled_templat = *tmpl;
584
585 /*
586 * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
587 * this function to import the scanout buffer and get a tiled resource.
588 */
589 tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
590
591 ptiled = etna_resource_create(pscreen, &tiled_templat);
592 if (!ptiled)
593 goto fail;
594
595 etna_resource(ptiled)->external = prsc;
596
597 return ptiled;
598 }
599
600 return prsc;
601
602 fail:
603 etna_resource_destroy(pscreen, prsc);
604 if (ptiled)
605 etna_resource_destroy(pscreen, ptiled);
606
607 return NULL;
608 }
609
610 static boolean
611 etna_resource_get_handle(struct pipe_screen *pscreen,
612 struct pipe_context *pctx,
613 struct pipe_resource *prsc,
614 struct winsys_handle *handle, unsigned usage)
615 {
616 struct etna_resource *rsc = etna_resource(prsc);
617 /* Scanout is always attached to the base resource */
618 struct renderonly_scanout *scanout = rsc->scanout;
619
620 /*
621 * External resources are preferred, so a import->export chain of
622 * render/sampler incompatible buffers yield the same handle.
623 */
624 if (rsc->external)
625 rsc = etna_resource(rsc->external);
626
627 handle->stride = rsc->levels[0].stride;
628 handle->offset = rsc->levels[0].offset;
629 handle->modifier = layout_to_modifier(rsc->layout);
630
631 if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
632 return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
633 } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
634 if (renderonly_get_handle(scanout, handle)) {
635 return TRUE;
636 } else {
637 handle->handle = etna_bo_handle(rsc->bo);
638 return TRUE;
639 }
640 } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
641 handle->handle = etna_bo_dmabuf(rsc->bo);
642 return TRUE;
643 } else {
644 return FALSE;
645 }
646 }
647
648 void
649 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
650 enum etna_resource_status status)
651 {
652 struct etna_screen *screen = ctx->screen;
653 struct etna_resource *rsc;
654
655 if (!prsc)
656 return;
657
658 rsc = etna_resource(prsc);
659
660 mtx_lock(&screen->lock);
661
662 /*
663 * if we are pending read or write by any other context or
664 * if reading a resource pending a write, then
665 * flush all the contexts to maintain coherency
666 */
667 if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
668 ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
669 set_foreach(rsc->pending_ctx, entry) {
670 struct etna_context *extctx = (struct etna_context *)entry->key;
671 struct pipe_context *pctx = &extctx->base;
672
673 if (extctx == ctx)
674 continue;
675
676 pctx->flush(pctx, NULL, 0);
677 /* It's safe to clear the status here. If we need to flush it means
678 * either another context had the resource in exclusive (write) use,
679 * or we transition the resource to exclusive use in our context.
680 * In both cases the new status accurately reflects the resource use
681 * after the flush.
682 */
683 rsc->status = 0;
684 }
685 }
686
687 rsc->status |= status;
688
689 _mesa_set_add(screen->used_resources, rsc);
690 _mesa_set_add(rsc->pending_ctx, ctx);
691
692 mtx_unlock(&screen->lock);
693 }
694
695 bool
696 etna_resource_has_valid_ts(struct etna_resource *rsc)
697 {
698 if (!rsc->ts_bo)
699 return false;
700
701 for (int level = 0; level <= rsc->base.last_level; level++)
702 if (rsc->levels[level].ts_valid)
703 return true;
704
705 return false;
706 }
707
708 void
709 etna_resource_screen_init(struct pipe_screen *pscreen)
710 {
711 pscreen->can_create_resource = etna_screen_can_create_resource;
712 pscreen->resource_create = etna_resource_create;
713 pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
714 pscreen->resource_from_handle = etna_resource_from_handle;
715 pscreen->resource_get_handle = etna_resource_get_handle;
716 pscreen->resource_changed = etna_resource_changed;
717 pscreen->resource_destroy = etna_resource_destroy;
718 }