src/gallium/drivers/etnaviv/etnaviv_resource.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_resource.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_context.h"
  32 #include "etnaviv_debug.h"
  33 #include "etnaviv_screen.h"
  34 #include "etnaviv_translate.h"
  35
  36 #include "util/hash_table.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static enum etna_surface_layout modifier_to_layout(uint64_t modifier)
  43 {
  44    switch (modifier) {
  45    case DRM_FORMAT_MOD_VIVANTE_TILED:
  46       return ETNA_LAYOUT_TILED;
  47    case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
  48       return ETNA_LAYOUT_SUPER_TILED;
  49    case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
  50       return ETNA_LAYOUT_MULTI_TILED;
  51    case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
  52       return ETNA_LAYOUT_MULTI_SUPERTILED;
  53    case DRM_FORMAT_MOD_LINEAR:
  54    default:
  55       return ETNA_LAYOUT_LINEAR;
  56    }
  57 }
  58
  59 static uint64_t layout_to_modifier(enum etna_surface_layout layout)
  60 {
  61    switch (layout) {
  62    case ETNA_LAYOUT_TILED:
  63       return DRM_FORMAT_MOD_VIVANTE_TILED;
  64    case ETNA_LAYOUT_SUPER_TILED:
  65       return DRM_FORMAT_MOD_VIVANTE_SUPER_TILED;
  66    case ETNA_LAYOUT_MULTI_TILED:
  67       return DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED;
  68    case ETNA_LAYOUT_MULTI_SUPERTILED:
  69       return DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED;
  70    case ETNA_LAYOUT_LINEAR:
  71       return DRM_FORMAT_MOD_LINEAR;
  72    default:
  73       return DRM_FORMAT_MOD_INVALID;
  74    }
  75 }
  76
  77 /* A tile is 4x4 pixels, having 'screen->specs.bits_per_tile' of tile status.
  78  * So, in a buffer of N pixels, there are N / (4 * 4) tiles.
  79  * We need N * screen->specs.bits_per_tile / (4 * 4) bits of tile status, or
  80  * N * screen->specs.bits_per_tile / (4 * 4 * 8) bytes.
  81  */
  82 bool
  83 etna_screen_resource_alloc_ts(struct pipe_screen *pscreen,
  84                               struct etna_resource *rsc)
  85 {
  86    struct etna_screen *screen = etna_screen(pscreen);
  87    size_t rt_ts_size, ts_layer_stride;
  88    size_t ts_bits_per_tile, bytes_per_tile;
  89    uint8_t ts_mode = TS_MODE_128B; /* only used by halti5 */
  90
  91    assert(!rsc->ts_bo);
  92
  93    if (screen->specs.halti >= 5) {
  94       ts_bits_per_tile = 4;
  95       bytes_per_tile = ts_mode == TS_MODE_256B ? 256 : 128;
  96    } else {
  97       ts_bits_per_tile = screen->specs.bits_per_tile;
  98       bytes_per_tile = 64;
  99    }
 100
 101    ts_layer_stride = align(DIV_ROUND_UP(rsc->levels[0].layer_stride,
 102                                         bytes_per_tile * 8 / ts_bits_per_tile),
 103                            0x100 * screen->specs.pixel_pipes);
 104    rt_ts_size = ts_layer_stride * rsc->base.array_size;
 105    if (rt_ts_size == 0)
 106       return true;
 107
 108    DBG_F(ETNA_DBG_RESOURCE_MSGS, "%p: Allocating tile status of size %zu",
 109          rsc, rt_ts_size);
 110
 111    struct etna_bo *rt_ts;
 112    rt_ts = etna_bo_new(screen->dev, rt_ts_size, DRM_ETNA_GEM_CACHE_WC);
 113
 114    if (unlikely(!rt_ts)) {
 115       BUG("Problem allocating tile status for resource");
 116       return false;
 117    }
 118
 119    rsc->ts_bo = rt_ts;
 120    rsc->levels[0].ts_offset = 0;
 121    rsc->levels[0].ts_layer_stride = ts_layer_stride;
 122    rsc->levels[0].ts_size = rt_ts_size;
 123    rsc->levels[0].ts_mode = ts_mode;
 124
 125    /* It is important to initialize the TS, as random pattern
 126     * can result in crashes. Do this on the CPU as this only happens once
 127     * per surface anyway and it's a small area, so it may not be worth
 128     * queuing this to the GPU. */
 129    void *ts_map = etna_bo_map(rt_ts);
 130    memset(ts_map, screen->specs.ts_clear_value, rt_ts_size);
 131
 132    return true;
 133 }
 134
 135 static boolean
 136 etna_screen_can_create_resource(struct pipe_screen *pscreen,
 137                                 const struct pipe_resource *templat)
 138 {
 139    struct etna_screen *screen = etna_screen(pscreen);
 140    if (!translate_samples_to_xyscale(templat->nr_samples, NULL, NULL, NULL))
 141       return false;
 142
 143    /* templat->bind is not set here, so we must use the minimum sizes */
 144    uint max_size =
 145       MIN2(screen->specs.max_rendertarget_size, screen->specs.max_texture_size);
 146
 147    if (templat->width0 > max_size || templat->height0 > max_size)
 148       return false;
 149
 150    return true;
 151 }
 152
 153 static unsigned
 154 setup_miptree(struct etna_resource *rsc, unsigned paddingX, unsigned paddingY,
 155               unsigned msaa_xscale, unsigned msaa_yscale)
 156 {
 157    struct pipe_resource *prsc = &rsc->base;
 158    unsigned level, size = 0;
 159    unsigned width = prsc->width0;
 160    unsigned height = prsc->height0;
 161    unsigned depth = prsc->depth0;
 162
 163    for (level = 0; level <= prsc->last_level; level++) {
 164       struct etna_resource_level *mip = &rsc->levels[level];
 165
 166       mip->width = width;
 167       mip->height = height;
 168       mip->padded_width = align(width * msaa_xscale, paddingX);
 169       mip->padded_height = align(height * msaa_yscale, paddingY);
 170       mip->stride = util_format_get_stride(prsc->format, mip->padded_width);
 171       mip->offset = size;
 172       mip->layer_stride = mip->stride * util_format_get_nblocksy(prsc->format, mip->padded_height);
 173       mip->size = prsc->array_size * mip->layer_stride;
 174
 175       /* align levels to 64 bytes to be able to render to them */
 176       size += align(mip->size, ETNA_PE_ALIGNMENT) * depth;
 177
 178       width = u_minify(width, 1);
 179       height = u_minify(height, 1);
 180       depth = u_minify(depth, 1);
 181    }
 182
 183    return size;
 184 }
 185
 186 /* Is rs alignment needed? */
 187 static bool is_rs_align(struct etna_screen *screen,
 188                         const struct pipe_resource *tmpl)
 189 {
 190    return screen->specs.use_blt ? false : (
 191       VIV_FEATURE(screen, chipMinorFeatures1, TEXTURE_HALIGN) ||
 192       !etna_resource_sampler_only(tmpl));
 193 }
 194
 195 /* Create a new resource object, using the given template info */
 196 struct pipe_resource *
 197 etna_resource_alloc(struct pipe_screen *pscreen, unsigned layout,
 198                     enum etna_resource_addressing_mode mode, uint64_t modifier,
 199                     const struct pipe_resource *templat)
 200 {
 201    struct etna_screen *screen = etna_screen(pscreen);
 202    struct etna_resource *rsc;
 203    unsigned size;
 204
 205    DBG_F(ETNA_DBG_RESOURCE_MSGS,
 206          "target=%d, format=%s, %ux%ux%u, array_size=%u, "
 207          "last_level=%u, nr_samples=%u, usage=%u, bind=%x, flags=%x",
 208          templat->target, util_format_name(templat->format), templat->width0,
 209          templat->height0, templat->depth0, templat->array_size,
 210          templat->last_level, templat->nr_samples, templat->usage,
 211          templat->bind, templat->flags);
 212
 213    /* Determine scaling for antialiasing, allow override using debug flag */
 214    int nr_samples = templat->nr_samples;
 215    if ((templat->bind & (PIPE_BIND_RENDER_TARGET | PIPE_BIND_DEPTH_STENCIL)) &&
 216        !(templat->bind & PIPE_BIND_SAMPLER_VIEW)) {
 217       if (DBG_ENABLED(ETNA_DBG_MSAA_2X))
 218          nr_samples = 2;
 219       if (DBG_ENABLED(ETNA_DBG_MSAA_4X))
 220          nr_samples = 4;
 221    }
 222
 223    int msaa_xscale = 1, msaa_yscale = 1;
 224    if (!translate_samples_to_xyscale(nr_samples, &msaa_xscale, &msaa_yscale, NULL)) {
 225       /* Number of samples not supported */
 226       return NULL;
 227    }
 228
 229    /* Determine needed padding (alignment of height/width) */
 230    unsigned paddingX = 0, paddingY = 0;
 231    unsigned halign = TEXTURE_HALIGN_FOUR;
 232    if (!util_format_is_compressed(templat->format)) {
 233       /* If we have the TEXTURE_HALIGN feature, we can always align to the
 234        * resolve engine's width.  If not, we must not align resources used
 235        * only for textures. If this GPU uses the BLT engine, never do RS align.
 236        */
 237       etna_layout_multiple(layout, screen->specs.pixel_pipes,
 238                            is_rs_align (screen, templat),
 239                            &paddingX, &paddingY, &halign);
 240       assert(paddingX && paddingY);
 241    } else {
 242       /* Compressed textures are padded to their block size, but we don't have
 243        * to do anything special for that. */
 244       paddingX = 1;
 245       paddingY = 1;
 246    }
 247
 248    if (!screen->specs.use_blt && templat->target != PIPE_BUFFER)
 249       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 250
 251    if (templat->bind & PIPE_BIND_SCANOUT && screen->ro->kms_fd >= 0) {
 252       struct pipe_resource scanout_templat = *templat;
 253       struct renderonly_scanout *scanout;
 254       struct winsys_handle handle;
 255
 256       /* pad scanout buffer size to be compatible with the RS */
 257       if (!screen->specs.use_blt && modifier == DRM_FORMAT_MOD_LINEAR)
 258          etna_adjust_rs_align(screen->specs.pixel_pipes, &paddingX, &paddingY);
 259
 260       scanout_templat.width0 = align(scanout_templat.width0, paddingX);
 261       scanout_templat.height0 = align(scanout_templat.height0, paddingY);
 262
 263       scanout = renderonly_scanout_for_resource(&scanout_templat,
 264                                                 screen->ro, &handle);
 265       if (!scanout)
 266          return NULL;
 267
 268       assert(handle.type == WINSYS_HANDLE_TYPE_FD);
 269       handle.modifier = modifier;
 270       rsc = etna_resource(pscreen->resource_from_handle(pscreen, templat,
 271                                                         &handle,
 272                                                         PIPE_HANDLE_USAGE_FRAMEBUFFER_WRITE));
 273       close(handle.handle);
 274       if (!rsc)
 275          return NULL;
 276
 277       rsc->scanout = scanout;
 278
 279       return &rsc->base;
 280    }
 281
 282    rsc = CALLOC_STRUCT(etna_resource);
 283    if (!rsc)
 284       return NULL;
 285
 286    rsc->base = *templat;
 287    rsc->base.screen = pscreen;
 288    rsc->base.nr_samples = nr_samples;
 289    rsc->layout = layout;
 290    rsc->halign = halign;
 291    rsc->addressing_mode = mode;
 292
 293    pipe_reference_init(&rsc->base.reference, 1);
 294
 295    size = setup_miptree(rsc, paddingX, paddingY, msaa_xscale, msaa_yscale);
 296
 297    uint32_t flags = DRM_ETNA_GEM_CACHE_WC;
 298    if (templat->bind & PIPE_BIND_VERTEX_BUFFER)
 299       flags |= DRM_ETNA_GEM_FORCE_MMU;
 300    struct etna_bo *bo = etna_bo_new(screen->dev, size, flags);
 301    if (unlikely(bo == NULL)) {
 302       BUG("Problem allocating video memory for resource");
 303       goto free_rsc;
 304    }
 305
 306    rsc->bo = bo;
 307    rsc->ts_bo = 0; /* TS is only created when first bound to surface */
 308
 309    if (DBG_ENABLED(ETNA_DBG_ZERO)) {
 310       void *map = etna_bo_map(bo);
 311       memset(map, 0, size);
 312    }
 313
 314    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 315                                        _mesa_key_pointer_equal);
 316    if (!rsc->pending_ctx)
 317       goto free_rsc;
 318
 319    return &rsc->base;
 320
 321 free_rsc:
 322    FREE(rsc);
 323    return NULL;
 324 }
 325
 326 static struct pipe_resource *
 327 etna_resource_create(struct pipe_screen *pscreen,
 328                      const struct pipe_resource *templat)
 329 {
 330    struct etna_screen *screen = etna_screen(pscreen);
 331
 332    /* Figure out what tiling and address mode to use -- for now, assume that
 333     * texture cannot be linear. there is a capability LINEAR_TEXTURE_SUPPORT
 334     * (supported on gc880 and gc2000 at least), but not sure how it works.
 335     * Buffers always have LINEAR layout.
 336     */
 337    unsigned layout = ETNA_LAYOUT_LINEAR;
 338    enum etna_resource_addressing_mode mode = ETNA_ADDRESSING_MODE_TILED;
 339
 340    if (etna_resource_sampler_only(templat)) {
 341       /* The buffer is only used for texturing, so create something
 342        * directly compatible with the sampler.  Such a buffer can
 343        * never be rendered to. */
 344       layout = ETNA_LAYOUT_TILED;
 345
 346       if (util_format_is_compressed(templat->format))
 347          layout = ETNA_LAYOUT_LINEAR;
 348    } else if (templat->target != PIPE_BUFFER) {
 349       bool want_multitiled = false;
 350       bool want_supertiled = screen->specs.can_supertile;
 351
 352       /* When this GPU supports single-buffer rendering, don't ever enable
 353        * multi-tiling. This replicates the blob behavior on GC3000.
 354        */
 355       if (!screen->specs.single_buffer)
 356          want_multitiled = screen->specs.pixel_pipes > 1;
 357
 358       /* Keep single byte blocksized resources as tiled, since we
 359        * are unable to use the RS blit to de-tile them. However,
 360        * if they're used as a render target or depth/stencil, they
 361        * must be multi-tiled for GPUs with multiple pixel pipes.
 362        * Ignore depth/stencil here, but it is an error for a render
 363        * target.
 364        */
 365       if (util_format_get_blocksize(templat->format) == 1 &&
 366           !(templat->bind & PIPE_BIND_DEPTH_STENCIL)) {
 367          assert(!(templat->bind & PIPE_BIND_RENDER_TARGET && want_multitiled));
 368          want_multitiled = want_supertiled = false;
 369       }
 370
 371       layout = ETNA_LAYOUT_BIT_TILE;
 372       if (want_multitiled)
 373          layout |= ETNA_LAYOUT_BIT_MULTI;
 374       if (want_supertiled)
 375          layout |= ETNA_LAYOUT_BIT_SUPER;
 376    }
 377
 378    if (templat->target == PIPE_TEXTURE_3D)
 379       layout = ETNA_LAYOUT_LINEAR;
 380
 381    /* modifier is only used for scanout surfaces, so safe to use LINEAR here */
 382    return etna_resource_alloc(pscreen, layout, mode, DRM_FORMAT_MOD_LINEAR, templat);
 383 }
 384
 385 enum modifier_priority {
 386    MODIFIER_PRIORITY_INVALID = 0,
 387    MODIFIER_PRIORITY_LINEAR,
 388    MODIFIER_PRIORITY_SPLIT_TILED,
 389    MODIFIER_PRIORITY_SPLIT_SUPER_TILED,
 390    MODIFIER_PRIORITY_TILED,
 391    MODIFIER_PRIORITY_SUPER_TILED,
 392 };
 393
 394 const uint64_t priority_to_modifier[] = {
 395    [MODIFIER_PRIORITY_INVALID] = DRM_FORMAT_MOD_INVALID,
 396    [MODIFIER_PRIORITY_LINEAR] = DRM_FORMAT_MOD_LINEAR,
 397    [MODIFIER_PRIORITY_SPLIT_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED,
 398    [MODIFIER_PRIORITY_SPLIT_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED,
 399    [MODIFIER_PRIORITY_TILED] = DRM_FORMAT_MOD_VIVANTE_TILED,
 400    [MODIFIER_PRIORITY_SUPER_TILED] = DRM_FORMAT_MOD_VIVANTE_SUPER_TILED,
 401 };
 402
 403 static uint64_t
 404 select_best_modifier(const struct etna_screen * screen,
 405                      const uint64_t *modifiers, const unsigned count)
 406 {
 407    enum modifier_priority prio = MODIFIER_PRIORITY_INVALID;
 408
 409    for (int i = 0; i < count; i++) {
 410       switch (modifiers[i]) {
 411       case DRM_FORMAT_MOD_VIVANTE_SUPER_TILED:
 412          if ((screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer) ||
 413              !screen->specs.can_supertile)
 414             break;
 415          prio = MAX2(prio, MODIFIER_PRIORITY_SUPER_TILED);
 416          break;
 417       case DRM_FORMAT_MOD_VIVANTE_TILED:
 418          if (screen->specs.pixel_pipes > 1 && !screen->specs.single_buffer)
 419             break;
 420          prio = MAX2(prio, MODIFIER_PRIORITY_TILED);
 421          break;
 422       case DRM_FORMAT_MOD_VIVANTE_SPLIT_SUPER_TILED:
 423          if ((screen->specs.pixel_pipes < 2) || !screen->specs.can_supertile)
 424             break;
 425          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_SUPER_TILED);
 426          break;
 427       case DRM_FORMAT_MOD_VIVANTE_SPLIT_TILED:
 428          if (screen->specs.pixel_pipes < 2)
 429             break;
 430          prio = MAX2(prio, MODIFIER_PRIORITY_SPLIT_TILED);
 431          break;
 432       case DRM_FORMAT_MOD_LINEAR:
 433          prio = MAX2(prio, MODIFIER_PRIORITY_LINEAR);
 434          break;
 435       case DRM_FORMAT_MOD_INVALID:
 436       default:
 437          break;
 438       }
 439    }
 440
 441    return priority_to_modifier[prio];
 442 }
 443
 444 static struct pipe_resource *
 445 etna_resource_create_modifiers(struct pipe_screen *pscreen,
 446                                const struct pipe_resource *templat,
 447                                const uint64_t *modifiers, int count)
 448 {
 449    struct etna_screen *screen = etna_screen(pscreen);
 450    struct pipe_resource tmpl = *templat;
 451    uint64_t modifier = select_best_modifier(screen, modifiers, count);
 452
 453    if (modifier == DRM_FORMAT_MOD_INVALID)
 454       return NULL;
 455
 456    /*
 457     * We currently assume that all buffers allocated through this interface
 458     * should be scanout enabled.
 459     */
 460    tmpl.bind |= PIPE_BIND_SCANOUT;
 461
 462    return etna_resource_alloc(pscreen, modifier_to_layout(modifier),
 463                               ETNA_ADDRESSING_MODE_TILED, modifier, &tmpl);
 464 }
 465
 466 static void
 467 etna_resource_changed(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 468 {
 469    struct etna_resource *res = etna_resource(prsc);
 470
 471    if (res->external)
 472       etna_resource(res->external)->seqno++;
 473    else
 474       res->seqno++;
 475 }
 476
 477 static void
 478 etna_resource_destroy(struct pipe_screen *pscreen, struct pipe_resource *prsc)
 479 {
 480    struct etna_screen *screen = etna_screen(pscreen);
 481    struct etna_resource *rsc = etna_resource(prsc);
 482
 483    mtx_lock(&screen->lock);
 484    _mesa_set_remove_key(screen->used_resources, rsc);
 485    _mesa_set_destroy(rsc->pending_ctx, NULL);
 486    mtx_unlock(&screen->lock);
 487
 488    if (rsc->bo)
 489       etna_bo_del(rsc->bo);
 490
 491    if (rsc->ts_bo)
 492       etna_bo_del(rsc->ts_bo);
 493
 494    if (rsc->scanout)
 495       renderonly_scanout_destroy(rsc->scanout, etna_screen(pscreen)->ro);
 496
 497    pipe_resource_reference(&rsc->texture, NULL);
 498    pipe_resource_reference(&rsc->external, NULL);
 499
 500    for (unsigned i = 0; i < ETNA_NUM_LOD; i++)
 501       FREE(rsc->levels[i].patch_offsets);
 502
 503    FREE(rsc);
 504 }
 505
 506 static struct pipe_resource *
 507 etna_resource_from_handle(struct pipe_screen *pscreen,
 508                           const struct pipe_resource *tmpl,
 509                           struct winsys_handle *handle, unsigned usage)
 510 {
 511    struct etna_screen *screen = etna_screen(pscreen);
 512    struct etna_resource *rsc;
 513    struct etna_resource_level *level;
 514    struct pipe_resource *prsc;
 515    struct pipe_resource *ptiled = NULL;
 516
 517    DBG("target=%d, format=%s, %ux%ux%u, array_size=%u, last_level=%u, "
 518        "nr_samples=%u, usage=%u, bind=%x, flags=%x",
 519        tmpl->target, util_format_name(tmpl->format), tmpl->width0,
 520        tmpl->height0, tmpl->depth0, tmpl->array_size, tmpl->last_level,
 521        tmpl->nr_samples, tmpl->usage, tmpl->bind, tmpl->flags);
 522
 523    rsc = CALLOC_STRUCT(etna_resource);
 524    if (!rsc)
 525       return NULL;
 526
 527    level = &rsc->levels[0];
 528    prsc = &rsc->base;
 529
 530    *prsc = *tmpl;
 531
 532    pipe_reference_init(&prsc->reference, 1);
 533    prsc->screen = pscreen;
 534
 535    rsc->bo = etna_screen_bo_from_handle(pscreen, handle, &level->stride);
 536    if (!rsc->bo)
 537       goto fail;
 538
 539    rsc->seqno = 1;
 540    rsc->layout = modifier_to_layout(handle->modifier);
 541    rsc->halign = TEXTURE_HALIGN_FOUR;
 542    rsc->addressing_mode = ETNA_ADDRESSING_MODE_TILED;
 543
 544
 545    level->width = tmpl->width0;
 546    level->height = tmpl->height0;
 547
 548    /* Determine padding of the imported resource. */
 549    unsigned paddingX = 0, paddingY = 0;
 550    etna_layout_multiple(rsc->layout, screen->specs.pixel_pipes,
 551                         is_rs_align(screen, tmpl),
 552                         &paddingX, &paddingY, &rsc->halign);
 553
 554    if (!screen->specs.use_blt)
 555       etna_adjust_rs_align(screen->specs.pixel_pipes, NULL, &paddingY);
 556    level->padded_width = align(level->width, paddingX);
 557    level->padded_height = align(level->height, paddingY);
 558
 559    level->layer_stride = level->stride * util_format_get_nblocksy(prsc->format,
 560                                                                   level->padded_height);
 561    level->size = level->layer_stride;
 562
 563    /* The DDX must give us a BO which conforms to our padding size.
 564     * The stride of the BO must be greater or equal to our padded
 565     * stride. The size of the BO must accomodate the padded height. */
 566    if (level->stride < util_format_get_stride(tmpl->format, level->padded_width)) {
 567       BUG("BO stride %u is too small for RS engine width padding (%zu, format %s)",
 568           level->stride, util_format_get_stride(tmpl->format, level->padded_width),
 569           util_format_name(tmpl->format));
 570       goto fail;
 571    }
 572    if (etna_bo_size(rsc->bo) < level->stride * level->padded_height) {
 573       BUG("BO size %u is too small for RS engine height padding (%u, format %s)",
 574           etna_bo_size(rsc->bo), level->stride * level->padded_height,
 575           util_format_name(tmpl->format));
 576       goto fail;
 577    }
 578
 579    rsc->pending_ctx = _mesa_set_create(NULL, _mesa_hash_pointer,
 580                                        _mesa_key_pointer_equal);
 581    if (!rsc->pending_ctx)
 582       goto fail;
 583
 584    if (rsc->layout == ETNA_LAYOUT_LINEAR) {
 585       /*
 586        * Both sampler and pixel pipes can't handle linear, create a compatible
 587        * base resource, where we can attach the imported buffer as an external
 588        * resource.
 589        */
 590       struct pipe_resource tiled_templat = *tmpl;
 591
 592       /*
 593        * Remove BIND_SCANOUT to avoid recursion, as etna_resource_create uses
 594        * this function to import the scanout buffer and get a tiled resource.
 595        */
 596       tiled_templat.bind &= ~PIPE_BIND_SCANOUT;
 597
 598       ptiled = etna_resource_create(pscreen, &tiled_templat);
 599       if (!ptiled)
 600          goto fail;
 601
 602       etna_resource(ptiled)->external = prsc;
 603
 604       return ptiled;
 605    }
 606
 607    return prsc;
 608
 609 fail:
 610    etna_resource_destroy(pscreen, prsc);
 611    if (ptiled)
 612       etna_resource_destroy(pscreen, ptiled);
 613
 614    return NULL;
 615 }
 616
 617 static boolean
 618 etna_resource_get_handle(struct pipe_screen *pscreen,
 619                          struct pipe_context *pctx,
 620                          struct pipe_resource *prsc,
 621                          struct winsys_handle *handle, unsigned usage)
 622 {
 623    struct etna_resource *rsc = etna_resource(prsc);
 624    /* Scanout is always attached to the base resource */
 625    struct renderonly_scanout *scanout = rsc->scanout;
 626
 627    /*
 628     * External resources are preferred, so a import->export chain of
 629     * render/sampler incompatible buffers yield the same handle.
 630     */
 631    if (rsc->external)
 632       rsc = etna_resource(rsc->external);
 633
 634    handle->stride = rsc->levels[0].stride;
 635    handle->offset = rsc->levels[0].offset;
 636    handle->modifier = layout_to_modifier(rsc->layout);
 637
 638    if (handle->type == WINSYS_HANDLE_TYPE_SHARED) {
 639       return etna_bo_get_name(rsc->bo, &handle->handle) == 0;
 640    } else if (handle->type == WINSYS_HANDLE_TYPE_KMS) {
 641       if (renderonly_get_handle(scanout, handle)) {
 642          return TRUE;
 643       } else {
 644          handle->handle = etna_bo_handle(rsc->bo);
 645          return TRUE;
 646       }
 647    } else if (handle->type == WINSYS_HANDLE_TYPE_FD) {
 648       handle->handle = etna_bo_dmabuf(rsc->bo);
 649       return TRUE;
 650    } else {
 651       return FALSE;
 652    }
 653 }
 654
 655 void
 656 etna_resource_used(struct etna_context *ctx, struct pipe_resource *prsc,
 657                    enum etna_resource_status status)
 658 {
 659    struct etna_screen *screen = ctx->screen;
 660    struct etna_resource *rsc;
 661
 662    if (!prsc)
 663       return;
 664
 665    rsc = etna_resource(prsc);
 666
 667    mtx_lock(&screen->lock);
 668
 669    /*
 670     * if we are pending read or write by any other context or
 671     * if reading a resource pending a write, then
 672     * flush all the contexts to maintain coherency
 673     */
 674    if (((status & ETNA_PENDING_WRITE) && rsc->status) ||
 675        ((status & ETNA_PENDING_READ) && (rsc->status & ETNA_PENDING_WRITE))) {
 676       set_foreach(rsc->pending_ctx, entry) {
 677          struct etna_context *extctx = (struct etna_context *)entry->key;
 678          struct pipe_context *pctx = &extctx->base;
 679
 680          if (extctx == ctx)
 681             continue;
 682
 683          pctx->flush(pctx, NULL, 0);
 684          /* It's safe to clear the status here. If we need to flush it means
 685           * either another context had the resource in exclusive (write) use,
 686           * or we transition the resource to exclusive use in our context.
 687           * In both cases the new status accurately reflects the resource use
 688           * after the flush.
 689           */
 690          rsc->status = 0;
 691       }
 692    }
 693
 694    rsc->status |= status;
 695
 696    _mesa_set_add(screen->used_resources, rsc);
 697    _mesa_set_add(rsc->pending_ctx, ctx);
 698
 699    mtx_unlock(&screen->lock);
 700 }
 701
 702 bool
 703 etna_resource_has_valid_ts(struct etna_resource *rsc)
 704 {
 705    if (!rsc->ts_bo)
 706       return false;
 707
 708    for (int level = 0; level <= rsc->base.last_level; level++)
 709       if (rsc->levels[level].ts_valid)
 710          return true;
 711
 712    return false;
 713 }
 714
 715 void
 716 etna_resource_screen_init(struct pipe_screen *pscreen)
 717 {
 718    pscreen->can_create_resource = etna_screen_can_create_resource;
 719    pscreen->resource_create = etna_resource_create;
 720    pscreen->resource_create_with_modifiers = etna_resource_create_modifiers;
 721    pscreen->resource_from_handle = etna_resource_from_handle;
 722    pscreen->resource_get_handle = etna_resource_get_handle;
 723    pscreen->resource_changed = etna_resource_changed;
 724    pscreen->resource_destroy = etna_resource_destroy;
 725 }