src/gallium/drivers/etnaviv/etnaviv_texture_state.c

   1 /*
   2  * Copyright (c) 2012-2015 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  *
  23  * Authors:
  24  *    Wladimir J. van der Laan <laanwj@gmail.com>
  25  */
  26
  27 #include "etnaviv_texture_state.h"
  28
  29 #include "hw/common.xml.h"
  30
  31 #include "etnaviv_clear_blit.h"
  32 #include "etnaviv_context.h"
  33 #include "etnaviv_emit.h"
  34 #include "etnaviv_format.h"
  35 #include "etnaviv_texture.h"
  36 #include "etnaviv_translate.h"
  37 #include "util/u_inlines.h"
  38 #include "util/u_memory.h"
  39
  40 #include "drm-uapi/drm_fourcc.h"
  41
  42 static void *
  43 etna_create_sampler_state_state(struct pipe_context *pipe,
  44                           const struct pipe_sampler_state *ss)
  45 {
  46    struct etna_sampler_state *cs = CALLOC_STRUCT(etna_sampler_state);
  47
  48    if (!cs)
  49       return NULL;
  50
  51    cs->TE_SAMPLER_CONFIG0 =
  52       VIVS_TE_SAMPLER_CONFIG0_UWRAP(translate_texture_wrapmode(ss->wrap_s)) |
  53       VIVS_TE_SAMPLER_CONFIG0_VWRAP(translate_texture_wrapmode(ss->wrap_t)) |
  54       VIVS_TE_SAMPLER_CONFIG0_MIN(translate_texture_filter(ss->min_img_filter)) |
  55       VIVS_TE_SAMPLER_CONFIG0_MIP(translate_texture_mipfilter(ss->min_mip_filter)) |
  56       VIVS_TE_SAMPLER_CONFIG0_MAG(translate_texture_filter(ss->mag_img_filter));
  57
  58    /* ROUND_UV improves precision - but not compatible with NEAREST filter */
  59    if (ss->min_img_filter != PIPE_TEX_FILTER_NEAREST &&
  60        ss->mag_img_filter != PIPE_TEX_FILTER_NEAREST) {
  61       cs->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ROUND_UV;
  62    }
  63
  64    cs->TE_SAMPLER_CONFIG1 =
  65       COND(ss->seamless_cube_map, VIVS_TE_SAMPLER_CONFIG1_SEAMLESS_CUBE_MAP);
  66
  67    cs->TE_SAMPLER_LOD_CONFIG =
  68       COND(ss->lod_bias != 0.0, VIVS_TE_SAMPLER_LOD_CONFIG_BIAS_ENABLE) |
  69       VIVS_TE_SAMPLER_LOD_CONFIG_BIAS(etna_float_to_fixp55(ss->lod_bias));
  70
  71    if (ss->min_mip_filter != PIPE_TEX_MIPFILTER_NONE) {
  72       cs->min_lod = etna_float_to_fixp55(ss->min_lod);
  73       cs->max_lod = etna_float_to_fixp55(ss->max_lod);
  74    } else {
  75       /* when not mipmapping, we need to set max/min lod so that always
  76        * lowest LOD is selected */
  77       cs->min_lod = cs->max_lod = etna_float_to_fixp55(ss->min_lod);
  78    }
  79
  80    return cs;
  81 }
  82
  83 static void
  84 etna_delete_sampler_state_state(struct pipe_context *pctx, void *ss)
  85 {
  86    FREE(ss);
  87 }
  88
  89 static struct pipe_sampler_view *
  90 etna_create_sampler_view_state(struct pipe_context *pctx, struct pipe_resource *prsc,
  91                          const struct pipe_sampler_view *so)
  92 {
  93    struct etna_sampler_view *sv = CALLOC_STRUCT(etna_sampler_view);
  94    struct etna_context *ctx = etna_context(pctx);
  95    const uint32_t format = translate_texture_format(so->format);
  96    const bool ext = !!(format & EXT_FORMAT);
  97    const bool astc = !!(format & ASTC_FORMAT);
  98    const uint32_t swiz = get_texture_swiz(so->format, so->swizzle_r,
  99                                           so->swizzle_g, so->swizzle_b,
 100                                           so->swizzle_a);
 101
 102    if (!sv)
 103       return NULL;
 104
 105    struct etna_resource *res = etna_texture_handle_incompatible(pctx, prsc);
 106    if (!res) {
 107       free(sv);
 108       return NULL;
 109    }
 110
 111    sv->base = *so;
 112    pipe_reference_init(&sv->base.reference, 1);
 113    sv->base.texture = NULL;
 114    pipe_resource_reference(&sv->base.texture, prsc);
 115    sv->base.context = pctx;
 116
 117    /* merged with sampler state */
 118    sv->TE_SAMPLER_CONFIG0 = COND(!ext && !astc, VIVS_TE_SAMPLER_CONFIG0_FORMAT(format));
 119    sv->TE_SAMPLER_CONFIG0_MASK = 0xffffffff;
 120
 121    switch (sv->base.target) {
 122    case PIPE_TEXTURE_1D:
 123       /* For 1D textures, we will have a height of 1, so we can use 2D
 124        * but set T wrap to repeat */
 125       sv->TE_SAMPLER_CONFIG0_MASK = ~VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK;
 126       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_REPEAT);
 127       /* fallthrough */
 128    case PIPE_TEXTURE_2D:
 129    case PIPE_TEXTURE_RECT:
 130       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_2D);
 131       break;
 132    case PIPE_TEXTURE_CUBE:
 133       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_TYPE(TEXTURE_TYPE_CUBE_MAP);
 134       break;
 135    default:
 136       BUG("Unhandled texture target");
 137       free(sv);
 138       return NULL;
 139    }
 140
 141    if (res->addressing_mode == ETNA_ADDRESSING_MODE_LINEAR) {
 142       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_LINEAR);
 143
 144       for (int lod = 0; lod <= res->base.last_level; ++lod)
 145          sv->TE_SAMPLER_LINEAR_STRIDE[lod] = res->levels[lod].stride;
 146
 147    } else {
 148       sv->TE_SAMPLER_CONFIG0 |= VIVS_TE_SAMPLER_CONFIG0_ADDRESSING_MODE(TEXTURE_ADDRESSING_MODE_TILED);
 149       memset(&sv->TE_SAMPLER_LINEAR_STRIDE, 0, sizeof(sv->TE_SAMPLER_LINEAR_STRIDE));
 150    }
 151
 152    sv->TE_SAMPLER_CONFIG1 |= COND(ext, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(format)) |
 153                              COND(astc, VIVS_TE_SAMPLER_CONFIG1_FORMAT_EXT(TEXTURE_FORMAT_EXT_ASTC)) |
 154                              VIVS_TE_SAMPLER_CONFIG1_HALIGN(res->halign) | swiz;
 155    sv->TE_SAMPLER_ASTC0 = COND(astc, VIVS_NTE_SAMPLER_ASTC0_ASTC_FORMAT(format)) |
 156                           VIVS_NTE_SAMPLER_ASTC0_UNK8(0xc) |
 157                           VIVS_NTE_SAMPLER_ASTC0_UNK16(0xc) |
 158                           VIVS_NTE_SAMPLER_ASTC0_UNK24(0xc);
 159    sv->TE_SAMPLER_SIZE = VIVS_TE_SAMPLER_SIZE_WIDTH(res->base.width0) |
 160                          VIVS_TE_SAMPLER_SIZE_HEIGHT(res->base.height0);
 161    sv->TE_SAMPLER_LOG_SIZE =
 162       VIVS_TE_SAMPLER_LOG_SIZE_WIDTH(etna_log2_fixp55(res->base.width0)) |
 163       VIVS_TE_SAMPLER_LOG_SIZE_HEIGHT(etna_log2_fixp55(res->base.height0)) |
 164       COND(util_format_is_srgb(so->format) && !astc, VIVS_TE_SAMPLER_LOG_SIZE_SRGB) |
 165       COND(astc, VIVS_TE_SAMPLER_LOG_SIZE_ASTC);
 166
 167    /* Set up levels-of-detail */
 168    for (int lod = 0; lod <= res->base.last_level; ++lod) {
 169       sv->TE_SAMPLER_LOD_ADDR[lod].bo = res->bo;
 170       sv->TE_SAMPLER_LOD_ADDR[lod].offset = res->levels[lod].offset;
 171       sv->TE_SAMPLER_LOD_ADDR[lod].flags = ETNA_RELOC_READ;
 172    }
 173    sv->min_lod = sv->base.u.tex.first_level << 5;
 174    sv->max_lod = MIN2(sv->base.u.tex.last_level, res->base.last_level) << 5;
 175
 176    /* Workaround for npot textures -- it appears that only CLAMP_TO_EDGE is
 177     * supported when the appropriate capability is not set. */
 178    if (!ctx->specs.npot_tex_any_wrap &&
 179        (!util_is_power_of_two_or_zero(res->base.width0) ||
 180         !util_is_power_of_two_or_zero(res->base.height0))) {
 181       sv->TE_SAMPLER_CONFIG0_MASK = ~(VIVS_TE_SAMPLER_CONFIG0_UWRAP__MASK |
 182                                       VIVS_TE_SAMPLER_CONFIG0_VWRAP__MASK);
 183       sv->TE_SAMPLER_CONFIG0 |=
 184          VIVS_TE_SAMPLER_CONFIG0_UWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE) |
 185          VIVS_TE_SAMPLER_CONFIG0_VWRAP(TEXTURE_WRAPMODE_CLAMP_TO_EDGE);
 186    }
 187
 188    return &sv->base;
 189 }
 190
 191 static void
 192 etna_sampler_view_state_destroy(struct pipe_context *pctx,
 193                           struct pipe_sampler_view *view)
 194 {
 195    pipe_resource_reference(&view->texture, NULL);
 196    FREE(view);
 197 }
 198
 199 #define EMIT_STATE(state_name, src_value) \
 200    etna_coalsence_emit(stream, &coalesce, VIVS_##state_name, src_value)
 201
 202 #define EMIT_STATE_FIXP(state_name, src_value) \
 203    etna_coalsence_emit_fixp(stream, &coalesce, VIVS_##state_name, src_value)
 204
 205 #define EMIT_STATE_RELOC(state_name, src_value) \
 206    etna_coalsence_emit_reloc(stream, &coalesce, VIVS_##state_name, src_value)
 207
 208 /* Emit plain (non-descriptor) texture state */
 209 static void
 210 etna_emit_texture_state(struct etna_context *ctx)
 211 {
 212    struct etna_cmd_stream *stream = ctx->stream;
 213    uint32_t active_samplers = active_samplers_bits(ctx);
 214    uint32_t dirty = ctx->dirty;
 215    struct etna_coalesce coalesce;
 216
 217    etna_coalesce_start(stream, &coalesce);
 218
 219    if (unlikely(dirty & ETNA_DIRTY_SAMPLER_VIEWS)) {
 220       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 221          if ((1 << x) & active_samplers) {
 222             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 223             /*01720*/ EMIT_STATE(TS_SAMPLER_CONFIG(x), sv->ts.TS_SAMPLER_CONFIG);
 224          }
 225       }
 226       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 227          if ((1 << x) & active_samplers) {
 228             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 229             /*01740*/ EMIT_STATE_RELOC(TS_SAMPLER_STATUS_BASE(x), &sv->ts.TS_SAMPLER_STATUS_BASE);
 230          }
 231       }
 232       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 233          if ((1 << x) & active_samplers) {
 234             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 235             /*01760*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE(x), sv->ts.TS_SAMPLER_CLEAR_VALUE);
 236          }
 237       }
 238       for (int x = 0; x < VIVS_TS_SAMPLER__LEN; ++x) {
 239          if ((1 << x) & active_samplers) {
 240             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 241             /*01780*/ EMIT_STATE(TS_SAMPLER_CLEAR_VALUE2(x), sv->ts.TS_SAMPLER_CLEAR_VALUE2);
 242          }
 243       }
 244    }
 245    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 246       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 247          uint32_t val = 0; /* 0 == sampler inactive */
 248
 249          /* set active samplers to their configuration value (determined by both
 250           * the sampler state and sampler view) */
 251          if ((1 << x) & active_samplers) {
 252             struct etna_sampler_state *ss = etna_sampler_state(ctx->sampler[x]);
 253             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 254
 255             val = (ss->TE_SAMPLER_CONFIG0 & sv->TE_SAMPLER_CONFIG0_MASK) |
 256                   sv->TE_SAMPLER_CONFIG0;
 257          }
 258
 259          /*02000*/ EMIT_STATE(TE_SAMPLER_CONFIG0(x), val);
 260       }
 261    }
 262    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 263       struct etna_sampler_view *sv;
 264
 265       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 266          if ((1 << x) & active_samplers) {
 267             sv = etna_sampler_view(ctx->sampler_view[x]);
 268             /*02040*/ EMIT_STATE(TE_SAMPLER_SIZE(x), sv->TE_SAMPLER_SIZE);
 269          }
 270       }
 271       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 272          if ((1 << x) & active_samplers) {
 273             sv = etna_sampler_view(ctx->sampler_view[x]);
 274             /*02080*/ EMIT_STATE(TE_SAMPLER_LOG_SIZE(x), sv->TE_SAMPLER_LOG_SIZE);
 275          }
 276       }
 277    }
 278    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS | ETNA_DIRTY_SAMPLERS))) {
 279       struct etna_sampler_state *ss;
 280       struct etna_sampler_view *sv;
 281
 282       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 283          if ((1 << x) & active_samplers) {
 284             ss = etna_sampler_state(ctx->sampler[x]);
 285             sv = etna_sampler_view(ctx->sampler_view[x]);
 286
 287             /* min and max lod is determined both by the sampler and the view */
 288             /*020C0*/ EMIT_STATE(TE_SAMPLER_LOD_CONFIG(x),
 289                                  ss->TE_SAMPLER_LOD_CONFIG |
 290                                  VIVS_TE_SAMPLER_LOD_CONFIG_MAX(MIN2(ss->max_lod, sv->max_lod)) |
 291                                  VIVS_TE_SAMPLER_LOD_CONFIG_MIN(MAX2(ss->min_lod, sv->min_lod)));
 292          }
 293       }
 294       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 295          if ((1 << x) & active_samplers) {
 296             ss = etna_sampler_state(ctx->sampler[x]);
 297             sv = etna_sampler_view(ctx->sampler_view[x]);
 298
 299             /*021C0*/ EMIT_STATE(TE_SAMPLER_CONFIG1(x), ss->TE_SAMPLER_CONFIG1 |
 300                                                         sv->TE_SAMPLER_CONFIG1 |
 301                                                         COND(sv->ts.enable, VIVS_TE_SAMPLER_CONFIG1_USE_TS));
 302          }
 303       }
 304    }
 305    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 306       for (int y = 0; y < VIVS_TE_SAMPLER_LOD_ADDR__LEN; ++y) {
 307          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 308             if ((1 << x) & active_samplers) {
 309                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 310                /*02400*/ EMIT_STATE_RELOC(TE_SAMPLER_LOD_ADDR(x, y),&sv->TE_SAMPLER_LOD_ADDR[y]);
 311             }
 312          }
 313       }
 314    }
 315    if (unlikely(dirty & (ETNA_DIRTY_SAMPLER_VIEWS))) {
 316       for (int y = 0; y < VIVS_TE_SAMPLER_LINEAR_STRIDE__LEN; ++y) {
 317          for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 318             if ((1 << x) & active_samplers) {
 319                struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 320                /*02C00*/ EMIT_STATE(TE_SAMPLER_LINEAR_STRIDE(x, y), sv->TE_SAMPLER_LINEAR_STRIDE[y]);
 321             }
 322          }
 323       }
 324    }
 325    if (unlikely(ctx->specs.tex_astc && (dirty & (ETNA_DIRTY_SAMPLER_VIEWS)))) {
 326       for (int x = 0; x < VIVS_TE_SAMPLER__LEN; ++x) {
 327          if ((1 << x) & active_samplers) {
 328             struct etna_sampler_view *sv = etna_sampler_view(ctx->sampler_view[x]);
 329             /*10500*/ EMIT_STATE(NTE_SAMPLER_ASTC0(x), sv->TE_SAMPLER_ASTC0);
 330          }
 331       }
 332    }
 333    etna_coalesce_end(stream, &coalesce);
 334 }
 335
 336 #undef EMIT_STATE
 337 #undef EMIT_STATE_FIXP
 338 #undef EMIT_STATE_RELOC
 339
 340 static struct etna_sampler_ts*
 341 etna_ts_for_sampler_view_state(struct pipe_sampler_view *pview)
 342 {
 343    struct etna_sampler_view *sv = etna_sampler_view(pview);
 344    return &sv->ts;
 345 }
 346
 347 void
 348 etna_texture_state_init(struct pipe_context *pctx)
 349 {
 350    struct etna_context *ctx = etna_context(pctx);
 351    DBG("etnaviv: Using state-based texturing");
 352    ctx->base.create_sampler_state = etna_create_sampler_state_state;
 353    ctx->base.delete_sampler_state = etna_delete_sampler_state_state;
 354    ctx->base.create_sampler_view = etna_create_sampler_view_state;
 355    ctx->base.sampler_view_destroy = etna_sampler_view_state_destroy;
 356    ctx->emit_texture_state = etna_emit_texture_state;
 357    ctx->ts_for_sampler_view = etna_ts_for_sampler_view_state;
 358 }