src/gallium/drivers/etnaviv/etnaviv_translate.h

   1 /*
   2  * Copyright (c) 2012-2013 Etnaviv Project
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sub license,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice (including the
  12  * next paragraph) shall be included in all copies or substantial portions
  13  * of the Software.
  14  *
  15  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17  * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  18  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  20  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  21  * DEALINGS IN THE SOFTWARE.
  22  */
  23 /* inlined translation functions between gallium and vivante */
  24 #ifndef H_TRANSLATE
  25 #define H_TRANSLATE
  26
  27 #include "pipe/p_defines.h"
  28 #include "pipe/p_format.h"
  29 #include "pipe/p_state.h"
  30
  31 #include "etnaviv_debug.h"
  32 #include "etnaviv_format.h"
  33 #include "etnaviv_util.h"
  34 #include "hw/cmdstream.xml.h"
  35 #include "hw/common_3d.xml.h"
  36 #include "hw/state.xml.h"
  37 #include "hw/state_3d.xml.h"
  38
  39 #include "util/format/u_format.h"
  40 #include "util/u_math.h"
  41
  42 /* Returned when there is no match of pipe value to etna value */
  43 #define ETNA_NO_MATCH (~0)
  44
  45 static inline uint32_t
  46 translate_cull_face(unsigned cull_face, unsigned front_ccw)
  47 {
  48    switch (cull_face) {
  49    case PIPE_FACE_NONE:
  50       return VIVS_PA_CONFIG_CULL_FACE_MODE_OFF;
  51    case PIPE_FACE_BACK:
  52       return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CW
  53                        : VIVS_PA_CONFIG_CULL_FACE_MODE_CCW;
  54    case PIPE_FACE_FRONT:
  55       return front_ccw ? VIVS_PA_CONFIG_CULL_FACE_MODE_CCW
  56                        : VIVS_PA_CONFIG_CULL_FACE_MODE_CW;
  57    default:
  58       DBG("Unhandled cull face mode %i", cull_face);
  59       return ETNA_NO_MATCH;
  60    }
  61 }
  62
  63 static inline uint32_t
  64 translate_polygon_mode(unsigned polygon_mode)
  65 {
  66    switch (polygon_mode) {
  67    case PIPE_POLYGON_MODE_FILL:
  68       return VIVS_PA_CONFIG_FILL_MODE_SOLID;
  69    case PIPE_POLYGON_MODE_LINE:
  70       return VIVS_PA_CONFIG_FILL_MODE_WIREFRAME;
  71    case PIPE_POLYGON_MODE_POINT:
  72       return VIVS_PA_CONFIG_FILL_MODE_POINT;
  73    default:
  74       DBG("Unhandled polygon mode %i", polygon_mode);
  75       return ETNA_NO_MATCH;
  76    }
  77 }
  78
  79 static inline uint32_t
  80 translate_stencil_mode(bool enable_0, bool enable_1)
  81 {
  82    if (enable_0) {
  83       return enable_1 ? VIVS_PE_STENCIL_CONFIG_MODE_TWO_SIDED
  84                       : VIVS_PE_STENCIL_CONFIG_MODE_ONE_SIDED;
  85    } else {
  86       return VIVS_PE_STENCIL_CONFIG_MODE_DISABLED;
  87    }
  88 }
  89
  90 static inline uint32_t
  91 translate_stencil_op(unsigned stencil_op)
  92 {
  93    switch (stencil_op) {
  94    case PIPE_STENCIL_OP_KEEP:
  95       return STENCIL_OP_KEEP;
  96    case PIPE_STENCIL_OP_ZERO:
  97       return STENCIL_OP_ZERO;
  98    case PIPE_STENCIL_OP_REPLACE:
  99       return STENCIL_OP_REPLACE;
 100    case PIPE_STENCIL_OP_INCR:
 101       return STENCIL_OP_INCR;
 102    case PIPE_STENCIL_OP_DECR:
 103       return STENCIL_OP_DECR;
 104    case PIPE_STENCIL_OP_INCR_WRAP:
 105       return STENCIL_OP_INCR_WRAP;
 106    case PIPE_STENCIL_OP_DECR_WRAP:
 107       return STENCIL_OP_DECR_WRAP;
 108    case PIPE_STENCIL_OP_INVERT:
 109       return STENCIL_OP_INVERT;
 110    default:
 111       DBG("Unhandled stencil op: %i", stencil_op);
 112       return ETNA_NO_MATCH;
 113    }
 114 }
 115
 116 static inline uint32_t
 117 translate_blend(unsigned blend)
 118 {
 119    switch (blend) {
 120    case PIPE_BLEND_ADD:
 121       return BLEND_EQ_ADD;
 122    case PIPE_BLEND_SUBTRACT:
 123       return BLEND_EQ_SUBTRACT;
 124    case PIPE_BLEND_REVERSE_SUBTRACT:
 125       return BLEND_EQ_REVERSE_SUBTRACT;
 126    case PIPE_BLEND_MIN:
 127       return BLEND_EQ_MIN;
 128    case PIPE_BLEND_MAX:
 129       return BLEND_EQ_MAX;
 130    default:
 131       DBG("Unhandled blend: %i", blend);
 132       return ETNA_NO_MATCH;
 133    }
 134 }
 135
 136 static inline uint32_t
 137 translate_blend_factor(unsigned blend_factor)
 138 {
 139    switch (blend_factor) {
 140    case PIPE_BLENDFACTOR_ONE:
 141       return BLEND_FUNC_ONE;
 142    case PIPE_BLENDFACTOR_SRC_COLOR:
 143       return BLEND_FUNC_SRC_COLOR;
 144    case PIPE_BLENDFACTOR_SRC_ALPHA:
 145       return BLEND_FUNC_SRC_ALPHA;
 146    case PIPE_BLENDFACTOR_DST_ALPHA:
 147       return BLEND_FUNC_DST_ALPHA;
 148    case PIPE_BLENDFACTOR_DST_COLOR:
 149       return BLEND_FUNC_DST_COLOR;
 150    case PIPE_BLENDFACTOR_SRC_ALPHA_SATURATE:
 151       return BLEND_FUNC_SRC_ALPHA_SATURATE;
 152    case PIPE_BLENDFACTOR_CONST_COLOR:
 153       return BLEND_FUNC_CONSTANT_COLOR;
 154    case PIPE_BLENDFACTOR_CONST_ALPHA:
 155       return BLEND_FUNC_CONSTANT_ALPHA;
 156    case PIPE_BLENDFACTOR_ZERO:
 157       return BLEND_FUNC_ZERO;
 158    case PIPE_BLENDFACTOR_INV_SRC_COLOR:
 159       return BLEND_FUNC_ONE_MINUS_SRC_COLOR;
 160    case PIPE_BLENDFACTOR_INV_SRC_ALPHA:
 161       return BLEND_FUNC_ONE_MINUS_SRC_ALPHA;
 162    case PIPE_BLENDFACTOR_INV_DST_ALPHA:
 163       return BLEND_FUNC_ONE_MINUS_DST_ALPHA;
 164    case PIPE_BLENDFACTOR_INV_DST_COLOR:
 165       return BLEND_FUNC_ONE_MINUS_DST_COLOR;
 166    case PIPE_BLENDFACTOR_INV_CONST_COLOR:
 167       return BLEND_FUNC_ONE_MINUS_CONSTANT_COLOR;
 168    case PIPE_BLENDFACTOR_INV_CONST_ALPHA:
 169       return BLEND_FUNC_ONE_MINUS_CONSTANT_ALPHA;
 170    case PIPE_BLENDFACTOR_SRC1_COLOR:
 171    case PIPE_BLENDFACTOR_SRC1_ALPHA:
 172    case PIPE_BLENDFACTOR_INV_SRC1_COLOR:
 173    case PIPE_BLENDFACTOR_INV_SRC1_ALPHA:
 174    default:
 175       DBG("Unhandled blend factor: %i", blend_factor);
 176       return ETNA_NO_MATCH;
 177    }
 178 }
 179
 180 static inline uint32_t
 181 translate_texture_wrapmode(unsigned wrap)
 182 {
 183    switch (wrap) {
 184    case PIPE_TEX_WRAP_REPEAT:
 185       return TEXTURE_WRAPMODE_REPEAT;
 186    case PIPE_TEX_WRAP_CLAMP:
 187       return TEXTURE_WRAPMODE_CLAMP_TO_EDGE;
 188    case PIPE_TEX_WRAP_CLAMP_TO_EDGE:
 189       return TEXTURE_WRAPMODE_CLAMP_TO_EDGE;
 190    case PIPE_TEX_WRAP_CLAMP_TO_BORDER:
 191       return TEXTURE_WRAPMODE_CLAMP_TO_EDGE; /* XXX */
 192    case PIPE_TEX_WRAP_MIRROR_REPEAT:
 193       return TEXTURE_WRAPMODE_MIRRORED_REPEAT;
 194    case PIPE_TEX_WRAP_MIRROR_CLAMP:
 195       return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
 196    case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_EDGE:
 197       return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
 198    case PIPE_TEX_WRAP_MIRROR_CLAMP_TO_BORDER:
 199       return TEXTURE_WRAPMODE_MIRRORED_REPEAT; /* XXX */
 200    default:
 201       DBG("Unhandled texture wrapmode: %i", wrap);
 202       return ETNA_NO_MATCH;
 203    }
 204 }
 205
 206 static inline uint32_t
 207 translate_texture_mipfilter(unsigned filter)
 208 {
 209    switch (filter) {
 210    case PIPE_TEX_MIPFILTER_NEAREST:
 211       return TEXTURE_FILTER_NEAREST;
 212    case PIPE_TEX_MIPFILTER_LINEAR:
 213       return TEXTURE_FILTER_LINEAR;
 214    case PIPE_TEX_MIPFILTER_NONE:
 215       return TEXTURE_FILTER_NONE;
 216    default:
 217       DBG("Unhandled texture mipfilter: %i", filter);
 218       return ETNA_NO_MATCH;
 219    }
 220 }
 221
 222 static inline uint32_t
 223 translate_texture_filter(unsigned filter)
 224 {
 225    switch (filter) {
 226    case PIPE_TEX_FILTER_NEAREST:
 227       return TEXTURE_FILTER_NEAREST;
 228    case PIPE_TEX_FILTER_LINEAR:
 229       return TEXTURE_FILTER_LINEAR;
 230    default:
 231       DBG("Unhandled texture filter: %i", filter);
 232       return ETNA_NO_MATCH;
 233    }
 234 }
 235
 236 static inline int
 237 translate_rb_src_dst_swap(enum pipe_format src, enum pipe_format dst)
 238 {
 239    return translate_pe_format_rb_swap(src) ^ translate_pe_format_rb_swap(dst);
 240 }
 241
 242 static inline uint32_t
 243 translate_depth_format(enum pipe_format fmt)
 244 {
 245    /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */
 246    switch (fmt) {
 247    case PIPE_FORMAT_Z16_UNORM:
 248       return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D16;
 249    case PIPE_FORMAT_X8Z24_UNORM:
 250       return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8;
 251    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 252       return VIVS_PE_DEPTH_CONFIG_DEPTH_FORMAT_D24S8;
 253    default:
 254       return ETNA_NO_MATCH;
 255    }
 256 }
 257
 258 /* render target format for MSAA */
 259 static inline uint32_t
 260 translate_ts_format(enum pipe_format fmt)
 261 {
 262    /* Note: Pipe format convention is LSB to MSB, VIVS is MSB to LSB */
 263    switch (fmt) {
 264    case PIPE_FORMAT_B4G4R4X4_UNORM:
 265    case PIPE_FORMAT_B4G4R4A4_UNORM:
 266       return COMPRESSION_FORMAT_A4R4G4B4;
 267    case PIPE_FORMAT_B5G5R5X1_UNORM:
 268       return COMPRESSION_FORMAT_A1R5G5B5;
 269    case PIPE_FORMAT_B5G5R5A1_UNORM:
 270       return COMPRESSION_FORMAT_A1R5G5B5;
 271    case PIPE_FORMAT_B5G6R5_UNORM:
 272       return COMPRESSION_FORMAT_R5G6B5;
 273    case PIPE_FORMAT_B8G8R8X8_UNORM:
 274    case PIPE_FORMAT_B8G8R8X8_SRGB:
 275    case PIPE_FORMAT_R8G8B8X8_UNORM:
 276       return COMPRESSION_FORMAT_X8R8G8B8;
 277    case PIPE_FORMAT_B8G8R8A8_UNORM:
 278    case PIPE_FORMAT_B8G8R8A8_SRGB:
 279    case PIPE_FORMAT_R8G8B8A8_UNORM:
 280       return COMPRESSION_FORMAT_A8R8G8B8;
 281    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 282       return COMPRESSION_FORMAT_D24S8;
 283    case PIPE_FORMAT_X8Z24_UNORM:
 284       return COMPRESSION_FORMAT_D24X8;
 285    case PIPE_FORMAT_Z16_UNORM:
 286       return COMPRESSION_FORMAT_D16;
 287    /* MSAA with YUYV not supported */
 288    default:
 289       return ETNA_NO_MATCH;
 290    }
 291 }
 292
 293 /* Return normalization flag for vertex element format */
 294 static inline uint32_t
 295 translate_vertex_format_normalize(enum pipe_format fmt)
 296 {
 297    const struct util_format_description *desc = util_format_description(fmt);
 298    if (!desc)
 299       return VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF;
 300
 301    /* assumes that normalization of channel 0 holds for all channels;
 302     * this holds for all vertex formats that we support */
 303    return desc->channel[0].normalized
 304              ? VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_SIGN_EXTEND
 305              : VIVS_FE_VERTEX_ELEMENT_CONFIG_NORMALIZE_OFF;
 306 }
 307
 308 static inline uint32_t
 309 translate_output_mode(enum pipe_format fmt, bool halti5)
 310 {
 311    const unsigned bits =
 312       util_format_get_component_bits(fmt, UTIL_FORMAT_COLORSPACE_RGB, 0);
 313
 314    if (bits == 32)
 315       return COLOR_OUTPUT_MODE_UIF32;
 316
 317    if (!util_format_is_pure_integer(fmt))
 318       return COLOR_OUTPUT_MODE_NORMAL;
 319
 320    /* generic integer output mode pre-halti5 (?) */
 321    if (bits == 10 || !halti5)
 322       return COLOR_OUTPUT_MODE_A2B10G10R10UI;
 323
 324    if (util_format_is_pure_sint(fmt))
 325       return bits == 8 ? COLOR_OUTPUT_MODE_I8 : COLOR_OUTPUT_MODE_I16;
 326
 327    return bits == 8 ? COLOR_OUTPUT_MODE_U8 : COLOR_OUTPUT_MODE_U16;
 328 }
 329
 330 static inline uint32_t
 331 translate_index_size(unsigned index_size)
 332 {
 333    switch (index_size) {
 334    case 1:
 335       return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_CHAR;
 336    case 2:
 337       return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_SHORT;
 338    case 4:
 339       return VIVS_FE_INDEX_STREAM_CONTROL_TYPE_UNSIGNED_INT;
 340    default:
 341       DBG("Unhandled index size %i", index_size);
 342       return ETNA_NO_MATCH;
 343    }
 344 }
 345
 346 static inline uint32_t
 347 translate_draw_mode(unsigned mode)
 348 {
 349    switch (mode) {
 350    case PIPE_PRIM_POINTS:
 351       return PRIMITIVE_TYPE_POINTS;
 352    case PIPE_PRIM_LINES:
 353       return PRIMITIVE_TYPE_LINES;
 354    case PIPE_PRIM_LINE_LOOP:
 355       return PRIMITIVE_TYPE_LINE_LOOP;
 356    case PIPE_PRIM_LINE_STRIP:
 357       return PRIMITIVE_TYPE_LINE_STRIP;
 358    case PIPE_PRIM_TRIANGLES:
 359       return PRIMITIVE_TYPE_TRIANGLES;
 360    case PIPE_PRIM_TRIANGLE_STRIP:
 361       return PRIMITIVE_TYPE_TRIANGLE_STRIP;
 362    case PIPE_PRIM_TRIANGLE_FAN:
 363       return PRIMITIVE_TYPE_TRIANGLE_FAN;
 364    case PIPE_PRIM_QUADS:
 365       return PRIMITIVE_TYPE_QUADS;
 366    default:
 367       DBG("Unhandled draw mode primitive %i", mode);
 368       return ETNA_NO_MATCH;
 369    }
 370 }
 371
 372 /* Get size multiple for size of texture/rendertarget with a certain layout
 373  * This is affected by many different parameters:
 374  *   - A horizontal multiple of 16 is used when possible as resolve can be used
 375  *       at the cost of only a little bit extra memory usage.
 376  *   - If the surface is to be used with the resolve engine, set rs_align true.
 377  *       If set, a horizontal multiple of 16 will be used for tiled and linear,
 378  *       otherwise one of 16.  However, such a surface will be incompatible
 379  *       with the samplers if the GPU does hot support the HALIGN feature.
 380  *   - If the surface is supertiled, horizontal and vertical multiple is always 64
 381  *   - If the surface is multi tiled or supertiled, make sure that the vertical size
 382  *     is a multiple of the number of pixel pipes as well.
 383  * */
 384 static inline void
 385 etna_layout_multiple(unsigned layout, unsigned pixel_pipes, bool rs_align,
 386                      unsigned *paddingX, unsigned *paddingY, unsigned *halign)
 387 {
 388    switch (layout) {
 389    case ETNA_LAYOUT_LINEAR:
 390       *paddingX = rs_align ? 16 : 4;
 391       *paddingY = 1;
 392       *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
 393       break;
 394    case ETNA_LAYOUT_TILED:
 395       *paddingX = rs_align ? 16 : 4;
 396       *paddingY = 4;
 397       *halign = rs_align ? TEXTURE_HALIGN_SIXTEEN : TEXTURE_HALIGN_FOUR;
 398       break;
 399    case ETNA_LAYOUT_SUPER_TILED:
 400       *paddingX = 64;
 401       *paddingY = 64;
 402       *halign = TEXTURE_HALIGN_SUPER_TILED;
 403       break;
 404    case ETNA_LAYOUT_MULTI_TILED:
 405       *paddingX = 16;
 406       *paddingY = 4 * pixel_pipes;
 407       *halign = TEXTURE_HALIGN_SPLIT_TILED;
 408       break;
 409    case ETNA_LAYOUT_MULTI_SUPERTILED:
 410       *paddingX = 64;
 411       *paddingY = 64 * pixel_pipes;
 412       *halign = TEXTURE_HALIGN_SPLIT_SUPER_TILED;
 413       break;
 414    default:
 415       DBG("Unhandled layout %i", layout);
 416    }
 417 }
 418
 419 static inline uint32_t
 420 translate_clear_depth_stencil(enum pipe_format format, float depth,
 421                               unsigned stencil)
 422 {
 423    uint32_t clear_value = 0;
 424
 425    // XXX util_pack_color
 426    switch (format) {
 427    case PIPE_FORMAT_Z16_UNORM:
 428       clear_value = etna_cfloat_to_uintN(depth, 16);
 429       clear_value |= clear_value << 16;
 430       break;
 431    case PIPE_FORMAT_X8Z24_UNORM:
 432    case PIPE_FORMAT_S8_UINT_Z24_UNORM:
 433       clear_value = (etna_cfloat_to_uintN(depth, 24) << 8) | (stencil & 0xFF);
 434       break;
 435    default:
 436       DBG("Unhandled pipe format for depth stencil clear: %i", format);
 437    }
 438    return clear_value;
 439 }
 440
 441 /* Convert MSAA number of samples to x and y scaling factor.
 442  * Return true if supported and false otherwise. */
 443 static inline bool
 444 translate_samples_to_xyscale(int num_samples, int *xscale_out, int *yscale_out)
 445 {
 446    int xscale, yscale;
 447
 448    switch (num_samples) {
 449    case 0:
 450    case 1:
 451       xscale = 1;
 452       yscale = 1;
 453       break;
 454    case 2:
 455       xscale = 2;
 456       yscale = 1;
 457       break;
 458    case 4:
 459       xscale = 2;
 460       yscale = 2;
 461       break;
 462    default:
 463       return false;
 464    }
 465
 466    if (xscale_out)
 467       *xscale_out = xscale;
 468    if (yscale_out)
 469       *yscale_out = yscale;
 470
 471    return true;
 472 }
 473
 474 static inline uint32_t
 475 translate_texture_target(unsigned target)
 476 {
 477    switch (target) {
 478    case PIPE_TEXTURE_1D:
 479       return TEXTURE_TYPE_1D;
 480    case PIPE_TEXTURE_2D:
 481    case PIPE_TEXTURE_RECT:
 482    case PIPE_TEXTURE_1D_ARRAY:
 483       return TEXTURE_TYPE_2D;
 484    case PIPE_TEXTURE_CUBE:
 485       return TEXTURE_TYPE_CUBE_MAP;
 486    case PIPE_TEXTURE_3D:
 487    case PIPE_TEXTURE_2D_ARRAY:
 488       return TEXTURE_TYPE_3D;
 489    default:
 490       DBG("Unhandled texture target: %i", target);
 491       return ETNA_NO_MATCH;
 492    }
 493 }
 494
 495 static inline uint32_t
 496 translate_texture_compare(enum pipe_compare_func compare_func)
 497 {
 498    switch (compare_func) {
 499    case PIPE_FUNC_NEVER:
 500       return TEXTURE_COMPARE_FUNC_NEVER;
 501    case PIPE_FUNC_LESS:
 502       return TEXTURE_COMPARE_FUNC_LESS;
 503    case PIPE_FUNC_EQUAL:
 504       return TEXTURE_COMPARE_FUNC_EQUAL;
 505    case PIPE_FUNC_LEQUAL:
 506       return TEXTURE_COMPARE_FUNC_LEQUAL;
 507    case PIPE_FUNC_GREATER:
 508       return TEXTURE_COMPARE_FUNC_GREATER;
 509    case PIPE_FUNC_NOTEQUAL:
 510       return TEXTURE_COMPARE_FUNC_NOTEQUAL;
 511    case PIPE_FUNC_GEQUAL:
 512       return TEXTURE_COMPARE_FUNC_GEQUAL;
 513    case PIPE_FUNC_ALWAYS:
 514       return TEXTURE_COMPARE_FUNC_ALWAYS;
 515    default:
 516       unreachable("Invalid compare func");
 517    }
 518 }
 519
 520 #endif