2 * Copyright (c) 2012 Rob Clark <robdclark@gmail.com>
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice (including the next
12 * paragraph) shall be included in all copies or substantial portions of the
15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
28 #include <sys/types.h>
34 #include "instr-a2xx.h"
36 static const char *levels
[] = {
54 static enum debug_t debug
;
60 static const char chan_names
[] = {
62 /* these only apply to FETCH dst's: */
66 static void print_srcreg(uint32_t num
, uint32_t type
,
67 uint32_t swiz
, uint32_t negate
, uint32_t abs
)
73 printf("%c%u", type
? 'R' : 'C', num
);
77 for (i
= 0; i
< 4; i
++) {
78 printf("%c", chan_names
[(swiz
+ i
) & 0x3]);
86 static void print_dstreg(uint32_t num
, uint32_t mask
, uint32_t dst_exp
)
88 printf("%s%u", dst_exp
? "export" : "R", num
);
92 for (i
= 0; i
< 4; i
++) {
93 printf("%c", (mask
& 0x1) ? chan_names
[i
] : '_');
99 static void print_export_comment(uint32_t num
, enum shader_t type
)
101 const char *name
= NULL
;
105 case 62: name
= "gl_Position"; break;
106 case 63: name
= "gl_PointSize"; break;
109 case SHADER_FRAGMENT
:
111 case 0: name
= "gl_FragColor"; break;
115 /* if we had a symbol table here, we could look
116 * up the name of the varying..
119 printf("\t; %s", name
);
126 } vector_instructions
[0x20] = {
127 #define INSTR(opc, num_srcs) [opc] = { num_srcs, #opc }
145 INSTR(DOT2ADDv
, 3), // ???
148 INSTR(PRED_SETE_PUSHv
, 2),
149 INSTR(PRED_SETNE_PUSHv
, 2),
150 INSTR(PRED_SETGT_PUSHv
, 2),
151 INSTR(PRED_SETGTE_PUSHv
, 2),
158 }, scalar_instructions
[0x40] = {
163 INSTR(MUL_PREV2s
, 1),
176 INSTR(RECIP_CLAMP
, 1),
178 INSTR(RECIP_IEEE
, 1),
179 INSTR(RECIPSQ_CLAMP
, 1),
180 INSTR(RECIPSQ_FF
, 1),
181 INSTR(RECIPSQ_IEEE
, 1),
183 INSTR(MOVA_FLOORs
, 1),
186 INSTR(PRED_SETEs
, 1),
187 INSTR(PRED_SETNEs
, 1),
188 INSTR(PRED_SETGTs
, 1),
189 INSTR(PRED_SETGTEs
, 1),
190 INSTR(PRED_SET_INVs
, 1),
191 INSTR(PRED_SET_POPs
, 1),
192 INSTR(PRED_SET_CLRs
, 1),
193 INSTR(PRED_SET_RESTOREs
, 1),
200 INSTR(MUL_CONST_0
, 1),
201 INSTR(MUL_CONST_1
, 1),
202 INSTR(ADD_CONST_0
, 1),
203 INSTR(ADD_CONST_1
, 1),
204 INSTR(SUB_CONST_0
, 1),
205 INSTR(SUB_CONST_1
, 1),
208 INSTR(RETAIN_PREV
, 1),
212 static int disasm_alu(uint32_t *dwords
, uint32_t alu_off
,
213 int level
, int sync
, enum shader_t type
)
215 instr_alu_t
*alu
= (instr_alu_t
*)dwords
;
217 printf("%s", levels
[level
]);
218 if (debug
& PRINT_RAW
) {
219 printf("%02x: %08x %08x %08x\t", alu_off
,
220 dwords
[0], dwords
[1], dwords
[2]);
223 printf(" %sALU:\t", sync
? "(S)" : " ");
225 printf("%s", vector_instructions
[alu
->vector_opc
].name
);
227 if (alu
->pred_select
& 0x2) {
228 /* seems to work similar to conditional execution in ARM instruction
229 * set, so let's use a similar syntax for now:
231 printf((alu
->pred_select
& 0x1) ? "EQ" : "NE");
236 print_dstreg(alu
->vector_dest
, alu
->vector_write_mask
, alu
->export_data
);
238 if (vector_instructions
[alu
->vector_opc
].num_srcs
== 3) {
239 print_srcreg(alu
->src3_reg
, alu
->src3_sel
, alu
->src3_swiz
,
240 alu
->src3_reg_negate
, alu
->src3_reg_abs
);
243 print_srcreg(alu
->src1_reg
, alu
->src1_sel
, alu
->src1_swiz
,
244 alu
->src1_reg_negate
, alu
->src1_reg_abs
);
245 if (vector_instructions
[alu
->vector_opc
].num_srcs
> 1) {
247 print_srcreg(alu
->src2_reg
, alu
->src2_sel
, alu
->src2_swiz
,
248 alu
->src2_reg_negate
, alu
->src2_reg_abs
);
251 if (alu
->vector_clamp
)
254 if (alu
->export_data
)
255 print_export_comment(alu
->vector_dest
, type
);
259 if (alu
->scalar_write_mask
|| !alu
->vector_write_mask
) {
260 /* 2nd optional scalar op: */
262 printf("%s", levels
[level
]);
263 if (debug
& PRINT_RAW
)
266 if (scalar_instructions
[alu
->scalar_opc
].name
) {
267 printf("\t \t%s\t", scalar_instructions
[alu
->scalar_opc
].name
);
269 printf("\t \tOP(%u)\t", alu
->scalar_opc
);
272 print_dstreg(alu
->scalar_dest
, alu
->scalar_write_mask
, alu
->export_data
);
274 print_srcreg(alu
->src3_reg
, alu
->src3_sel
, alu
->src3_swiz
,
275 alu
->src3_reg_negate
, alu
->src3_reg_abs
);
276 // TODO ADD/MUL must have another src?!?
277 if (alu
->scalar_clamp
)
279 if (alu
->export_data
)
280 print_export_comment(alu
->scalar_dest
, type
);
289 * FETCH instructions:
294 } fetch_types
[0xff] = {
295 #define TYPE(id) [id] = { #id }
298 TYPE(FMT_32_32_FLOAT
),
299 TYPE(FMT_32_32_32_FLOAT
),
300 TYPE(FMT_32_32_32_32_FLOAT
),
303 TYPE(FMT_16_16_16_16
),
309 TYPE(FMT_32_32_32_32
),
313 static void print_fetch_dst(uint32_t dst_reg
, uint32_t dst_swiz
)
316 printf("\tR%u.", dst_reg
);
317 for (i
= 0; i
< 4; i
++) {
318 printf("%c", chan_names
[dst_swiz
& 0x7]);
323 static void print_fetch_vtx(instr_fetch_t
*fetch
)
325 instr_fetch_vtx_t
*vtx
= &fetch
->vtx
;
327 if (vtx
->pred_select
) {
328 /* seems to work similar to conditional execution in ARM instruction
329 * set, so let's use a similar syntax for now:
331 printf(vtx
->pred_condition
? "EQ" : "NE");
334 print_fetch_dst(vtx
->dst_reg
, vtx
->dst_swiz
);
335 printf(" = R%u.", vtx
->src_reg
);
336 printf("%c", chan_names
[vtx
->src_swiz
& 0x3]);
337 if (fetch_types
[vtx
->format
].name
) {
338 printf(" %s", fetch_types
[vtx
->format
].name
);
340 printf(" TYPE(0x%x)", vtx
->format
);
342 printf(" %s", vtx
->format_comp_all
? "SIGNED" : "UNSIGNED");
343 if (!vtx
->num_format_all
)
344 printf(" NORMALIZED");
345 printf(" STRIDE(%u)", vtx
->stride
);
347 printf(" OFFSET(%u)", vtx
->offset
);
348 printf(" CONST(%u, %u)", vtx
->const_index
, vtx
->const_index_sel
);
351 printf(" src_reg_am=%u", vtx
->src_reg_am
);
352 printf(" dst_reg_am=%u", vtx
->dst_reg_am
);
353 printf(" num_format_all=%u", vtx
->num_format_all
);
354 printf(" signed_rf_mode_all=%u", vtx
->signed_rf_mode_all
);
355 printf(" exp_adjust_all=%u", vtx
->exp_adjust_all
);
359 static void print_fetch_tex(instr_fetch_t
*fetch
)
361 static const char *filter
[] = {
362 [TEX_FILTER_POINT
] = "POINT",
363 [TEX_FILTER_LINEAR
] = "LINEAR",
364 [TEX_FILTER_BASEMAP
] = "BASEMAP",
366 static const char *aniso_filter
[] = {
367 [ANISO_FILTER_DISABLED
] = "DISABLED",
368 [ANISO_FILTER_MAX_1_1
] = "MAX_1_1",
369 [ANISO_FILTER_MAX_2_1
] = "MAX_2_1",
370 [ANISO_FILTER_MAX_4_1
] = "MAX_4_1",
371 [ANISO_FILTER_MAX_8_1
] = "MAX_8_1",
372 [ANISO_FILTER_MAX_16_1
] = "MAX_16_1",
374 static const char *arbitrary_filter
[] = {
375 [ARBITRARY_FILTER_2X4_SYM
] = "2x4_SYM",
376 [ARBITRARY_FILTER_2X4_ASYM
] = "2x4_ASYM",
377 [ARBITRARY_FILTER_4X2_SYM
] = "4x2_SYM",
378 [ARBITRARY_FILTER_4X2_ASYM
] = "4x2_ASYM",
379 [ARBITRARY_FILTER_4X4_SYM
] = "4x4_SYM",
380 [ARBITRARY_FILTER_4X4_ASYM
] = "4x4_ASYM",
382 static const char *sample_loc
[] = {
383 [SAMPLE_CENTROID
] = "CENTROID",
384 [SAMPLE_CENTER
] = "CENTER",
386 instr_fetch_tex_t
*tex
= &fetch
->tex
;
387 uint32_t src_swiz
= tex
->src_swiz
;
390 if (tex
->pred_select
) {
391 /* seems to work similar to conditional execution in ARM instruction
392 * set, so let's use a similar syntax for now:
394 printf(tex
->pred_condition
? "EQ" : "NE");
397 print_fetch_dst(tex
->dst_reg
, tex
->dst_swiz
);
398 printf(" = R%u.", tex
->src_reg
);
399 for (i
= 0; i
< 3; i
++) {
400 printf("%c", chan_names
[src_swiz
& 0x3]);
403 printf(" CONST(%u)", tex
->const_idx
);
404 if (tex
->fetch_valid_only
)
405 printf(" VALID_ONLY");
406 if (tex
->tx_coord_denorm
)
408 if (tex
->mag_filter
!= TEX_FILTER_USE_FETCH_CONST
)
409 printf(" MAG(%s)", filter
[tex
->mag_filter
]);
410 if (tex
->min_filter
!= TEX_FILTER_USE_FETCH_CONST
)
411 printf(" MIN(%s)", filter
[tex
->min_filter
]);
412 if (tex
->mip_filter
!= TEX_FILTER_USE_FETCH_CONST
)
413 printf(" MIP(%s)", filter
[tex
->mip_filter
]);
414 if (tex
->aniso_filter
!= ANISO_FILTER_USE_FETCH_CONST
)
415 printf(" ANISO(%s)", aniso_filter
[tex
->aniso_filter
]);
416 if (tex
->arbitrary_filter
!= ARBITRARY_FILTER_USE_FETCH_CONST
)
417 printf(" ARBITRARY(%s)", arbitrary_filter
[tex
->arbitrary_filter
]);
418 if (tex
->vol_mag_filter
!= TEX_FILTER_USE_FETCH_CONST
)
419 printf(" VOL_MAG(%s)", filter
[tex
->vol_mag_filter
]);
420 if (tex
->vol_min_filter
!= TEX_FILTER_USE_FETCH_CONST
)
421 printf(" VOL_MIN(%s)", filter
[tex
->vol_min_filter
]);
422 if (!tex
->use_comp_lod
) {
423 printf(" LOD(%u)", tex
->use_comp_lod
);
424 printf(" LOD_BIAS(%u)", tex
->lod_bias
);
426 if (tex
->use_reg_gradients
)
427 printf(" USE_REG_GRADIENTS");
428 printf(" LOCATION(%s)", sample_loc
[tex
->sample_location
]);
429 if (tex
->offset_x
|| tex
->offset_y
|| tex
->offset_z
)
430 printf(" OFFSET(%u,%u,%u)", tex
->offset_x
, tex
->offset_y
, tex
->offset_z
);
435 void (*fxn
)(instr_fetch_t
*cf
);
436 } fetch_instructions
[] = {
437 #define INSTR(opc, name, fxn) [opc] = { name, fxn }
438 INSTR(VTX_FETCH
, "VERTEX", print_fetch_vtx
),
439 INSTR(TEX_FETCH
, "SAMPLE", print_fetch_tex
),
440 INSTR(TEX_GET_BORDER_COLOR_FRAC
, "?", print_fetch_tex
),
441 INSTR(TEX_GET_COMP_TEX_LOD
, "?", print_fetch_tex
),
442 INSTR(TEX_GET_GRADIENTS
, "?", print_fetch_tex
),
443 INSTR(TEX_GET_WEIGHTS
, "?", print_fetch_tex
),
444 INSTR(TEX_SET_TEX_LOD
, "SET_TEX_LOD", print_fetch_tex
),
445 INSTR(TEX_SET_GRADIENTS_H
, "?", print_fetch_tex
),
446 INSTR(TEX_SET_GRADIENTS_V
, "?", print_fetch_tex
),
447 INSTR(TEX_RESERVED_4
, "?", print_fetch_tex
),
451 static int disasm_fetch(uint32_t *dwords
, uint32_t alu_off
, int level
, int sync
)
453 instr_fetch_t
*fetch
= (instr_fetch_t
*)dwords
;
455 printf("%s", levels
[level
]);
456 if (debug
& PRINT_RAW
) {
457 printf("%02x: %08x %08x %08x\t", alu_off
,
458 dwords
[0], dwords
[1], dwords
[2]);
461 printf(" %sFETCH:\t", sync
? "(S)" : " ");
462 printf("%s", fetch_instructions
[fetch
->opc
].name
);
463 fetch_instructions
[fetch
->opc
].fxn(fetch
);
473 static int cf_exec(instr_cf_t
*cf
)
475 return (cf
->opc
== EXEC
) ||
476 (cf
->opc
== EXEC_END
) ||
477 (cf
->opc
== COND_EXEC
) ||
478 (cf
->opc
== COND_EXEC_END
) ||
479 (cf
->opc
== COND_PRED_EXEC
) ||
480 (cf
->opc
== COND_PRED_EXEC_END
) ||
481 (cf
->opc
== COND_EXEC_PRED_CLEAN
) ||
482 (cf
->opc
== COND_EXEC_PRED_CLEAN_END
);
485 static int cf_cond_exec(instr_cf_t
*cf
)
487 return (cf
->opc
== COND_EXEC
) ||
488 (cf
->opc
== COND_EXEC_END
) ||
489 (cf
->opc
== COND_PRED_EXEC
) ||
490 (cf
->opc
== COND_PRED_EXEC_END
) ||
491 (cf
->opc
== COND_EXEC_PRED_CLEAN
) ||
492 (cf
->opc
== COND_EXEC_PRED_CLEAN_END
);
495 static void print_cf_nop(instr_cf_t
*cf
)
499 static void print_cf_exec(instr_cf_t
*cf
)
501 printf(" ADDR(0x%x) CNT(0x%x)", cf
->exec
.address
, cf
->exec
.count
);
505 printf(" VC(0x%x)", cf
->exec
.vc
);
506 if (cf
->exec
.bool_addr
)
507 printf(" BOOL_ADDR(0x%x)", cf
->exec
.bool_addr
);
508 if (cf
->exec
.address_mode
== ABSOLUTE_ADDR
)
509 printf(" ABSOLUTE_ADDR");
510 if (cf_cond_exec(cf
))
511 printf(" COND(%d)", cf
->exec
.condition
);
514 static void print_cf_loop(instr_cf_t
*cf
)
516 printf(" ADDR(0x%x) LOOP_ID(%d)", cf
->loop
.address
, cf
->loop
.loop_id
);
517 if (cf
->loop
.address_mode
== ABSOLUTE_ADDR
)
518 printf(" ABSOLUTE_ADDR");
521 static void print_cf_jmp_call(instr_cf_t
*cf
)
523 printf(" ADDR(0x%x) DIR(%d)", cf
->jmp_call
.address
, cf
->jmp_call
.direction
);
524 if (cf
->jmp_call
.force_call
)
525 printf(" FORCE_CALL");
526 if (cf
->jmp_call
.predicated_jmp
)
527 printf(" COND(%d)", cf
->jmp_call
.condition
);
528 if (cf
->jmp_call
.bool_addr
)
529 printf(" BOOL_ADDR(0x%x)", cf
->jmp_call
.bool_addr
);
530 if (cf
->jmp_call
.address_mode
== ABSOLUTE_ADDR
)
531 printf(" ABSOLUTE_ADDR");
534 static void print_cf_alloc(instr_cf_t
*cf
)
536 static const char *bufname
[] = {
537 [SQ_NO_ALLOC
] = "NO ALLOC",
538 [SQ_POSITION
] = "POSITION",
539 [SQ_PARAMETER_PIXEL
] = "PARAM/PIXEL",
540 [SQ_MEMORY
] = "MEMORY",
542 printf(" %s SIZE(0x%x)", bufname
[cf
->alloc
.buffer_select
], cf
->alloc
.size
);
543 if (cf
->alloc
.no_serial
)
544 printf(" NO_SERIAL");
545 if (cf
->alloc
.alloc_mode
) // ???
546 printf(" ALLOC_MODE");
551 void (*fxn
)(instr_cf_t
*cf
);
552 } cf_instructions
[] = {
553 #define INSTR(opc, fxn) [opc] = { #opc, fxn }
554 INSTR(NOP
, print_cf_nop
),
555 INSTR(EXEC
, print_cf_exec
),
556 INSTR(EXEC_END
, print_cf_exec
),
557 INSTR(COND_EXEC
, print_cf_exec
),
558 INSTR(COND_EXEC_END
, print_cf_exec
),
559 INSTR(COND_PRED_EXEC
, print_cf_exec
),
560 INSTR(COND_PRED_EXEC_END
, print_cf_exec
),
561 INSTR(LOOP_START
, print_cf_loop
),
562 INSTR(LOOP_END
, print_cf_loop
),
563 INSTR(COND_CALL
, print_cf_jmp_call
),
564 INSTR(RETURN
, print_cf_jmp_call
),
565 INSTR(COND_JMP
, print_cf_jmp_call
),
566 INSTR(ALLOC
, print_cf_alloc
),
567 INSTR(COND_EXEC_PRED_CLEAN
, print_cf_exec
),
568 INSTR(COND_EXEC_PRED_CLEAN_END
, print_cf_exec
),
569 INSTR(MARK_VS_FETCH_DONE
, print_cf_nop
), // ??
573 static void print_cf(instr_cf_t
*cf
, int level
)
575 printf("%s", levels
[level
]);
576 if (debug
& PRINT_RAW
) {
577 uint16_t *words
= (uint16_t *)cf
;
578 printf(" %04x %04x %04x \t",
579 words
[0], words
[1], words
[2]);
581 printf("%s", cf_instructions
[cf
->opc
].name
);
582 cf_instructions
[cf
->opc
].fxn(cf
);
587 * The adreno shader microcode consists of two parts:
588 * 1) A CF (control-flow) program, at the header of the compiled shader,
589 * which refers to ALU/FETCH instructions that follow it by address.
590 * 2) ALU and FETCH instructions
593 int disasm_a2xx(uint32_t *dwords
, int sizedwords
, int level
, enum shader_t type
)
595 instr_cf_t
*cfs
= (instr_cf_t
*)dwords
;
598 for (idx
= 0; ; idx
++) {
599 instr_cf_t
*cf
= &cfs
[idx
];
601 max_idx
= 2 * cf
->exec
.address
;
606 for (idx
= 0; idx
< max_idx
; idx
++) {
607 instr_cf_t
*cf
= &cfs
[idx
];
612 uint32_t sequence
= cf
->exec
.serialize
;
614 for (i
= 0; i
< cf
->exec
.count
; i
++) {
615 uint32_t alu_off
= (cf
->exec
.address
+ i
);
616 if (sequence
& 0x1) {
617 disasm_fetch(dwords
+ alu_off
* 3, alu_off
, level
, sequence
& 0x2);
619 disasm_alu(dwords
+ alu_off
* 3, alu_off
, level
, sequence
& 0x2, type
);
629 void disasm_set_debug(enum debug_t d
)