src/gallium/drivers/freedreno/a3xx/fd3_program.h

   1 /* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
   2
   3 /*
   4  * Copyright (C) 2013 Rob Clark <robclark@freedesktop.org>
   5  *
   6  * Permission is hereby granted, free of charge, to any person obtaining a
   7  * copy of this software and associated documentation files (the "Software"),
   8  * to deal in the Software without restriction, including without limitation
   9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  10  * and/or sell copies of the Software, and to permit persons to whom the
  11  * Software is furnished to do so, subject to the following conditions:
  12  *
  13  * The above copyright notice and this permission notice (including the next
  14  * paragraph) shall be included in all copies or substantial portions of the
  15  * Software.
  16  *
  17  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  20  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  23  * SOFTWARE.
  24  *
  25  * Authors:
  26  *    Rob Clark <robclark@freedesktop.org>
  27  */
  28
  29 #ifndef FD3_PROGRAM_H_
  30 #define FD3_PROGRAM_H_
  31
  32 #include "pipe/p_context.h"
  33
  34 #include "freedreno_context.h"
  35
  36 #include "ir3.h"
  37 #include "disasm.h"
  38
  39 typedef uint16_t fd3_semantic;  /* semantic name + index */
  40 static inline fd3_semantic
  41 fd3_semantic_name(uint8_t name, uint16_t index)
  42 {
  43         return (name << 8) | (index & 0xff);
  44 }
  45
  46 static inline uint8_t sem2name(fd3_semantic sem)
  47 {
  48         return sem >> 8;
  49 }
  50
  51 static inline uint16_t sem2idx(fd3_semantic sem)
  52 {
  53         return sem & 0xff;
  54 }
  55
  56 struct fd3_shader_stateobj {
  57         enum shader_t type;
  58
  59         struct fd_bo *bo;
  60
  61         struct ir3_shader_info info;
  62         struct ir3_shader *ir;
  63
  64         /* is shader using (or more precisely, is color_regid) half-
  65          * precision register?
  66          */
  67         bool half_precision;
  68
  69         /* the instructions length is in units of instruction groups
  70          * (4 instructions, 8 dwords):
  71          */
  72         unsigned instrlen;
  73
  74         /* the constants length is in units of vec4's, and is the sum of
  75          * the uniforms and the built-in compiler constants
  76          */
  77         unsigned constlen;
  78
  79         /* About Linkage:
  80          *   + Let the frag shader determine the position/compmask for the
  81          *     varyings, since it is the place where we know if the varying
  82          *     is actually used, and if so, which components are used.  So
  83          *     what the hw calls "outloc" is taken from the "inloc" of the
  84          *     frag shader.
  85          *   + From the vert shader, we only need the output regid
  86          */
  87
  88         /* varyings/outputs: */
  89         unsigned outputs_count;
  90         struct {
  91                 fd3_semantic semantic;
  92                 uint8_t regid;
  93         } outputs[16];
  94         bool writes_pos;
  95
  96         /* vertices/inputs: */
  97         unsigned inputs_count;
  98         struct {
  99                 fd3_semantic semantic;
 100                 uint8_t regid;
 101                 uint8_t compmask;
 102                 /* in theory inloc of fs should match outloc of vs: */
 103                 uint8_t inloc;
 104         } inputs[16];
 105
 106         unsigned total_in;       /* sum of inputs (scalar) */
 107
 108         /* samplers: */
 109         unsigned samplers_count;
 110
 111         /* const reg # of first immediate, ie. 1 == c1
 112          * (not regid, because TGSI thinks in terms of vec4 registers,
 113          * not scalar registers)
 114          */
 115         unsigned first_immediate;
 116         unsigned immediates_count;
 117         struct {
 118                 uint32_t val[4];
 119         } immediates[64];
 120
 121         /* so far, only used for blit_prog shader.. values for
 122          * VPC_VARYING_INTERP[i].MODE and VPC_VARYING_PS_REPL[i].MODE
 123          */
 124         uint32_t vinterp[4], vpsrepl[4];
 125 };
 126
 127 void fd3_program_emit(struct fd_ringbuffer *ring,
 128                 struct fd_program_stateobj *prog, bool binning);
 129
 130 void fd3_prog_init(struct pipe_context *pctx);
 131 void fd3_prog_fini(struct pipe_context *pctx);
 132
 133 #endif /* FD3_PROGRAM_H_ */